ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #14392 from jeromecoutant/PR_WB_QSPI 

STM32WB: enable QSPI for custom boards
pull/14402/head
Martin Kojtal 2021-03-09 17:29:34 +00:00 committed by GitHub
parent 866855df5c 806417853d
commit c8d4b90267
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 20 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
targets/TARGET_STM/TARGET_STM32WB/objects.h
View File

@ -141,6 +141,19 @@ struct trng_s {
RNG_HandleTypeDef handle; RNG_HandleTypeDef handle;
}; };
#if DEVICE_QSPI
struct qspi_s {
QSPI_HandleTypeDef handle;
QSPIName qspi;
PinName io0;
PinName io1;
PinName io2;
PinName io3;
PinName sclk;
PinName ssel;
};
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

12
targets/TARGET_STM/qspi_api.c
View File

@ -258,7 +258,9 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTy
// these are target specific settings, use default values // these are target specific settings, use default values
st_command->SIOOMode = QSPI_SIOO_INST_EVERY_CMD; st_command->SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
st_command->DdrMode = QSPI_DDR_MODE_DISABLE; st_command->DdrMode = QSPI_DDR_MODE_DISABLE;
#if defined(QSPI_DDR_HHC_ANALOG_DELAY)
st_command->DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY; st_command->DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
#endif
if (command->address.disabled == true) { if (command->address.disabled == true) {
st_command->AddressMode = QSPI_ADDRESS_NONE; st_command->AddressMode = QSPI_ADDRESS_NONE;
@ -800,10 +802,10 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
st_command.NbData = *length; st_command.NbData = *length;
if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
status = QSPI_STATUS_ERROR; status = QSPI_STATUS_ERROR;
} else { } else {
if (HAL_QSPI_Transmit(&obj->handle, (uint8_t *)data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { if (HAL_QSPI_Transmit(&obj->handle, (uint8_t *)data, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
status = QSPI_STATUS_ERROR; status = QSPI_STATUS_ERROR;
} }
} }
@ -849,10 +851,10 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
st_command.NbData = *length; st_command.NbData = *length;
if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
status = QSPI_STATUS_ERROR; status = QSPI_STATUS_ERROR;
} else { } else {
if (HAL_QSPI_Receive(&obj->handle, data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { if (HAL_QSPI_Receive(&obj->handle, data, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
status = QSPI_STATUS_ERROR; status = QSPI_STATUS_ERROR;
} }
} }
@ -920,7 +922,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
st_command.NbData = 1; st_command.NbData = 1;
st_command.DataMode = QSPI_DATA_NONE; /* Instruction only */ st_command.DataMode = QSPI_DATA_NONE; /* Instruction only */
if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
status = QSPI_STATUS_ERROR; status = QSPI_STATUS_ERROR;
return status; return status;
} }