diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c index 71efc858c8..2102cbbcda 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c @@ -105,14 +105,14 @@ #if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) /* #define SYSCLK_FREQ_HSE HSE_VALUE */ - #define SYSCLK_FREQ_24MHz 24000000 +/* #define SYSCLK_FREQ_24MHz 24000000 */ #else /* #define SYSCLK_FREQ_HSE HSE_VALUE */ /* #define SYSCLK_FREQ_24MHz 24000000 */ /* #define SYSCLK_FREQ_36MHz 36000000 */ /* #define SYSCLK_FREQ_48MHz 48000000 */ /* #define SYSCLK_FREQ_56MHz 56000000 */ -#define SYSCLK_FREQ_72MHz 72000000 +/* #define SYSCLK_FREQ_72MHz 72000000 */ #endif /*!< Uncomment the following line if you need to use external SRAM mounted diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/rtc_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/rtc_api.c index 821e8a483b..ad436c6c71 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/rtc_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/rtc_api.c @@ -24,12 +24,18 @@ void rtc_init(void) { BKP_DeInit(); // Reset Backup Domain + // Uncomment these lines if you use the LSE // Enable LSE and wait till it's ready - RCC_LSEConfig(RCC_LSE_ON); - while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) {} - - RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); // Select LSE as RTC Clock Source + //RCC_LSEConfig(RCC_LSE_ON); + //while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) {} + //RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); // Select LSE as RTC Clock Source + // Uncomment these lines if you use the LSI + // Enable LSI and wait till it's ready + RCC_LSICmd(ENABLE); + while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET) {} + RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI); // Select LSI as RTC Clock Source + RCC_RTCCLKCmd(ENABLE); // Enable RTC Clock RTC_WaitForSynchro(); // Wait for RTC registers synchronization @@ -37,8 +43,9 @@ void rtc_init(void) { RTC_WaitForLastTask(); // Wait until last write operation on RTC registers has finished // Set RTC period to 1 sec - // RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) - RTC_SetPrescaler(32767); + // For LSE: prescaler = RTCCLK/RTC period = 32768Hz/1Hz = 32768 + // For LSI: prescaler = RTCCLK/RTC period = 40000Hz/1Hz = 40000 + RTC_SetPrescaler(39999); RTC_WaitForLastTask(); // Wait until last write operation on RTC registers has finished