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STM33H7: DISCO_H747I inherit from MCU_STM32H747xI

pull/13083/head
jeromecoutant 2020-06-08 14:35:59 +02:00
parent 561f8d48bf
commit c815471526
1 changed files with 66 additions and 67 deletions
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131
targets/targets.json
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@ -2894,25 +2894,16 @@
"GENERIC_H745I"
]
},
"DISCO_H747I_CM7": {
"MCU_STM32H747xI": {
"inherits": [
"MCU_STM32"
],
"core": "Cortex-M7FD",
"components_add": [
"QSPIF",
"FLASHIAP"
],
"mbed_rom_start": "0x08000000",
"mbed_rom_size": "0x100000",
"mbed_ram_start": "0x24000000",
"mbed_ram_size": "0x80000",
"extra_labels_add": [
"STM32H7",
"STM32H747xI",
"STM32H747xI_CM7",
"DISCO_H747I",
"MT25QL512"
"STM32H747xI"
],
"components_add": [
"FLASHIAP"
],
"config": {
"clock_source": {
@ -2927,21 +2918,12 @@
},
"macros_add": [
"STM32H747xx",
"CORE_CM7",
"EXTRA_IDLE_STACK_REQUIRED",
"MBED_TICKLESS"
],
"overrides": {
"lpticker_delay_ticks": 0
},
"supported_form_factors": [
"ARDUINO",
"STMOD",
"PMOD"
],
"detect_code": [
"0814"
],
"device_has_add": [
"ANALOGOUT",
"CAN",
@ -2951,70 +2933,87 @@
"QSPI",
"MPU"
],
"device_name": "STM32H747XIHx",
"bootloader_supported": true
"bootloader_supported": true,
"public": false
},
"MCU_STM32H747xI_CM7": {
"inherits": [
"MCU_STM32H747xI"
],
"extra_labels_add": [
"STM32H747xI_CM7"
],
"core": "Cortex-M7FD",
"mbed_rom_start": "0x08000000",
"mbed_rom_size": "0x100000",
"mbed_ram_start": "0x24000000",
"mbed_ram_size": "0x80000",
"macros_add": [
"CORE_CM7"
],
"public": false
},
"DISCO_H747I_CM7": {
"inherits": [
"MCU_STM32H747xI_CM7"
],
"supported_form_factors": [
"ARDUINO",
"STMOD",
"PMOD"
],
"extra_labels_add": [
"DISCO_H747I",
"MT25QL512"
],
"components_add": [
"QSPIF"
],
"detect_code": [
"0814"
],
"device_name": "STM32H747XIHx"
},
"DISCO_H747I": {
"inherits": [
"DISCO_H747I_CM7"
]
},
"DISCO_H747I_CM4": {
"MCU_STM32H747xI_CM4": {
"inherits": [
"MCU_STM32"
"MCU_STM32H747xI"
],
"extra_labels_add": [
"STM32H747xI_CM4"
],
"core": "Cortex-M4F",
"extra_labels_add": [
"STM32H7",
"STM32H747xI",
"STM32H747xI_CM4",
"DISCO_H747I",
"MT25QL512"
],
"components_add": [
"QSPIF",
"FLASHIAP"
],
"mbed_rom_start": "0x08100000",
"mbed_rom_size": "0x100000",
"mbed_ram_start": "0x10000000",
"mbed_ram_size": "0x48000",
"config": {
"clock_source": {
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
"value": "USE_PLL_HSE_EXTC",
"macro_name": "CLOCK_SOURCE"
},
"lpticker_lptim": {
"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
"value": 1
}
},
"macros_add": [
"STM32H747xx",
"CORE_CM4",
"EXTRA_IDLE_STACK_REQUIRED",
"MBED_TICKLESS"
"CORE_CM4"
],
"overrides": {
"lpticker_delay_ticks": 0
"OUTPUT_EXT": "hex",
"public": false
},
"DISCO_H747I_CM4": {
"inherits": [
"MCU_STM32H747xI_CM4"
],
"extra_labels_add": [
"DISCO_H747I",
"MT25QL512"
],
"components_add": [
"QSPIF"
],
"supported_form_factors": [
"ARDUINO",
"STMOD",
"PMOD"
],
"device_has_add": [
"ANALOGOUT",
"CAN",
"CRC",
"TRNG",
"FLASH",
"QSPI",
"MPU"
],
"OUTPUT_EXT": "hex",
"bootloader_supported": true
"device_name": "STM32H747XIHx"
},
"DISCO_L072CZ_LRWAN1": {
"inherits": [