From 0cef2091827e19f12d5f25e3ea70cc773771c03f Mon Sep 17 00:00:00 2001 From: Hugues Kamba Date: Fri, 8 Jan 2021 18:30:44 +0000 Subject: [PATCH] GigaDevice: Fix heap size formula in scatter files The heap size was incorrectly calculated. This fixes it by subtracting the Stack size, any memory chunks allocated before the start of the application (for vectors and/or crash report), and finally the size of the application from the total RAM size. --- .../device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct | 6 ++++-- .../device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct index c19959133e..96cf2faf55 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct @@ -33,6 +33,8 @@ #define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) +#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -41,11 +43,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct index 05fc5eee64..09d799798c 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct @@ -33,6 +33,8 @@ #define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) +#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -41,11 +43,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack