mirror of https://github.com/ARMmbed/mbed-os.git
add to support gcc & iar
justinkim
parent
6f654ea6aa
commit
c71557c605
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@ -0,0 +1,31 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x00020000;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x20004000;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x00000400;
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define symbol __ICFEDIT_size_heap__ = 0x00000400;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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@ -0,0 +1,305 @@
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;/*******************************************************************************************************************************************************
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; * Copyright ¨Ï 2016 <WIZnet Co.,Ltd.>
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||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the ¡°Software¡±),
|
||||
; * to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
; * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
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||||
; *
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||||
; * The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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||||
;
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||||
; * THE SOFTWARE IS PROVIDED ¡°AS IS¡±, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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||||
; * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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||||
; * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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; * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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;*********************************************************************************************************************************************************/
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;/**************************************************************************//**
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; * @file startup_ARMCM0.s
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; * @brief CMSIS Core Device Startup File for
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; * ARMCM0 Device Series
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; * @version V1.08
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; * @date 23. November 2012
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; *
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; * @note
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; *
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; ******************************************************************************/
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;/* Copyright (c) 2011 - 2012 ARM LIMITED
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;
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; All rights reserved.
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; Redistribution and use in source and binary forms, with or without
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||||
; modification, are permitted provided that the following conditions are met:
|
||||
; - Redistributions of source code must retain the above copyright
|
||||
; notice, this list of conditions and the following disclaimer.
|
||||
; - Redistributions in binary form must reproduce the above copyright
|
||||
; notice, this list of conditions and the following disclaimer in the
|
||||
; documentation and/or other materials provided with the distribution.
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||||
; - Neither the name of ARM nor the names of its contributors may be used
|
||||
; to endorse or promote products derived from this software without
|
||||
; specific prior written permission.
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||||
; *
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||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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||||
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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||||
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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||||
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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; POSSIBILITY OF SUCH DAMAGE.
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; ---------------------------------------------------------------------------*/
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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__vector_table_0x1c
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; Exterval Interrupts
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DCD SSP0_Handler ; 16+ 0: SSP 0 Handler
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DCD SSP1_Handler ; 16+ 1: SSP 1 Handler
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DCD UART0_Handler ; 16+ 2: UART 0 Handler
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DCD UART1_Handler ; 16+ 3: UART 1 Handler
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DCD UART2_Handler ; 16+ 4: UART 2 Handler
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DCD I2C0_Handler ; 16+ 5: I2C 0 Handler
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DCD I2C1_Handler ; 16+ 6: I2C 1 Handler
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DCD PORT0_Handler ; 16+ 7: GPIO Port 0 Combined Handler
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DCD PORT1_Handler ; 16+ 8: GPIO Port 1 Combined Handler
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DCD PORT2_Handler ; 16+ 9: GPIO Port 2 Combined Handler
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DCD PORT3_Handler ; 16+10: GPIO Port 3 Combined Handler
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DCD DMA_Handler ; 16+11: DMA Combined Handler
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DCD DUALTIMER0_Handler ; 16+12: Dual timer 0 handler
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DCD DUALTIMER1_Handler ; 16+13: Dual timer 1 handler
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DCD PWM0_Handler ; 16+14: PWM0 Handler
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DCD PWM1_Handler ; 16+15: PWM1 Handler
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DCD PWM2_Handler ; 16+16: PWM2 Handler
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DCD PWM3_Handler ; 16+17: PWM3 Handler
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DCD PWM4_Handler ; 16+18: PWM4 Handler
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DCD PWM5_Handler ; 16+19: PWM5 Handler
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DCD PWM6_Handler ; 16+20: PWM6 Handler
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DCD PWM7_Handler ; 16+21: PWM7 Handler
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DCD RTC_Handler ; 16+22: RTC Handler
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DCD ADC_Handler ; 16+23: ADC Handler
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DCD WZTOE_Handler ; 16+24: WZTOE_Handler
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DCD EXTI_Handler ; 16+25: EXTI_Handler
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__Vectors_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reset_Handler
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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NMI_Handler
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B NMI_Handler
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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HardFault_Handler
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B HardFault_Handler
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SVC_Handler
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B SVC_Handler
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PendSV_Handler
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B PendSV_Handler
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SysTick_Handler
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B SysTick_Handler
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PUBWEAK SSP0_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SSP0_Handler
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B SSP0_Handler
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PUBWEAK SSP1_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SSP1_Handler
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B SSP1_Handler
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PUBWEAK UART0_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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UART0_Handler
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B UART0_Handler
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PUBWEAK UART1_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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UART1_Handler
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B UART1_Handler
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PUBWEAK UART2_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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UART2_Handler
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B UART2_Handler
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PUBWEAK I2C0_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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I2C0_Handler
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B I2C0_Handler
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PUBWEAK I2C1_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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I2C1_Handler
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B I2C1_Handler
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PUBWEAK PORT0_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PORT0_Handler
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B PORT0_Handler
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PUBWEAK PORT1_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PORT1_Handler
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B PORT1_Handler
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PUBWEAK PORT2_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PORT2_Handler
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B PORT2_Handler
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PUBWEAK PORT3_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PORT3_Handler
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B PORT3_Handler
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PUBWEAK DMA_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA_Handler
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B DMA_Handler
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PUBWEAK DUALTIMER0_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DUALTIMER0_Handler
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B DUALTIMER0_Handler
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PUBWEAK DUALTIMER1_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DUALTIMER1_Handler
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B DUALTIMER1_Handler
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PUBWEAK PWM0_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM0_Handler
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B PWM0_Handler
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PUBWEAK PWM1_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM1_Handler
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B PWM1_Handler
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PUBWEAK PWM2_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM2_Handler
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B PWM2_Handler
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PUBWEAK PWM3_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM3_Handler
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B PWM3_Handler
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PUBWEAK PWM4_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM4_Handler
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B PWM4_Handler
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PUBWEAK PWM5_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM5_Handler
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B PWM5_Handler
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PUBWEAK PWM6_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM6_Handler
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B PWM6_Handler
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PUBWEAK PWM7_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PWM7_Handler
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B PWM7_Handler
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PUBWEAK RTC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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RTC_Handler
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B RTC_Handler
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PUBWEAK ADC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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ADC_Handler
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B ADC_Handler
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PUBWEAK WZTOE_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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WZTOE_Handler
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B WZTOE_Handler
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PUBWEAK EXTI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI_Handler
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B EXTI_Handler
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END
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@ -0,0 +1,31 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
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||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x00020000;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x20004000;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x00000400;
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define symbol __ICFEDIT_size_heap__ = 0x00000400;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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@ -0,0 +1,305 @@
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;/*******************************************************************************************************************************************************
|
||||
; * Copyright ¨Ï 2016 <WIZnet Co.,Ltd.>
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the ¡°Software¡±),
|
||||
; * to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
; * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
;
|
||||
; * THE SOFTWARE IS PROVIDED ¡°AS IS¡±, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
; * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
; * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
; * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
;*********************************************************************************************************************************************************/
|
||||
;/**************************************************************************//**
|
||||
; * @file startup_ARMCM0.s
|
||||
; * @brief CMSIS Core Device Startup File for
|
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; * ARMCM0 Device Series
|
||||
; * @version V1.08
|
||||
; * @date 23. November 2012
|
||||
; *
|
||||
; * @note
|
||||
; *
|
||||
; ******************************************************************************/
|
||||
;/* Copyright (c) 2011 - 2012 ARM LIMITED
|
||||
;
|
||||
; All rights reserved.
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions are met:
|
||||
; - Redistributions of source code must retain the above copyright
|
||||
; notice, this list of conditions and the following disclaimer.
|
||||
; - Redistributions in binary form must reproduce the above copyright
|
||||
; notice, this list of conditions and the following disclaimer in the
|
||||
; documentation and/or other materials provided with the distribution.
|
||||
; - Neither the name of ARM nor the names of its contributors may be used
|
||||
; to endorse or promote products derived from this software without
|
||||
; specific prior written permission.
|
||||
; *
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
; POSSIBILITY OF SUCH DAMAGE.
|
||||
; ---------------------------------------------------------------------------*/
|
||||
|
||||
|
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;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
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|
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MODULE ?cstartup
|
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|
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;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
PUBLIC __vector_table_0x1c
|
||||
PUBLIC __Vectors
|
||||
PUBLIC __Vectors_End
|
||||
PUBLIC __Vectors_Size
|
||||
|
||||
DATA
|
||||
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
__vector_table_0x1c
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; Exterval Interrupts
|
||||
DCD SSP0_Handler ; 16+ 0: SSP 0 Handler
|
||||
DCD SSP1_Handler ; 16+ 1: SSP 1 Handler
|
||||
DCD UART0_Handler ; 16+ 2: UART 0 Handler
|
||||
DCD UART1_Handler ; 16+ 3: UART 1 Handler
|
||||
DCD UART2_Handler ; 16+ 4: UART 2 Handler
|
||||
DCD I2C0_Handler ; 16+ 5: I2C 0 Handler
|
||||
DCD I2C1_Handler ; 16+ 6: I2C 1 Handler
|
||||
DCD PORT0_Handler ; 16+ 7: GPIO Port 0 Combined Handler
|
||||
DCD PORT1_Handler ; 16+ 8: GPIO Port 1 Combined Handler
|
||||
DCD PORT2_Handler ; 16+ 9: GPIO Port 2 Combined Handler
|
||||
DCD PORT3_Handler ; 16+10: GPIO Port 3 Combined Handler
|
||||
DCD DMA_Handler ; 16+11: DMA Combined Handler
|
||||
DCD DUALTIMER0_Handler ; 16+12: Dual timer 0 handler
|
||||
DCD DUALTIMER1_Handler ; 16+13: Dual timer 1 handler
|
||||
DCD PWM0_Handler ; 16+14: PWM0 Handler
|
||||
DCD PWM1_Handler ; 16+15: PWM1 Handler
|
||||
DCD PWM2_Handler ; 16+16: PWM2 Handler
|
||||
DCD PWM3_Handler ; 16+17: PWM3 Handler
|
||||
DCD PWM4_Handler ; 16+18: PWM4 Handler
|
||||
DCD PWM5_Handler ; 16+19: PWM5 Handler
|
||||
DCD PWM6_Handler ; 16+20: PWM6 Handler
|
||||
DCD PWM7_Handler ; 16+21: PWM7 Handler
|
||||
DCD RTC_Handler ; 16+22: RTC Handler
|
||||
DCD ADC_Handler ; 16+23: ADC Handler
|
||||
DCD WZTOE_Handler ; 16+24: WZTOE_Handler
|
||||
DCD EXTI_Handler ; 16+25: EXTI_Handler
|
||||
__Vectors_End
|
||||
|
||||
__Vectors EQU __vector_table
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK SSP0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SSP0_Handler
|
||||
B SSP0_Handler
|
||||
|
||||
PUBWEAK SSP1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SSP1_Handler
|
||||
B SSP1_Handler
|
||||
|
||||
PUBWEAK UART0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART0_Handler
|
||||
B UART0_Handler
|
||||
|
||||
PUBWEAK UART1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART1_Handler
|
||||
B UART1_Handler
|
||||
|
||||
PUBWEAK UART2_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART2_Handler
|
||||
B UART2_Handler
|
||||
|
||||
PUBWEAK I2C0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C0_Handler
|
||||
B I2C0_Handler
|
||||
|
||||
PUBWEAK I2C1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_Handler
|
||||
B I2C1_Handler
|
||||
|
||||
PUBWEAK PORT0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT0_Handler
|
||||
B PORT0_Handler
|
||||
|
||||
PUBWEAK PORT1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT1_Handler
|
||||
B PORT1_Handler
|
||||
|
||||
PUBWEAK PORT2_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT2_Handler
|
||||
B PORT2_Handler
|
||||
|
||||
PUBWEAK PORT3_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT3_Handler
|
||||
B PORT3_Handler
|
||||
|
||||
PUBWEAK DMA_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA_Handler
|
||||
B DMA_Handler
|
||||
|
||||
PUBWEAK DUALTIMER0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DUALTIMER0_Handler
|
||||
B DUALTIMER0_Handler
|
||||
|
||||
PUBWEAK DUALTIMER1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DUALTIMER1_Handler
|
||||
B DUALTIMER1_Handler
|
||||
|
||||
PUBWEAK PWM0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM0_Handler
|
||||
B PWM0_Handler
|
||||
|
||||
PUBWEAK PWM1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM1_Handler
|
||||
B PWM1_Handler
|
||||
|
||||
PUBWEAK PWM2_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM2_Handler
|
||||
B PWM2_Handler
|
||||
|
||||
PUBWEAK PWM3_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM3_Handler
|
||||
B PWM3_Handler
|
||||
|
||||
PUBWEAK PWM4_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM4_Handler
|
||||
B PWM4_Handler
|
||||
|
||||
PUBWEAK PWM5_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM5_Handler
|
||||
B PWM5_Handler
|
||||
|
||||
PUBWEAK PWM6_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM6_Handler
|
||||
B PWM6_Handler
|
||||
|
||||
PUBWEAK PWM7_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM7_Handler
|
||||
B PWM7_Handler
|
||||
|
||||
PUBWEAK RTC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_Handler
|
||||
B RTC_Handler
|
||||
|
||||
PUBWEAK ADC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC_Handler
|
||||
B ADC_Handler
|
||||
|
||||
PUBWEAK WZTOE_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WZTOE_Handler
|
||||
B WZTOE_Handler
|
||||
|
||||
PUBWEAK EXTI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI_Handler
|
||||
B EXTI_Handler
|
||||
|
||||
END
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x00020000;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20004000;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x00000400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x00000400;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
|
@ -0,0 +1,305 @@
|
|||
;/*******************************************************************************************************************************************************
|
||||
; * Copyright ¨Ï 2016 <WIZnet Co.,Ltd.>
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the ¡°Software¡±),
|
||||
; * to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
; * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
;
|
||||
; * THE SOFTWARE IS PROVIDED ¡°AS IS¡±, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
; * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
; * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
; * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
;*********************************************************************************************************************************************************/
|
||||
;/**************************************************************************//**
|
||||
; * @file startup_ARMCM0.s
|
||||
; * @brief CMSIS Core Device Startup File for
|
||||
; * ARMCM0 Device Series
|
||||
; * @version V1.08
|
||||
; * @date 23. November 2012
|
||||
; *
|
||||
; * @note
|
||||
; *
|
||||
; ******************************************************************************/
|
||||
;/* Copyright (c) 2011 - 2012 ARM LIMITED
|
||||
;
|
||||
; All rights reserved.
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions are met:
|
||||
; - Redistributions of source code must retain the above copyright
|
||||
; notice, this list of conditions and the following disclaimer.
|
||||
; - Redistributions in binary form must reproduce the above copyright
|
||||
; notice, this list of conditions and the following disclaimer in the
|
||||
; documentation and/or other materials provided with the distribution.
|
||||
; - Neither the name of ARM nor the names of its contributors may be used
|
||||
; to endorse or promote products derived from this software without
|
||||
; specific prior written permission.
|
||||
; *
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
; POSSIBILITY OF SUCH DAMAGE.
|
||||
; ---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
PUBLIC __vector_table_0x1c
|
||||
PUBLIC __Vectors
|
||||
PUBLIC __Vectors_End
|
||||
PUBLIC __Vectors_Size
|
||||
|
||||
DATA
|
||||
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
__vector_table_0x1c
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; Exterval Interrupts
|
||||
DCD SSP0_Handler ; 16+ 0: SSP 0 Handler
|
||||
DCD SSP1_Handler ; 16+ 1: SSP 1 Handler
|
||||
DCD UART0_Handler ; 16+ 2: UART 0 Handler
|
||||
DCD UART1_Handler ; 16+ 3: UART 1 Handler
|
||||
DCD UART2_Handler ; 16+ 4: UART 2 Handler
|
||||
DCD I2C0_Handler ; 16+ 5: I2C 0 Handler
|
||||
DCD I2C1_Handler ; 16+ 6: I2C 1 Handler
|
||||
DCD PORT0_Handler ; 16+ 7: GPIO Port 0 Combined Handler
|
||||
DCD PORT1_Handler ; 16+ 8: GPIO Port 1 Combined Handler
|
||||
DCD PORT2_Handler ; 16+ 9: GPIO Port 2 Combined Handler
|
||||
DCD PORT3_Handler ; 16+10: GPIO Port 3 Combined Handler
|
||||
DCD DMA_Handler ; 16+11: DMA Combined Handler
|
||||
DCD DUALTIMER0_Handler ; 16+12: Dual timer 0 handler
|
||||
DCD DUALTIMER1_Handler ; 16+13: Dual timer 1 handler
|
||||
DCD PWM0_Handler ; 16+14: PWM0 Handler
|
||||
DCD PWM1_Handler ; 16+15: PWM1 Handler
|
||||
DCD PWM2_Handler ; 16+16: PWM2 Handler
|
||||
DCD PWM3_Handler ; 16+17: PWM3 Handler
|
||||
DCD PWM4_Handler ; 16+18: PWM4 Handler
|
||||
DCD PWM5_Handler ; 16+19: PWM5 Handler
|
||||
DCD PWM6_Handler ; 16+20: PWM6 Handler
|
||||
DCD PWM7_Handler ; 16+21: PWM7 Handler
|
||||
DCD RTC_Handler ; 16+22: RTC Handler
|
||||
DCD ADC_Handler ; 16+23: ADC Handler
|
||||
DCD WZTOE_Handler ; 16+24: WZTOE_Handler
|
||||
DCD EXTI_Handler ; 16+25: EXTI_Handler
|
||||
__Vectors_End
|
||||
|
||||
__Vectors EQU __vector_table
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK SSP0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SSP0_Handler
|
||||
B SSP0_Handler
|
||||
|
||||
PUBWEAK SSP1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SSP1_Handler
|
||||
B SSP1_Handler
|
||||
|
||||
PUBWEAK UART0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART0_Handler
|
||||
B UART0_Handler
|
||||
|
||||
PUBWEAK UART1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART1_Handler
|
||||
B UART1_Handler
|
||||
|
||||
PUBWEAK UART2_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART2_Handler
|
||||
B UART2_Handler
|
||||
|
||||
PUBWEAK I2C0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C0_Handler
|
||||
B I2C0_Handler
|
||||
|
||||
PUBWEAK I2C1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_Handler
|
||||
B I2C1_Handler
|
||||
|
||||
PUBWEAK PORT0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT0_Handler
|
||||
B PORT0_Handler
|
||||
|
||||
PUBWEAK PORT1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT1_Handler
|
||||
B PORT1_Handler
|
||||
|
||||
PUBWEAK PORT2_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT2_Handler
|
||||
B PORT2_Handler
|
||||
|
||||
PUBWEAK PORT3_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PORT3_Handler
|
||||
B PORT3_Handler
|
||||
|
||||
PUBWEAK DMA_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA_Handler
|
||||
B DMA_Handler
|
||||
|
||||
PUBWEAK DUALTIMER0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DUALTIMER0_Handler
|
||||
B DUALTIMER0_Handler
|
||||
|
||||
PUBWEAK DUALTIMER1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DUALTIMER1_Handler
|
||||
B DUALTIMER1_Handler
|
||||
|
||||
PUBWEAK PWM0_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM0_Handler
|
||||
B PWM0_Handler
|
||||
|
||||
PUBWEAK PWM1_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM1_Handler
|
||||
B PWM1_Handler
|
||||
|
||||
PUBWEAK PWM2_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM2_Handler
|
||||
B PWM2_Handler
|
||||
|
||||
PUBWEAK PWM3_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM3_Handler
|
||||
B PWM3_Handler
|
||||
|
||||
PUBWEAK PWM4_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM4_Handler
|
||||
B PWM4_Handler
|
||||
|
||||
PUBWEAK PWM5_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM5_Handler
|
||||
B PWM5_Handler
|
||||
|
||||
PUBWEAK PWM6_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM6_Handler
|
||||
B PWM6_Handler
|
||||
|
||||
PUBWEAK PWM7_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWM7_Handler
|
||||
B PWM7_Handler
|
||||
|
||||
PUBWEAK RTC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_Handler
|
||||
B RTC_Handler
|
||||
|
||||
PUBWEAK ADC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC_Handler
|
||||
B ADC_Handler
|
||||
|
||||
PUBWEAK WZTOE_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WZTOE_Handler
|
||||
B WZTOE_Handler
|
||||
|
||||
PUBWEAK EXTI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI_Handler
|
||||
B EXTI_Handler
|
||||
|
||||
END
|
||||
|
|
@ -2457,7 +2457,7 @@
|
|||
"supported_form_factors": ["ARDUINO"],
|
||||
"core": "Cortex-M0",
|
||||
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
|
||||
"supported_toolchains": ["uARM", "ARM"],
|
||||
"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
|
||||
"inherits": ["Target"],
|
||||
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"release_versions": ["2", "5"]
|
||||
|
|
@ -2466,7 +2466,7 @@
|
|||
"supported_form_factors": ["ARDUINO"],
|
||||
"core": "Cortex-M0",
|
||||
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
|
||||
"supported_toolchains": ["uARM", "ARM"],
|
||||
"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
|
||||
"inherits": ["Target"],
|
||||
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"release_versions": ["2", "5"]
|
||||
|
|
@ -2475,7 +2475,7 @@
|
|||
"inherits": ["Target"],
|
||||
"core": "Cortex-M0",
|
||||
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
|
||||
"supported_toolchains": ["uARM", "ARM"],
|
||||
"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
|
||||
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"release_versions": ["2", "5"]
|
||||
},
|
||||
|
|
|
|||
Loading…
Reference in New Issue