mirror of https://github.com/ARMmbed/mbed-os.git
renaming the mcu to stm32l071xx
Andrea Gilardoni
parent
0c0692a3d1
commit
c62fc559c9
|
|
@ -1,218 +0,0 @@
|
||||||
;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32l073xx.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V1.7.1
|
|
||||||
;* Date : 25-November-2016
|
|
||||||
;* Description : STM32l073xx Devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M0+ processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;*******************************************************************************
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;*
|
|
||||||
;*******************************************************************************
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
|
|
||||||
|
|
||||||
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD RTC_IRQHandler ; RTC through EXTI Line
|
|
||||||
DCD FLASH_IRQHandler ; FLASH
|
|
||||||
DCD RCC_CRS_IRQHandler ; RCC and CRS
|
|
||||||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
|
||||||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
|
||||||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
|
||||||
DCD TSC_IRQHandler ; TSC
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
|
||||||
DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
|
|
||||||
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
|
|
||||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
|
||||||
DCD USART4_5_IRQHandler ; USART4 and USART5
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM21_IRQHandler ; TIM21
|
|
||||||
DCD I2C3_IRQHandler ; I2C3
|
|
||||||
DCD TIM22_IRQHandler ; TIM22
|
|
||||||
DCD I2C1_IRQHandler ; I2C1
|
|
||||||
DCD I2C2_IRQHandler ; I2C2
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
|
|
||||||
DCD LCD_IRQHandler ; LCD
|
|
||||||
DCD USB_IRQHandler ; USB
|
|
||||||
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler routine
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT __main
|
|
||||||
IMPORT SystemInit
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_CRS_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_15_IRQHandler [WEAK]
|
|
||||||
EXPORT TSC_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_COMP_IRQHandler [WEAK]
|
|
||||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART4_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM7_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM21_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM22_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C3_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT RNG_LPUART1_IRQHandler [WEAK]
|
|
||||||
EXPORT LCD_IRQHandler [WEAK]
|
|
||||||
EXPORT USB_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_IRQHandler
|
|
||||||
RTC_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_CRS_IRQHandler
|
|
||||||
EXTI0_1_IRQHandler
|
|
||||||
EXTI2_3_IRQHandler
|
|
||||||
EXTI4_15_IRQHandler
|
|
||||||
TSC_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_3_IRQHandler
|
|
||||||
DMA1_Channel4_5_6_7_IRQHandler
|
|
||||||
ADC1_COMP_IRQHandler
|
|
||||||
LPTIM1_IRQHandler
|
|
||||||
USART4_5_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM6_DAC_IRQHandler
|
|
||||||
TIM7_IRQHandler
|
|
||||||
TIM21_IRQHandler
|
|
||||||
TIM22_IRQHandler
|
|
||||||
I2C1_IRQHandler
|
|
||||||
I2C2_IRQHandler
|
|
||||||
I2C3_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
RNG_LPUART1_IRQHandler
|
|
||||||
LCD_IRQHandler
|
|
||||||
USB_IRQHandler
|
|
||||||
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,53 +0,0 @@
|
||||||
#! armcc -E
|
|
||||||
; Scatter-Loading Description File
|
|
||||||
;
|
|
||||||
; SPDX-License-Identifier: BSD-3-Clause
|
|
||||||
;******************************************************************************
|
|
||||||
;* @attention
|
|
||||||
;*
|
|
||||||
;* Copyright (c) 2016-2020 STMicroelectronics.
|
|
||||||
;* All rights reserved.
|
|
||||||
;*
|
|
||||||
;* This software component is licensed by ST under BSD 3-Clause license,
|
|
||||||
;* the "License"; You may not use this file except in compliance with the
|
|
||||||
;* License. You may obtain a copy of the License at:
|
|
||||||
;* opensource.org/licenses/BSD-3-Clause
|
|
||||||
;*
|
|
||||||
;******************************************************************************
|
|
||||||
|
|
||||||
#include "../cmsis_nvic.h"
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
|
||||||
#define MBED_APP_START MBED_ROM_START
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
|
||||||
#define MBED_APP_SIZE MBED_ROM_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
|
||||||
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Round up VECTORS_SIZE to 8 bytes */
|
|
||||||
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
|
||||||
|
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
|
||||||
*.o (RESET, +First)
|
|
||||||
*(InRoot$$Sections)
|
|
||||||
.ANY (+RO)
|
|
||||||
}
|
|
||||||
|
|
||||||
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
|
|
||||||
.ANY (+RW +ZI)
|
|
||||||
}
|
|
||||||
|
|
||||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
|
|
||||||
}
|
|
||||||
|
|
||||||
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
@ -1,348 +0,0 @@
|
||||||
;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
|
||||||
;* File Name : startup_stm32l073xx.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Version : V1.7.1
|
|
||||||
;* Date : 25-November-2016
|
|
||||||
;* Description : STM32L073xx Ultra Low Power Devices vector
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == _iar_program_start,
|
|
||||||
;* - Set the vector table entries with the exceptions ISR
|
|
||||||
;* address.
|
|
||||||
;* - Configure the system clock
|
|
||||||
;* - Branches to main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M0+ processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;********************************************************************************
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;*
|
|
||||||
;*******************************************************************************/
|
|
||||||
;
|
|
||||||
;
|
|
||||||
; The modules in this file are included in the libraries, and may be replaced
|
|
||||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
|
||||||
; a user defined start symbol.
|
|
||||||
; To override the cstartup defined in the library, simply add your modified
|
|
||||||
; version to the workbench project.
|
|
||||||
;
|
|
||||||
; The vector table is normally located at address 0.
|
|
||||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
|
||||||
; The name "__vector_table" has special meaning for C-SPY:
|
|
||||||
; it is where the SP start value is found, and the NVIC vector
|
|
||||||
; table register (VTOR) is initialized to this address if != 0.
|
|
||||||
;
|
|
||||||
; Cortex-M version
|
|
||||||
;
|
|
||||||
|
|
||||||
MODULE ?cstartup
|
|
||||||
|
|
||||||
;; Forward declaration of sections.
|
|
||||||
SECTION CSTACK:DATA:NOROOT(3)
|
|
||||||
|
|
||||||
SECTION .intvec:CODE:NOROOT(2)
|
|
||||||
|
|
||||||
EXTERN __iar_program_start
|
|
||||||
EXTERN SystemInit
|
|
||||||
PUBLIC __vector_table
|
|
||||||
|
|
||||||
DATA
|
|
||||||
__vector_table
|
|
||||||
DCD sfe(CSTACK)
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window Watchdog
|
|
||||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
||||||
DCD RTC_IRQHandler ; RTC through EXTI Line
|
|
||||||
DCD FLASH_IRQHandler ; FLASH
|
|
||||||
DCD RCC_CRS_IRQHandler ; RCC_CRS
|
|
||||||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
|
||||||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
|
||||||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
|
||||||
DCD TSC_IRQHandler ; TSC
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
|
||||||
DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
|
|
||||||
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
|
|
||||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
|
||||||
DCD USART4_5_IRQHandler ; USART4 and USART5
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD TIM21_IRQHandler ; TIM21
|
|
||||||
DCD I2C3_IRQHandler ; I2C3
|
|
||||||
DCD TIM22_IRQHandler ; TIM22
|
|
||||||
DCD I2C1_IRQHandler ; I2C1
|
|
||||||
DCD I2C2_IRQHandler ; I2C2
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
|
|
||||||
DCD LCD_IRQHandler ; LCD
|
|
||||||
DCD USB_IRQHandler ; USB
|
|
||||||
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
;;
|
|
||||||
;; Default interrupt handlers.
|
|
||||||
;;
|
|
||||||
THUMB
|
|
||||||
PUBWEAK Reset_Handler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(2)
|
|
||||||
Reset_Handler
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__iar_program_start
|
|
||||||
BX R0
|
|
||||||
|
|
||||||
PUBWEAK NMI_Handler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
NMI_Handler
|
|
||||||
B NMI_Handler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK HardFault_Handler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
HardFault_Handler
|
|
||||||
B HardFault_Handler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK SVC_Handler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
SVC_Handler
|
|
||||||
B SVC_Handler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK PendSV_Handler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
PendSV_Handler
|
|
||||||
B PendSV_Handler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK SysTick_Handler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
SysTick_Handler
|
|
||||||
B SysTick_Handler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK WWDG_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
WWDG_IRQHandler
|
|
||||||
B WWDG_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK PVD_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
PVD_IRQHandler
|
|
||||||
B PVD_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK RTC_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
RTC_IRQHandler
|
|
||||||
B RTC_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK FLASH_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
FLASH_IRQHandler
|
|
||||||
B FLASH_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK RCC_CRS_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
RCC_CRS_IRQHandler
|
|
||||||
B RCC_CRS_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK EXTI0_1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
EXTI0_1_IRQHandler
|
|
||||||
B EXTI0_1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK EXTI2_3_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
EXTI2_3_IRQHandler
|
|
||||||
B EXTI2_3_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK EXTI4_15_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
EXTI4_15_IRQHandler
|
|
||||||
B EXTI4_15_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK TSC_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TSC_IRQHandler
|
|
||||||
B TSC_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK DMA1_Channel1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
B DMA1_Channel1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK DMA1_Channel2_3_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
DMA1_Channel2_3_IRQHandler
|
|
||||||
B DMA1_Channel2_3_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
DMA1_Channel4_5_6_7_IRQHandler
|
|
||||||
B DMA1_Channel4_5_6_7_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK ADC1_COMP_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
ADC1_COMP_IRQHandler
|
|
||||||
B ADC1_COMP_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK LPTIM1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
LPTIM1_IRQHandler
|
|
||||||
B LPTIM1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK USART4_5_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
USART4_5_IRQHandler
|
|
||||||
B USART4_5_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK TIM2_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TIM2_IRQHandler
|
|
||||||
B TIM2_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK TIM3_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TIM3_IRQHandler
|
|
||||||
B TIM3_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK TIM6_DAC_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TIM6_DAC_IRQHandler
|
|
||||||
B TIM6_DAC_IRQHandler
|
|
||||||
|
|
||||||
PUBWEAK TIM7_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TIM7_IRQHandler
|
|
||||||
B TIM7_IRQHandler
|
|
||||||
|
|
||||||
PUBWEAK TIM21_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TIM21_IRQHandler
|
|
||||||
B TIM21_IRQHandler
|
|
||||||
|
|
||||||
PUBWEAK I2C3_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
I2C3_IRQHandler
|
|
||||||
B I2C3_IRQHandler
|
|
||||||
|
|
||||||
PUBWEAK TIM22_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
TIM22_IRQHandler
|
|
||||||
B TIM22_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK I2C1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
I2C1_IRQHandler
|
|
||||||
B I2C1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK I2C2_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
I2C2_IRQHandler
|
|
||||||
B I2C2_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK SPI1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
SPI1_IRQHandler
|
|
||||||
B SPI1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK SPI2_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
SPI2_IRQHandler
|
|
||||||
B SPI2_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK USART1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
USART1_IRQHandler
|
|
||||||
B USART1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK USART2_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
USART2_IRQHandler
|
|
||||||
B USART2_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK RNG_LPUART1_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
RNG_LPUART1_IRQHandler
|
|
||||||
B RNG_LPUART1_IRQHandler
|
|
||||||
|
|
||||||
|
|
||||||
PUBWEAK LCD_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
LCD_IRQHandler
|
|
||||||
B LCD_IRQHandler
|
|
||||||
|
|
||||||
PUBWEAK USB_IRQHandler
|
|
||||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
|
||||||
USB_IRQHandler
|
|
||||||
B USB_IRQHandler
|
|
||||||
|
|
||||||
END
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
||||||
|
|
@ -1,59 +0,0 @@
|
||||||
/* Linker script to configure memory regions.
|
|
||||||
*
|
|
||||||
* SPDX-License-Identifier: BSD-3-Clause
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2016-2020 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software component is licensed by ST under BSD 3-Clause license,
|
|
||||||
* the "License"; You may not use this file except in compliance with the
|
|
||||||
* License. You may obtain a copy of the License at:
|
|
||||||
* opensource.org/licenses/BSD-3-Clause
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
/* Device specific values */
|
|
||||||
|
|
||||||
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
|
||||||
|
|
||||||
define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
|
|
||||||
define symbol HEAP_SIZE = 0x1000;
|
|
||||||
|
|
||||||
/* Common - Do not change */
|
|
||||||
|
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) {
|
|
||||||
define symbol MBED_APP_START = MBED_ROM_START;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
|
||||||
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
|
||||||
/* This value is normally defined by the tools
|
|
||||||
to 0x1000 for bare metal and 0x400 for RTOS */
|
|
||||||
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Round up VECTORS_SIZE to 8 bytes */
|
|
||||||
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
|
|
||||||
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
|
|
||||||
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
|
|
||||||
|
|
||||||
define memory mem with size = 4G;
|
|
||||||
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
|
|
||||||
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
|
|
||||||
|
|
||||||
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
|
|
||||||
define block HEAP with alignment = 8, size = HEAP_SIZE { };
|
|
||||||
|
|
||||||
initialize by copy { readwrite };
|
|
||||||
do not initialize { section .noinit };
|
|
||||||
|
|
||||||
place at address mem: MBED_APP_START { readonly section .intvec };
|
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
|
||||||
place in RAM_region { readwrite,
|
|
||||||
block CSTACK, block HEAP };
|
|
||||||
|
|
@ -2794,14 +2794,13 @@
|
||||||
],
|
],
|
||||||
"device_name": "STM32L072CZ"
|
"device_name": "STM32L072CZ"
|
||||||
},
|
},
|
||||||
"STM32L071CXCTX": {
|
"MCU_STM32L071xx": {
|
||||||
"inherits": [
|
"inherits": [
|
||||||
"MCU_STM32L0"
|
"MCU_STM32L0"
|
||||||
],
|
],
|
||||||
"public": false,
|
"public": false,
|
||||||
"extra_labels_add": [
|
"extra_labels_add": [
|
||||||
"STM32L0",
|
"STM32L0",
|
||||||
"STML071CxCTx",
|
|
||||||
"STML071xx"
|
"STML071xx"
|
||||||
],
|
],
|
||||||
"overrides": {
|
"overrides": {
|
||||||
|
|
@ -2811,7 +2810,7 @@
|
||||||
"ANALOGOUT",
|
"ANALOGOUT",
|
||||||
"TRNG"
|
"TRNG"
|
||||||
],
|
],
|
||||||
"device_name": "STM32L071CXCTX"
|
"device_name": "STM32L071xx"
|
||||||
},
|
},
|
||||||
"NUCLEO_L073RZ": {
|
"NUCLEO_L073RZ": {
|
||||||
"inherits": [
|
"inherits": [
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue