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[STM32F0_all] remove the global variable and use SYSCFG register instead

pull/1432/head
adustm 2015-12-14 11:39:39 +01:00
parent 5784d29fd2
commit c59167c196
14 changed files with 7 additions and 39 deletions
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5
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c
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@ -33,19 +33,16 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c
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@ -160,7 +160,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
@ -229,7 +228,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c
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@ -33,19 +33,17 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c
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@ -161,7 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
@ -230,7 +229,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c
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@ -33,19 +33,17 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c
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@ -161,7 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
@ -230,7 +229,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c
View File

@ -33,19 +33,17 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c
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@ -161,7 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
@ -230,7 +229,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c
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@ -33,19 +33,17 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c
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@ -161,7 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
@ -230,7 +229,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c
View File

@ -33,19 +33,17 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

3
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c
View File

@ -161,8 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset. * Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@ -230,7 +228,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,

5
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c
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@ -33,19 +33,16 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
int NVIC_vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i; int i;
// Copy and switch to dynamic vectors if first time called // Copy and switch to dynamic vectors if first time called
if (NVIC_vtor_remap == 0) { if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) { for (i = 0; i < NVIC_NUM_VECTORS; i++) {
*((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
} }
SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
NVIC_vtor_remap = 1; // The vectors remap is done
} }
// Set the vector // Set the vector

3
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c
View File

@ -161,8 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void);
* @{ * @{
*/ */
extern int NVIC_vtor_remap;
/** /**
* @brief Setup the microcontroller system. * @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset. * Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@ -230,7 +228,6 @@ void SystemInit(void)
/* Configure the Cube driver */ /* Configure the Cube driver */
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
NVIC_vtor_remap = 0; // Because it is not cleared the first time we enter in NVIC_SetVector()
HAL_Init(); HAL_Init();
/* Configure the System clock source, PLL Multiplier and Divider factors, /* Configure the System clock source, PLL Multiplier and Divider factors,