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NRF52: fix config 

remove lib config and use target configuration instead. To avoid duplication of symbols, etc.

Fixes #10655
pull/11476/head
Martin Kojtal 2019-09-05 11:01:16 +01:00 committed by adbridge
parent e0806c5626
commit c51d452de9
2 changed files with 219 additions and 233 deletions
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218
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/mbed_lib.json
View File

@ -1,218 +0,0 @@
{
"name": "nordic",
"config": {
"uart_0_fifo_size": {
"help": "UART0 FIFO buffer. FIFO buffer is filled from DMA buffer.",
"value": 32
},
"uart_1_fifo_size": {
"help": "UART1 FIFO buffer. FIFO buffer is filled from DMA buffer.",
"value": 32
}
},
"macros": [
"SWI_DISABLE0"
],
"target_overrides": {
"DELTA_DFBM_NQ620": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"target.lf_clock_src": "NRF_LF_SRC_RC",
"target.lf_clock_rc_calib_timer_interval": 16,
"target.lf_clock_rc_calib_mode_config": 0
},
"MTB_LAIRD_BL652": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"target.lf_clock_src": "NRF_LF_SRC_RC",
"target.console-uart-flow-control": null
},
"MTB_UBLOX_NINA_B1": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"MTB_MURATA_WSM_BL241": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"target.lf_clock_src": "NRF_LF_SRC_XTAL",
"target.console-uart-flow-control": null
},
"NRF52_DK": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"RBLAB_BLENANO2": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"UBLOX_EVA_NINA": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"UBLOX_EVK_NINA_B1": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"target.console-uart-flow-control": "RTSCTS"
},
"VBLUNO52": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"target.console-uart-flow-control": "RTSCTS"
},
"NRF52840_DK": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_ERRATA_20"
]
},
"ARDUINO_NANO33BLE": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_ERRATA_20"
]
},
"MTB_LAIRD_BL654": {
"target.macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_ERRATA_20"
],
"target.lf_clock_src": "NRF_LF_SRC_RC",
"target.console-uart-flow-control": null
}
}
}

234
targets/targets.json
View File

@ -5122,7 +5122,24 @@
"RBLAB_BLENANO2": {
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA"
"device_name": "nRF52832_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"NRF51822_Y5_MBUG": {
"inherits": ["MCU_NRF51_16K"]
@ -7280,7 +7297,8 @@
"CMSIS_VECTAB_VIRTUAL",
"CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
"MBED_TICKLESS",
"MBED_MPU_CUSTOM"
"MBED_MPU_CUSTOM",
"SWI_DISABLE0"
],
"features": ["BLE"],
"device_has": [
@ -7328,6 +7346,14 @@
"lf_clock_rc_calib_mode_config": {
"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
"value": 0
},
"uart_0_fifo_size": {
"help": "UART0 FIFO buffer. FIFO buffer is filled from DMA buffer.",
"value": 32
},
"uart_1_fifo_size": {
"help": "UART1 FIFO buffer. FIFO buffer is filled from DMA buffer.",
"value": 32
}
},
"OUTPUT_EXT": "hex",
@ -7346,7 +7372,24 @@
"macros_add": [
"WSF_MAX_HANDLERS=10"
],
"device_has_remove": ["ITM"]
"device_has_remove": ["ITM"],
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"RIOT_MICRO_MODULE": {
"inherits": ["MCU_NRF52832"],
@ -7389,29 +7432,129 @@
"UBLOX_EVA_NINA": {
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA"
"device_name": "nRF52832_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"overrides": {
"console-uart-flow-control": "RTSCTS"
}
},
"UBLOX_EVK_NINA_B1": {
"supported_form_factors": ["ARDUINO"],
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA"
"device_name": "nRF52832_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"overrides": {
"console-uart-flow-control": "RTSCTS"
}
},
"MTB_UBLOX_NINA_B1": {
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA"
"device_name": "nRF52832_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
]
},
"MTB_LAIRD_BL652": {
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA"
"device_name": "nRF52832_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"overrides": {
"lf_clock_src": "NRF_LF_SRC_RC",
"console-uart-flow-control": null
}
},
"MTB_MURATA_WSM_BL241": {
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA",
"detect_code": ["0466"]
"detect_code": ["0466"],
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"overrides": {
"lf_clock_src": "NRF_LF_SRC_XTAL",
"console-uart-flow-control": null
}
},
"MTB_ACONNO_ACN52832": {
"inherits": ["MCU_NRF52832"],
@ -7423,7 +7566,29 @@
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA",
"device_has_remove": ["ITM"]
"device_has_remove": ["ITM"],
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"overrides": {
"lf_clock_src": "NRF_LF_SRC_RC",
"lf_clock_rc_calib_timer_interval": 16,
"lf_clock_rc_calib_mode_config": 0
}
},
"MCU_NRF52840": {
"inherits": ["Target"],
@ -7439,7 +7604,8 @@
"MBED_TICKLESS",
"MBEDTLS_CONFIG_HW_SUPPORT",
"WSF_MAX_HANDLERS=10",
"MBED_MPU_CUSTOM"
"MBED_MPU_CUSTOM",
"SWI_DISABLE0"
],
"features": ["CRYPTOCELL310", "BLE"],
"device_has": [
@ -7489,6 +7655,14 @@
"lf_clock_rc_calib_mode_config": {
"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
"value": 0
},
"uart_0_fifo_size": {
"help": "UART0 FIFO buffer. FIFO buffer is filled from DMA buffer.",
"value": 32
},
"uart_1_fifo_size": {
"help": "UART1 FIFO buffer. FIFO buffer is filled from DMA buffer.",
"value": 32
}
},
"overrides": {
@ -7506,7 +7680,11 @@
"supported_form_factors": ["ARDUINO"],
"inherits": ["MCU_NRF52840"],
"release_versions": ["5"],
"device_name": "nRF52840_xxAA"
"device_name": "nRF52840_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_ERRATA_20"
]
},
"ARDUINO_NANO33BLE": {
"inherits": ["MCU_NRF52840"],
@ -7516,7 +7694,11 @@
"components_remove": ["QSPIF"],
"components_add": ["FLASHIAP"],
"device_has_remove": ["QSPI"],
"device_has_add": ["FLASH"]
"device_has_add": ["FLASH"],
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_ERRATA_20"
]
},
"MTB_LAIRD_BL654": {
"inherits": ["MCU_NRF52840"],
@ -7525,9 +7707,10 @@
"detect_code": ["0465"],
"features_remove": ["CRYPTOCELL310"],
"macros_remove": ["MBEDTLS_CONFIG_HW_SUPPORT"],
"macros_add": ["NRFX_RNG_ENABLED=1", "RNG_ENABLED=1", "NRF_QUEUE_ENABLED=1"],
"macros_add": ["NRFX_RNG_ENABLED=1", "RNG_ENABLED=1", "NRF_QUEUE_ENABLED=1", "CONFIG_GPIO_AS_PINRESET", "NRF52_ERRATA_20"],
"overrides": {
"lf_clock_src": "NRF_LF_SRC_RC"
"lf_clock_src": "NRF_LF_SRC_RC",
"console-uart-flow-control": null
}
},
"BLUEPILL_F103C8": {
@ -8168,7 +8351,28 @@
"supported_form_factors": ["ARDUINO"],
"inherits": ["MCU_NRF52832"],
"release_versions": ["5"],
"device_name": "nRF52832_xxAA"
"device_name": "nRF52832_xxAA",
"macros_add": [
"CONFIG_GPIO_AS_PINRESET",
"NRF52_PAN_12",
"NRF52_PAN_15",
"NRF52_PAN_20",
"NRF52_PAN_30",
"NRF52_PAN_31",
"NRF52_PAN_36",
"NRF52_PAN_51",
"NRF52_PAN_53",
"NRF52_PAN_54",
"NRF52_PAN_55",
"NRF52_PAN_58",
"NRF52_PAN_62",
"NRF52_PAN_63",
"NRF52_PAN_64"
],
"overrides": {
"console-uart-flow-control": "RTSCTS"
}
},
"MCU_M480": {
"core": "Cortex-M4F",