Adding USB HS Support to the SDP-K1

pull/14203/head
kylejansen 2021-01-27 16:50:37 +00:00
parent 1b7b620528
commit c401b61c09
3 changed files with 49 additions and 1 deletions

View File

@ -98,6 +98,11 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE,
} QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
USB_HS = (int)USB_OTG_HS_PERIPH_BASE
} USBName;
#ifdef __cplusplus
}
#endif

View File

@ -421,3 +421,41 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_QSPI)}, // Connected to QUADSPI_NSS_A
{NC, NC, 0}
};
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
/* Not Supported by SDP-K1*/
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
// { PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE) }, // USB_OTG_FS_VBUS // Connected to VBUS_FS1
// {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS) }, // USB_OTG_FS_ID // Connected to USB_FS1_ID
// {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS) }, // USB_OTG_FS_DM // Connected to USB_FS1_N
// { PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS) }, // USB_OTG_FS_DP // Connected to USB_FS1_P
// { NC, NC, 0 }
};
MBED_WEAK const PinMap PinMap_USB_HS[] = {
#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS)
// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
{ PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS) }, // USB_OTG_HS_ID
{ PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE) }, // USB_OTG_HS_VBUS
{ PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS) }, // USB_OTG_HS_DM
{ PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS) }, // USB_OTG_HS_DP
#else /* MBED_CONF_TARGET_USB_SPEED */
{ PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D0 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
{ PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_CK
{ PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D1 // Connected to EXT_RESET
{ PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D2
{ PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D7
{ PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D3 // Connected to STDIO_UART_TX
{ PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D4 // Connected to STDIO_UART_RX
{ PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D5
{ PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_D6
{ PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_STP // Connected to SDNWE [MT48LC4M32B2B5-6A_WE]
{ PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_DIR
{ PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_NXT
// { PH_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_NXT // Connected to I2C2_SCL [CS43L22_SCL]
// { PI_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS) }, // USB_OTG_HS_ULPI_DIR
#endif /* MBED_CONF_TARGET_USB_SPEED */
{ NC, NC, 0 }
};

View File

@ -2197,6 +2197,10 @@
"help": "Clock frequency in Mhz",
"value": "8",
"macro_name": "CLOCK_FREQUENCY_MHZ"
},
"usb_speed": {
"help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS",
"value": "USE_USB_OTG_HS"
}
},
"overrides": {
@ -2208,7 +2212,8 @@
],
"device_has_add": [
"ANALOGOUT",
"QSPI"
"QSPI",
"USBDEVICE"
],
"device_has_remove": [
"LPTICKER"