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[M2351] Upgrade chip version to B from A 

There is a reset halt issue with PLL in A version.
To switch back to A version for some reason, define NU_CHIP_MAJOR to 1.
pull/7302/head
ccli8 2018-06-19 10:49:02 +08:00
parent c725f188ec
commit c382e9642e
1 changed files with 6 additions and 7 deletions
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13
targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/mbed_overrides.c
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@ -55,15 +55,11 @@ void mbed_sdk_init(void)
/* Wait for HIRC48 clock ready */ /* Wait for HIRC48 clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk); CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk);
#if defined(NU_CHIP_MAJOR) && (NU_CHIP_MAJOR == 1UL)
/* NOTE: There is a reset halt issue with PLL in A version. Work around it /* NOTE: There is a reset halt issue with PLL in A version. Work around it
* by using HIRC48 instead of PLL as HCLK clock source. */ * by using HIRC48 instead of PLL as HCLK clock source. */
#if 0
/* Select HCLK clock source as HIRC and HCLK clock divider as 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Set core clock as 48M from PLL */
CLK_SetCoreClock(FREQ_48MHZ);
#else
/* Trim HIRC48 to 48M against LXT */ /* Trim HIRC48 to 48M against LXT */
/* Reset TISTS48M status flags */ /* Reset TISTS48M status flags */
@ -90,6 +86,9 @@ void mbed_sdk_init(void)
} }
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1UL)); CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1UL));
#else
/* Set core clock as 64M from PLL */
CLK_SetCoreClock(FREQ_64MHZ);
#endif #endif
/* Update System Core Clock */ /* Update System Core Clock */