diff --git a/platform/source/mbed_application.c b/platform/source/mbed_application.c index 5cd70c6c4d..b52dfe6a31 100644 --- a/platform/source/mbed_application.c +++ b/platform/source/mbed_application.c @@ -71,17 +71,6 @@ void mbed_start_application(uintptr_t address) powerdown_scb(address); mbed_mpu_manager_deinit(); -#ifdef MBED_DEBUG - // Configs to make debugging easier -#ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk - // Disable write buffer to make BusFaults (eg write to ROM via NULL pointer) precise. - // Possible on Cortex-M3 and M4, not on M0, M7 or M33. - // Would be less necessary if ROM was write-protected in MPU to give a - // precise MemManage exception. - SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk; -#endif -#endif - sp = *((void **)address + 0); pc = *((void **)address + 1); start_new_application(sp, pc); diff --git a/platform/source/mbed_sdk_boot.c b/platform/source/mbed_sdk_boot.c index fe19053547..7234578925 100644 --- a/platform/source/mbed_sdk_boot.c +++ b/platform/source/mbed_sdk_boot.c @@ -77,6 +77,16 @@ void mbed_copy_nvic(void) void mbed_init(void) { +#ifdef MBED_DEBUG + // Configs to make debugging easier +#ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk + // Disable write buffer to make BusFaults (eg write to ROM via NULL pointer) precise. + // Possible on Cortex-M3 and M4, not on M0, M7 or M33. + // Would be less necessary if ROM was write-protected in MPU to give a + // precise MemManage exception. + SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk; +#endif +#endif mbed_copy_nvic(); mbed_sdk_init(); #if DEVICE_USTICKER && MBED_CONF_TARGET_INIT_US_TICKER_AT_BOOT diff --git a/rtos/source/TARGET_CORTEX/mbed_boot.c b/rtos/source/TARGET_CORTEX/mbed_boot.c index b4257f88db..d63e12c014 100644 --- a/rtos/source/TARGET_CORTEX/mbed_boot.c +++ b/rtos/source/TARGET_CORTEX/mbed_boot.c @@ -73,6 +73,16 @@ uint32_t mbed_stack_isr_size = 0; void mbed_init(void) { +#ifdef MBED_DEBUG + // Configs to make debugging easier +#ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk + // Disable write buffer to make BusFaults (eg write to ROM via NULL pointer) precise. + // Possible on Cortex-M3 and M4, not on M0, M7 or M33. + // Would be less necessary if ROM was write-protected in MPU to give a + // precise MemManage exception. + SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk; +#endif +#endif mbed_mpu_manager_init(); mbed_cpy_nvic(); mbed_sdk_init();