[NUCLEO_F030R8] add more channels for ADC

pull/275/head
dbestm 2014-04-23 13:58:59 +02:00
parent a519f94f35
commit c1354497e2
1 changed files with 43 additions and 3 deletions

View File

@ -37,10 +37,20 @@
static const PinMap PinMap_ADC[] = {
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN0
{PA_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN1
{PA_2, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN2
{PA_3, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN3
{PA_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN4
{PA_5, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN5
{PA_6, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN6
{PA_7, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN7
{PB_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN8
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN11
{PB_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN9
{PC_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN10
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN11
{PC_2, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN12
{PC_3, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN13
{PC_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN14
{PC_5, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN15
{NC, NC, 0}
};
@ -105,18 +115,48 @@ static inline uint16_t adc_read(analogin_t *obj) {
case PA_1:
ADC_ChannelConfig(adc, ADC_Channel_1, ADC_SampleTime_7_5Cycles);
break;
case PA_2:
ADC_ChannelConfig(adc, ADC_Channel_2, ADC_SampleTime_7_5Cycles);
break;
case PA_3:
ADC_ChannelConfig(adc, ADC_Channel_3, ADC_SampleTime_7_5Cycles);
break;
case PA_4:
ADC_ChannelConfig(adc, ADC_Channel_4, ADC_SampleTime_7_5Cycles);
break;
case PA_5:
ADC_ChannelConfig(adc, ADC_Channel_5, ADC_SampleTime_7_5Cycles);
break;
case PA_6:
ADC_ChannelConfig(adc, ADC_Channel_6, ADC_SampleTime_7_5Cycles);
break;
case PA_7:
ADC_ChannelConfig(adc, ADC_Channel_7, ADC_SampleTime_7_5Cycles);
break;
case PB_0:
ADC_ChannelConfig(adc, ADC_Channel_8, ADC_SampleTime_7_5Cycles);
break;
case PC_1:
ADC_ChannelConfig(adc, ADC_Channel_11, ADC_SampleTime_7_5Cycles);
case PB_1:
ADC_ChannelConfig(adc, ADC_Channel_9, ADC_SampleTime_7_5Cycles);
break;
case PC_0:
ADC_ChannelConfig(adc, ADC_Channel_10, ADC_SampleTime_7_5Cycles);
break;
case PC_1:
ADC_ChannelConfig(adc, ADC_Channel_11, ADC_SampleTime_7_5Cycles);
break;
case PC_2:
ADC_ChannelConfig(adc, ADC_Channel_12, ADC_SampleTime_7_5Cycles);
break;
case PC_3:
ADC_ChannelConfig(adc, ADC_Channel_13, ADC_SampleTime_7_5Cycles);
break;
case PC_4:
ADC_ChannelConfig(adc, ADC_Channel_14, ADC_SampleTime_7_5Cycles);
break;
case PC_5:
ADC_ChannelConfig(adc, ADC_Channel_15, ADC_SampleTime_7_5Cycles);
break;
default:
return 0;
}