From c0750de3184a8d05eb78af38f9fa610737f8cc54 Mon Sep 17 00:00:00 2001 From: deepikabhavnani Date: Wed, 23 Jan 2019 14:41:19 -0600 Subject: [PATCH] Armc6 - Set floating point and CPU options for all core variants explicitly Below are the options read from the toolchains/arm armclang --target=arm-arm-none-eabi -mcpu=list The following arguments to option 'mcpu' can be selected: -mcpu=cortex-m0 -mcpu=cortex-m0plus -mcpu=cortex-m1 -mcpu=cortex-m3 -mcpu=cortex-m4 -mcpu=cortex-m7 -mcpu=cortex-m23 -mcpu=cortex-m33 ... armlink --cpu=list The following arguments to option 'cpu' can be selected: --cpu=Cortex-M0 --cpu=Cortex-M0plus --cpu=Cortex-M1 --cpu=Cortex-M1.os_extension --cpu=Cortex-M1.no_os_extension --cpu=Cortex-M4 --cpu=Cortex-M4.no_fp --cpu=Cortex-M7 --cpu=Cortex-M7.fp.sp --cpu=Cortex-M7.no_fp --cpu=Cortex-M23 --cpu=Cortex-M33 --cpu=Cortex-M33.no_fp --cpu=Cortex-M33.no_dsp --cpu=Cortex-M33.no_dsp.no_fp ... armclang --target=arm-arm-none-eabi -mfpu=list The following arguments to option 'mfpu' can be selected: -mfpu=fpv4-sp-d16 -mfpu=fpv5-sp-d16 -mfpu=fpv5-d16 ... --- tools/toolchains/arm.py | 97 ++++++++++++++++++++--------------------- 1 file changed, 47 insertions(+), 50 deletions(-) diff --git a/tools/toolchains/arm.py b/tools/toolchains/arm.py index 5ff00cf240..25939e37ea 100644 --- a/tools/toolchains/arm.py +++ b/tools/toolchains/arm.py @@ -381,70 +381,67 @@ class ARMC6(ARM_STD): if not set(("ARM", "ARMC6")).intersection(set(target.supported_toolchains)): raise NotSupportedException("ARM/ARMC6 compiler support is required for ARMC6 build") - if target.core.lower().endswith("fd"): - self.flags['common'].append("-mcpu=%s" % target.core.lower()[:-2]) - self.flags['ld'].append("--cpu=%s" % target.core.lower()[:-2]) - self.SHEBANG += " -mcpu=%s" % target.core.lower()[:-2] - elif target.core.lower().endswith("fd-ns"): - self.flags['common'].append("-mcpu=%s" % target.core.lower()[:-5]) - self.flags['ld'].append("--cpu=%s" % target.core.lower()[:-5]) - self.SHEBANG += " -mcpu=%s" % target.core.lower()[:-5] - elif target.core.lower().endswith("f"): - self.flags['common'].append("-mcpu=%s" % target.core.lower()[:-1]) - self.flags['ld'].append("--cpu=%s" % target.core.lower()[:-1]) - self.SHEBANG += " -mcpu=%s" % target.core.lower()[:-1] - elif target.core.startswith("Cortex-M33"): - self.flags['common'].append("-mcpu=cortex-m33+nodsp") - self.flags['common'].append("-mfpu=none") - self.flags['ld'].append("--cpu=Cortex-M33.no_dsp.no_fp") - elif not target.core.startswith("Cortex-M23"): - self.flags['common'].append("-mcpu=%s" % target.core.lower()) - self.flags['ld'].append("--cpu=%s" % target.core.lower()) - self.SHEBANG += " -mcpu=%s" % target.core.lower() - - if target.core == "Cortex-M4F": - self.flags['common'].append("-mfpu=fpv4-sp-d16") - self.flags['common'].append("-mfloat-abi=hard") - elif target.core == "Cortex-M7F": - self.flags['common'].append("-mfpu=fpv5-sp-d16") - self.flags['common'].append("-mfloat-abi=hard") - elif target.core == "Cortex-M7FD": - self.flags['common'].append("-mfpu=fpv5-d16") - self.flags['common'].append("-mfloat-abi=hard") - elif target.core.startswith("Cortex-M23"): - self.flags['common'].append("-march=armv8-m.base") - elif target.core.startswith("Cortex-M33F"): - self.flags['common'].append("-mfpu=fpv5-sp-d16") - self.flags['common'].append("-mfloat-abi=hard") - + core = target.core if CORE_ARCH[target.core] == 8: - # Add linking time preprocessor macro DOMAIN_NS - if target.core.endswith("-NS"): - define_string = self.make_ld_define("DOMAIN_NS", "0x1") - self.flags["ld"].append(define_string) - else: - # Add secure build flag - self.flags['cxx'].append("-mcmse") - self.flags['c'].append("-mcmse") - if (not target.core.endswith("-NS")) and kwargs.get('build_dir', False): # Create Secure library build_dir = kwargs['build_dir'] secure_file = join(build_dir, "cmse_lib.o") self.flags["ld"] += ["--import_cmse_lib_out=%s" % secure_file] + # Add linking time preprocessor macro DOMAIN_NS + if target.core.endswith("-NS"): + define_string = self.make_ld_define("DOMAIN_NS", "0x1") + self.flags["ld"].append(define_string) + core = target.core[:-3] + else: + # Add secure build flag + self.flags['cxx'].append("-mcmse") + self.flags['c'].append("-mcmse") + + cpu = { + "Cortex-M0+": "cortex-m0plus", + "Cortex-M4F": "cortex-m4", + "Cortex-M7F": "cortex-m7", + "Cortex-M7FD": "cortex-m7", + "Cortex-M33": "cortex-m33+no_dsp+no_fp", + "Cortex-M33F": "cortex-m33+no_dsp", + "Cortex-M33FD": "cortex-m33"}.get(core, core) + + cpu = cpu.lower() + self.flags['common'].append("-mcpu=%s" % cpu) + self.SHEBANG += " -mcpu=%s" % cpu + + # FPU handling + if core == "Cortex-M4F": + self.flags['common'].append("-mfpu=fpv4-sp-d16") + self.flags['common'].append("-mfloat-abi=hard") + self.flags['ld'].append("--cpu=cortex-m4") + elif core == "Cortex-M7F": + self.flags['common'].append("-mfpu=fpv5-sp-d16") + self.flags['common'].append("-mfloat-abi=hard") + self.flags['ld'].append("--cpu=cortex-m7.fp.sp") + elif core == "Cortex-M7FD": + self.flags['common'].append("-mfpu=fpv5-d16") + self.flags['common'].append("-mfloat-abi=hard") + self.flags['ld'].append("--cpu=cortex-m7") + elif core == "Cortex-M33F": + self.flags['common'].append("-mfpu=fpv5-sp-d16") + self.flags['common'].append("-mfloat-abi=hard") + self.flags['ld'].append("--cpu=cortex-m33.no_dsp") + elif core == "Cortex-M33": + self.flags['ld'].append("--cpu=cortex-m33.no_dsp.no_fp") + else: + self.flags['ld'].append("--cpu=%s" % cpu) + asm_cpu = { "Cortex-M0+": "Cortex-M0", "Cortex-M4F": "Cortex-M4.fp", "Cortex-M7F": "Cortex-M7.fp.sp", "Cortex-M7FD": "Cortex-M7.fp.dp", - "Cortex-M23-NS": "Cortex-M23", "Cortex-M33": "Cortex-M33.no_dsp.no_fp", - "Cortex-M33-NS": "Cortex-M33.no_dsp.no_fp", "Cortex-M33F": "Cortex-M33.no_dsp", - "Cortex-M33F-NS": "Cortex-M33.no_dsp", - "Cortex-M33FD": "Cortex-M33", - "Cortex-M33FD-NS": "Cortex-M33"}.get(target.core, target.core) + "Cortex-M33FD": "Cortex-M33"}.get(core, core) self.flags['asm'].append("--cpu=%s" % asm_cpu)