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Merge pull request #3 from anangl/refactored_serial_api 

Refactored serial_api implementation.
pull/2261/head
Vincent Coubard 2016-07-25 15:10:07 +01:00 committed by GitHub
parent 5206addfd7 91bd396a08
commit c05272c642
4 changed files with 438 additions and 2064 deletions
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561
hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/sdk/drivers_nrf/hal/nrf_uarte.h
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/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_UARTE_H__
#define NRF_UARTE_H__
#include "nrf.h"
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#define NRF_UARTE_PSEL_DISCONNECTED 0xFFFFFFFF
/**
* @defgroup nrf_uarte_hal UARTE HAL
* @{
* @ingroup nrf_uart
*
* @brief Hardware access layer for accessing the UARTE peripheral.
*/
/**
* @enum nrf_uarte_task_t
* @brief UARTE tasks.
*/
typedef enum
{
/*lint -save -e30*/
NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX),///< Start UART receiver.
NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver.
NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX),///< Start UART transmitter.
NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter.
NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer.
/*lint -restore*/
} nrf_uarte_task_t;
/**
* @enum nrf_uarte_event_t
* @brief UARTE events.
*/
typedef enum
{
/*lint -save -e30*/
NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated.
NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated.
NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up.
NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted.
NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected.
NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout.
NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED),///< Receiver has started.
NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED),///< Transmitter has started.
NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped.
/*lint -restore*/
} nrf_uarte_event_t;
/**
* @brief Types of UARTE shortcuts.
*/
typedef enum
{
NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk,///< Shortcut between ENDRX event and STARTRX task.
NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk, ///< Shortcut between ENDRX event and STOPRX task.
} nrf_uarte_short_t;
/**
* @enum nrf_uarte_int_mask_t
* @brief UARTE interrupts.
*/
typedef enum
{
NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event.
NRF_UARTE_INT_NCTSRX_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event.
NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event.
NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event.
NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event.
NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk,///< Interrupt on RXSTARTED event.
NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk,///< Interrupt on TXSTARTED event.
NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event.
} nrf_uarte_int_mask_t;
/**
* @enum nrf_uarte_baudrate_t
* @brief Baudrates supported by UARTE.
*/
typedef enum
{
NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud.
NRF_UARTE_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud.
NRF_UARTE_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud.
NRF_UARTE_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud.
NRF_UARTE_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud.
NRF_UARTE_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud.
NRF_UARTE_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud.
NRF_UARTE_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud.
NRF_UARTE_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud.
NRF_UARTE_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud.
NRF_UARTE_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud.
NRF_UARTE_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud.
NRF_UARTE_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud.
NRF_UARTE_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud.
NRF_UARTE_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud.
NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud.
} nrf_uarte_baudrate_t;
/**
* @enum nrf_uarte_error_mask_t
* @brief Types of UARTE error masks.
*/
typedef enum
{
NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error.
NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error.
NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error.
NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk, ///< Break error.
} nrf_uarte_error_mask_t;
/**
* @enum nrf_uarte_parity_t
* @brief Types of UARTE parity modes.
*/
typedef enum
{
NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded.
NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos, ///< Parity included.
} nrf_uarte_parity_t;
/**
* @enum nrf_uarte_hwfc_t
* @brief Types of UARTE flow control modes.
*/
typedef enum
{
NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled.
NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control enabled.
} nrf_uarte_hwfc_t;
/**
* @brief Function for clearing a specific UARTE event.
*
* @param[in] p_reg UARTE instance.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
/**
* @brief Function for checking the state of a specific UARTE event.
*
* @param[in] p_reg UARTE instance.
* @param[in] event Event to check.
*
* @retval True if event is set, False otherwise.
*/
__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
/**
* @brief Function for returning the address of a specific UARTE event register.
*
* @param[in] p_reg UARTE instance.
* @param[in] event Desired event.
*
* @retval Address of specified event register.
*/
__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
nrf_uarte_event_t event);
/**
* @brief Function for enabling UARTE shortcuts.
*
* @param p_reg UARTE instance.
* @param shorts_mask Shortcuts to enable.
*/
__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
/**
* @brief Function for disabling UARTE shortcuts.
*
* @param p_reg UARTE instance.
* @param shorts_mask Shortcuts to disable.
*/
__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
/**
* @brief Function for enabling UARTE interrupts.
*
* @param p_reg Instance.
* @param int_mask Interrupts to enable.
*/
__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param p_reg Instance.
* @param int_mask Mask of interrupt to check.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask);
/**
* @brief Function for disabling specific interrupts.
*
* @param p_reg Instance.
* @param int_mask Interrupts to disable.
*/
__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
/**
* @brief Function for getting error source mask. Function is clearing error source flags after reading.
*
* @param p_reg Instance.
* @return Mask with error source flags.
*/
__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg);
/**
* @brief Function for enabling UARTE.
*
* @param p_reg Instance.
*/
__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg);
/**
* @brief Function for disabling UARTE.
*
* @param p_reg Instance.
*/
__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg);
/**
* @brief Function for configuring TX/RX pins.
*
* @param p_reg Instance.
* @param pseltxd TXD pin number.
* @param pselrxd RXD pin number.
*/
__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
/**
* @brief Function for disconnecting TX/RX pins.
*
* @param p_reg Instance.
*/
__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting TX pin.
*
* @param p_reg Instance.
*/
__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting RX pin.
*
* @param p_reg Instance.
*/
__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting RTS pin.
*
* @param p_reg Instance.
*/
__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting CTS pin.
*
* @param p_reg Instance.
*/
__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for configuring flow control pins.
*
* @param p_reg Instance.
* @param pselrts RTS pin number.
* @param pselcts CTS pin number.
*/
__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,
uint32_t pselrts,
uint32_t pselcts);
/**
* @brief Function for disconnecting flow control pins.
*
* @param p_reg Instance.
*/
__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg);
/**
* @brief Function for starting an UARTE task.
*
* @param p_reg Instance.
* @param task Task.
*/
__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
/**
* @brief Function for returning the address of a specific task register.
*
* @param p_reg Instance.
* @param task Task.
*
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
/**
* @brief Function for configuring UARTE.
*
* @param p_reg Instance.
* @param hwfc Hardware flow control. Enabled if true.
* @param parity Parity. Included if true.
*/
__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
nrf_uarte_parity_t parity,
nrf_uarte_hwfc_t hwfc);
/**
* @brief Function for setting UARTE baudrate.
*
* @param p_reg Instance.
* @param baudrate Baudrate.
*/
__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate);
/**
* @brief Function for setting the transmit buffer.
*
* @param[in] p_reg Instance.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t const * p_buffer,
uint8_t length);
/**
* @brief Function for getting number of bytes transmitted in the last transaction.
*
* @param[in] p_reg Instance.
*
* @retval Amount of bytes transmitted.
*/
__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for setting the receive buffer.
*
* @param[in] p_reg Instance.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t * p_buffer,
uint8_t length);
/**
* @brief Function for getting number of bytes received in the last transaction.
*
* @param[in] p_reg Instance.
*
* @retval Amount of bytes received.
*/
__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
}
__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
nrf_uarte_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
{
p_reg->SHORTS |= shorts_mask;
}
__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
{
p_reg->SHORTS &= ~(shorts_mask);
}
__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
{
p_reg->INTENSET = int_mask;
}
__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask)
{
return (bool)(p_reg->INTENSET & int_mask);
}
__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
{
p_reg->INTENCLR = int_mask;
}
__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg)
{
uint32_t errsrc_mask = p_reg->ERRORSRC;
p_reg->ERRORSRC = errsrc_mask;
return errsrc_mask;
}
__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg)
{
p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
}
__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg)
{
p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
}
__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd)
{
p_reg->PSEL.TXD = pseltxd;
p_reg->PSEL.RXD = pselrxd;
}
__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg)
{
nrf_uarte_txrx_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED);
}
__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg)
{
return p_reg->PSEL.TXD;
}
__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg)
{
return p_reg->PSEL.RXD;
}
__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg)
{
return p_reg->PSEL.RTS;
}
__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg)
{
return p_reg->PSEL.CTS;
}
__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, uint32_t pselrts, uint32_t pselcts)
{
p_reg->PSEL.RTS = pselrts;
p_reg->PSEL.CTS = pselcts;
}
__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg)
{
nrf_uarte_hwfc_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED);
}
__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task)
{
return (uint32_t)p_reg + (uint32_t)task;
}
__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
nrf_uarte_parity_t parity,
nrf_uarte_hwfc_t hwfc)
{
p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc;
}
__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate)
{
p_reg->BAUDRATE = baudrate;
}
__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t const * p_buffer,
uint8_t length)
{
p_reg->TXD.PTR = (uint32_t)p_buffer;
p_reg->TXD.MAXCNT = length;
}
__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg)
{
return p_reg->TXD.AMOUNT;
}
__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t * p_buffer,
uint8_t length)
{
p_reg->RXD.PTR = (uint32_t)p_buffer;
p_reg->RXD.MAXCNT = length;
}
__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg)
{
return p_reg->RXD.AMOUNT;
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#endif //NRF_UARTE_H__

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hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/sdk/drivers_nrf/uart/nrf_drv_uart.c
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/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "nrf_drv_uart.h"
#include "nrf_assert.h"
#include "nordic_common.h"
#include "nrf_drv_common.h"
#include "nrf_gpio.h"
#include "app_util_platform.h"
// This set of macros makes it possible to exclude parts of code, when one type
// of supported peripherals is not used.
#ifdef NRF51
#define UART_IN_USE
#elif defined(NRF52)
#if (UART_EASY_DMA_SUPPORT == 1)
#define UARTE_IN_USE
#endif
#if (UART_LEGACY_SUPPORT == 1)
#define UART_IN_USE
#endif
#endif
#if (defined(UARTE_IN_USE) && defined(UART_IN_USE))
// UARTE and UART combined
#define CODE_FOR_UARTE(code) if (m_cb.use_easy_dma) { code }
#define CODE_FOR_UART(code) else { code }
#elif (defined(UARTE_IN_USE) && !defined(UART_IN_USE))
// UARTE only
#define CODE_FOR_UARTE(code) { code }
#define CODE_FOR_UART(code)
#elif (!defined(UARTE_IN_USE) && defined(UART_IN_USE))
// UART only
#define CODE_FOR_UARTE(code)
#define CODE_FOR_UART(code) { code }
#else
#error "Wrong configuration."
#endif
#ifndef IS_EASY_DMA_RAM_ADDRESS
#define IS_EASY_DMA_RAM_ADDRESS(addr) (((uint32_t)addr & 0xFFFF0000) == 0x20000000)
#endif
#define TX_COUNTER_ABORT_REQ_VALUE 256
typedef struct
{
void * p_context;
nrf_uart_event_handler_t handler;
uint8_t const * p_tx_buffer;
uint8_t * p_rx_buffer;
uint8_t * p_rx_secondary_buffer;
volatile uint16_t tx_counter;
uint8_t tx_buffer_length;
uint8_t rx_buffer_length;
uint8_t rx_secondary_buffer_length;
volatile uint8_t rx_counter;
bool rx_enabled;
nrf_drv_state_t state;
#if (defined(UARTE_IN_USE) && defined(UART_IN_USE))
bool use_easy_dma;
#endif
} uart_control_block_t;
static uart_control_block_t m_cb;
static const nrf_drv_uart_config_t m_default_config = NRF_DRV_UART_DEFAULT_CONFIG;
__STATIC_INLINE void apply_config(nrf_drv_uart_config_t const * p_config)
{
nrf_gpio_pin_set(p_config->pseltxd);
nrf_gpio_cfg_output(p_config->pseltxd);
nrf_gpio_cfg_input(p_config->pselrxd, NRF_GPIO_PIN_NOPULL);
CODE_FOR_UARTE
(
nrf_uarte_baudrate_set(NRF_UARTE0, (nrf_uarte_baudrate_t)p_config->baudrate);
nrf_uarte_configure(NRF_UARTE0, (nrf_uarte_parity_t)p_config->parity,
(nrf_uarte_hwfc_t)p_config->hwfc);
nrf_uarte_txrx_pins_set(NRF_UARTE0, p_config->pseltxd, p_config->pselrxd);
if (p_config->hwfc == NRF_UART_HWFC_ENABLED)
{
nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL);
nrf_gpio_pin_set(p_config->pselrts);
nrf_gpio_cfg_output(p_config->pselrts);
nrf_uarte_hwfc_pins_set(NRF_UARTE0, p_config->pselrts, p_config->pselcts);
}
)
CODE_FOR_UART
(
nrf_uart_baudrate_set(NRF_UART0, p_config->baudrate);
nrf_uart_configure(NRF_UART0, p_config->parity, p_config->hwfc);
nrf_uart_txrx_pins_set(NRF_UART0, p_config->pseltxd, p_config->pselrxd);
if (p_config->hwfc == NRF_UART_HWFC_ENABLED)
{
nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL);
nrf_gpio_pin_set(p_config->pselrts);
nrf_gpio_cfg_output(p_config->pselrts);
nrf_uart_hwfc_pins_set(NRF_UART0, p_config->pselrts, p_config->pselcts);
}
)
}
__STATIC_INLINE void interrupts_enable(uint8_t interrupt_priority)
{
CODE_FOR_UARTE
(
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ENDRX);
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ENDTX);
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ERROR);
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_RXTO);
nrf_uarte_int_enable(NRF_UARTE0, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
NRF_UARTE_INT_RXTO_MASK);
)
CODE_FOR_UART
(
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_TXDRDY);
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_RXTO);
nrf_uart_int_enable(NRF_UART0, NRF_UART_INT_MASK_TXDRDY |
NRF_UART_INT_MASK_RXTO);
)
nrf_drv_common_irq_enable(UART0_IRQn, interrupt_priority);
}
__STATIC_INLINE void interrupts_disable(void)
{
CODE_FOR_UARTE
(
nrf_uarte_int_disable(NRF_UARTE0, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
NRF_UARTE_INT_RXTO_MASK);
)
CODE_FOR_UART
(
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY |
NRF_UART_INT_MASK_TXDRDY |
NRF_UART_INT_MASK_ERROR |
NRF_UART_INT_MASK_RXTO);
)
nrf_drv_common_irq_disable(UART0_IRQn);
}
__STATIC_INLINE void pins_to_default(void)
{
/* Reset pins to default states */
uint32_t txd;
uint32_t rxd;
uint32_t rts;
uint32_t cts;
CODE_FOR_UARTE
(
txd = nrf_uarte_tx_pin_get(NRF_UARTE0);
rxd = nrf_uarte_rx_pin_get(NRF_UARTE0);
rts = nrf_uarte_rts_pin_get(NRF_UARTE0);
cts = nrf_uarte_cts_pin_get(NRF_UARTE0);
nrf_uarte_txrx_pins_disconnect(NRF_UARTE0);
nrf_uarte_hwfc_pins_disconnect(NRF_UARTE0);
)
CODE_FOR_UART
(
txd = nrf_uart_tx_pin_get(NRF_UART0);
rxd = nrf_uart_rx_pin_get(NRF_UART0);
rts = nrf_uart_rts_pin_get(NRF_UART0);
cts = nrf_uart_cts_pin_get(NRF_UART0);
nrf_uart_txrx_pins_disconnect(NRF_UART0);
nrf_uart_hwfc_pins_disconnect(NRF_UART0);
)
nrf_gpio_cfg_default(txd);
nrf_gpio_cfg_default(rxd);
if (cts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_default(cts);
}
if (rts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_default(rts);
}
}
__STATIC_INLINE void uart_enable(void)
{
CODE_FOR_UARTE(nrf_uarte_enable(NRF_UARTE0);)
CODE_FOR_UART(nrf_uart_enable(NRF_UART0););
}
__STATIC_INLINE void uart_disable(void)
{
CODE_FOR_UARTE(nrf_uarte_disable(NRF_UARTE0);)
CODE_FOR_UART(nrf_uart_disable(NRF_UART0););
}
ret_code_t nrf_drv_uart_init(nrf_drv_uart_config_t const * p_config,
nrf_uart_event_handler_t event_handler)
{
if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED)
{
return NRF_ERROR_INVALID_STATE;
}
if (p_config == NULL)
{
p_config = &m_default_config;
}
#if (defined(UARTE_IN_USE) && defined(UART_IN_USE))
m_cb.use_easy_dma = p_config->use_easy_dma;
#endif
apply_config(p_config);
m_cb.handler = event_handler;
m_cb.p_context = p_config->p_context;
if (m_cb.handler)
{
interrupts_enable(p_config->interrupt_priority);
}
uart_enable();
m_cb.rx_buffer_length = 0;
m_cb.rx_secondary_buffer_length = 0;
m_cb.tx_buffer_length = 0;
m_cb.state = NRF_DRV_STATE_INITIALIZED;
m_cb.rx_enabled = false;
return NRF_SUCCESS;
}
void nrf_drv_uart_uninit(void)
{
uart_disable();
if (m_cb.handler)
{
interrupts_disable();
}
pins_to_default();
m_cb.state = NRF_DRV_STATE_UNINITIALIZED;
m_cb.handler = NULL;
}
#if defined(UART_IN_USE)
__STATIC_INLINE void tx_byte(void)
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_TXDRDY);
uint8_t txd = m_cb.p_tx_buffer[m_cb.tx_counter];
m_cb.tx_counter++;
nrf_uart_txd_set(NRF_UART0, txd);
}
__STATIC_INLINE ret_code_t nrf_drv_uart_tx_for_uart()
{
ret_code_t err_code = NRF_SUCCESS;
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_TXDRDY);
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STARTTX);
tx_byte();
if (m_cb.handler == NULL)
{
while (m_cb.tx_counter < (uint16_t) m_cb.tx_buffer_length)
{
while (!nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY) &&
m_cb.tx_counter != TX_COUNTER_ABORT_REQ_VALUE)
{
}
if (m_cb.tx_counter != TX_COUNTER_ABORT_REQ_VALUE)
{
tx_byte();
}
}
if (m_cb.tx_counter == TX_COUNTER_ABORT_REQ_VALUE)
{
err_code = NRF_ERROR_FORBIDDEN;
}
else
{
while (!nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY))
{
}
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPTX);
}
m_cb.tx_buffer_length = 0;
}
return err_code;
}
#endif
#if defined(UARTE_IN_USE)
__STATIC_INLINE ret_code_t nrf_drv_uart_tx_for_uarte()
{
ret_code_t err_code = NRF_SUCCESS;
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ENDTX);
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_tx_buffer_set(NRF_UARTE0, m_cb.p_tx_buffer, m_cb.tx_buffer_length);
nrf_uarte_task_trigger(NRF_UARTE0, NRF_UARTE_TASK_STARTTX);
if (m_cb.handler == NULL)
{
bool endtx;
bool txstopped;
do
{
endtx = nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_ENDTX);
txstopped = nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_TXSTOPPED);
}
while ((!endtx) && (!txstopped));
if (txstopped)
{
err_code = NRF_ERROR_FORBIDDEN;
}
m_cb.tx_buffer_length = 0;
}
return err_code;
}
#endif
ret_code_t nrf_drv_uart_tx(uint8_t const * const p_data, uint8_t length)
{
ASSERT(m_cb.state == NRF_DRV_STATE_INITIALIZED);
ASSERT(length>0);
ASSERT(p_data);
CODE_FOR_UARTE
(
// EasyDMA requires that transfer buffers are placed in DataRAM,
// signal error if the are not.
if (!IS_EASY_DMA_RAM_ADDRESS(p_data))
{
return NRF_ERROR_INVALID_ADDR;
}
)
if (nrf_drv_uart_tx_in_progress())
{
return NRF_ERROR_BUSY;
}
m_cb.tx_buffer_length = length;
m_cb.p_tx_buffer = p_data;
m_cb.tx_counter = 0;
CODE_FOR_UARTE
(
return nrf_drv_uart_tx_for_uarte();
)
CODE_FOR_UART
(
return nrf_drv_uart_tx_for_uart();
)
}
bool nrf_drv_uart_tx_in_progress(void)
{
return (m_cb.tx_buffer_length != 0);
}
#if defined(UART_IN_USE)
__STATIC_INLINE void rx_enable(void)
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_ERROR);
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_RXDRDY);
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STARTRX);
}
__STATIC_INLINE void rx_byte(void)
{
if (!m_cb.rx_buffer_length)
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_RXDRDY);
// Byte received when buffer is not set - data lost.
(void) nrf_uart_rxd_get(NRF_UART0);
return;
}
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_RXDRDY);
m_cb.p_rx_buffer[m_cb.rx_counter] = nrf_uart_rxd_get(NRF_UART0);
m_cb.rx_counter++;
}
__STATIC_INLINE ret_code_t nrf_drv_uart_rx_for_uart(uint8_t * p_data, uint8_t length, bool second_buffer)
{
if ((!m_cb.rx_enabled) && (!second_buffer))
{
rx_enable();
}
if (m_cb.handler == NULL)
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_RXTO);
bool rxrdy;
bool rxto;
bool error;
do
{
do
{
error = nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_ERROR);
rxrdy = nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXDRDY);
rxto = nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXTO);
} while ((!rxrdy) && (!rxto) && (!error));
if (error || rxto)
{
break;
}
rx_byte();
} while (m_cb.rx_buffer_length > m_cb.rx_counter);
m_cb.rx_buffer_length = 0;
if (error)
{
return NRF_ERROR_INTERNAL;
}
if (rxto)
{
return NRF_ERROR_FORBIDDEN;
}
if (m_cb.rx_enabled)
{
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STARTRX);
}
else
{
// Skip stopping RX if driver is forced to be enabled.
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPRX);
}
}
else
{
nrf_uart_int_enable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
}
return NRF_SUCCESS;
}
#endif
#if defined(UARTE_IN_USE)
__STATIC_INLINE ret_code_t nrf_drv_uart_rx_for_uarte(uint8_t * p_data, uint8_t length, bool second_buffer)
{
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ENDRX);
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_RXTO);
nrf_uarte_rx_buffer_set(NRF_UARTE0, p_data, length);
if (!second_buffer)
{
nrf_uarte_task_trigger(NRF_UARTE0, NRF_UARTE_TASK_STARTRX);
}
else
{
nrf_uarte_shorts_enable(NRF_UARTE0, NRF_UARTE_SHORT_ENDRX_STARTRX);
}
if (m_cb.handler == NULL)
{
bool endrx;
bool rxto;
bool error;
do {
endrx = nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_ENDRX);
rxto = nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_RXTO);
error = nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_ERROR);
}while ((!endrx) && (!rxto) && (!error));
m_cb.rx_buffer_length = 0;
if (error)
{
return NRF_ERROR_INTERNAL;
}
if (rxto)
{
return NRF_ERROR_FORBIDDEN;
}
}
else
{
nrf_uarte_int_enable(NRF_UARTE0, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK);
}
return NRF_SUCCESS;
}
#endif
ret_code_t nrf_drv_uart_rx(uint8_t * p_data, uint8_t length)
{
ASSERT(m_cb.state == NRF_DRV_STATE_INITIALIZED);
ASSERT(length>0);
CODE_FOR_UARTE
(
// EasyDMA requires that transfer buffers are placed in DataRAM,
// signal error if the are not.
if (!IS_EASY_DMA_RAM_ADDRESS(p_data))
{
return NRF_ERROR_INVALID_ADDR;
}
)
bool second_buffer = false;
if (m_cb.handler)
{
CODE_FOR_UARTE
(
nrf_uarte_int_disable(NRF_UARTE0, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK);
)
CODE_FOR_UART
(
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
)
}
if (m_cb.rx_buffer_length != 0)
{
if (m_cb.rx_secondary_buffer_length != 0)
{
if (m_cb.handler)
{
CODE_FOR_UARTE
(
nrf_uarte_int_enable(NRF_UARTE0, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK);
)
CODE_FOR_UART
(
nrf_uart_int_enable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
)
}
return NRF_ERROR_BUSY;
}
second_buffer = true;
}
if (!second_buffer)
{
m_cb.rx_buffer_length = length;
m_cb.p_rx_buffer = p_data;
m_cb.rx_counter = 0;
m_cb.rx_secondary_buffer_length = 0;
}
else
{
m_cb.p_rx_secondary_buffer = p_data;
m_cb.rx_secondary_buffer_length = length;
}
CODE_FOR_UARTE
(
return nrf_drv_uart_rx_for_uarte(p_data, length, second_buffer);
)
CODE_FOR_UART
(
return nrf_drv_uart_rx_for_uart(p_data, length, second_buffer);
)
}
void nrf_drv_uart_rx_enable(void)
{
//Easy dma mode does not support enabling receiver without setting up buffer.
CODE_FOR_UARTE
(
ASSERT(false);
)
CODE_FOR_UART
(
if (!m_cb.rx_enabled)
{
rx_enable();
m_cb.rx_enabled = true;
}
)
}
void nrf_drv_uart_rx_disable(void)
{
//Easy dma mode does not support enabling receiver without setting up buffer.
CODE_FOR_UARTE
(
ASSERT(false);
)
CODE_FOR_UART
(
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPRX);
m_cb.rx_enabled = false;
)
}
uint32_t nrf_drv_uart_errorsrc_get(void)
{
uint32_t errsrc;
CODE_FOR_UARTE
(
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ERROR);
errsrc = nrf_uarte_errorsrc_get_and_clear(NRF_UARTE0);
)
CODE_FOR_UART
(
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_ERROR);
errsrc = nrf_uart_errorsrc_get_and_clear(NRF_UART0);
)
return errsrc;
}
__STATIC_INLINE void rx_done_event(uint8_t bytes, uint8_t * p_data)
{
nrf_drv_uart_event_t event;
event.type = NRF_DRV_UART_EVT_RX_DONE;
event.data.rxtx.bytes = bytes;
event.data.rxtx.p_data = p_data;
m_cb.handler(&event,m_cb.p_context);
}
__STATIC_INLINE void tx_done_event(uint8_t bytes)
{
nrf_drv_uart_event_t event;
event.type = NRF_DRV_UART_EVT_TX_DONE;
event.data.rxtx.bytes = bytes;
event.data.rxtx.p_data = (uint8_t *)m_cb.p_tx_buffer;
m_cb.tx_buffer_length = 0;
m_cb.handler(&event,m_cb.p_context);
}
void nrf_drv_uart_tx_abort(void)
{
CODE_FOR_UARTE
(
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_task_trigger(NRF_UARTE0, NRF_UARTE_TASK_STOPTX);
if (m_cb.handler == NULL)
{
while(!nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_TXSTOPPED));
}
)
CODE_FOR_UART
(
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPTX);
if (m_cb.handler)
{
tx_done_event(m_cb.tx_counter);
}
else
{
m_cb.tx_counter = TX_COUNTER_ABORT_REQ_VALUE;
}
)
}
void nrf_drv_uart_rx_abort(void)
{
CODE_FOR_UARTE
(
nrf_uarte_task_trigger(NRF_UARTE0, NRF_UARTE_TASK_STOPRX);
)
CODE_FOR_UART
(
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPRX);
)
}
#if defined(UART_IN_USE)
__STATIC_INLINE void uart_irq_handler()
{
if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_ERROR) &&
nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_ERROR))
{
nrf_drv_uart_event_t event;
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_ERROR);
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
if (!m_cb.rx_enabled)
{
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPRX);
}
event.type = NRF_DRV_UART_EVT_ERROR;
event.data.error.error_mask = nrf_uart_errorsrc_get_and_clear(NRF_UART0);
event.data.error.rxtx.bytes = m_cb.rx_buffer_length;
event.data.error.rxtx.p_data = m_cb.p_rx_buffer;
//abort transfer
m_cb.rx_buffer_length = 0;
m_cb.rx_secondary_buffer_length = 0;
m_cb.handler(&event,m_cb.p_context);
}
else if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_RXDRDY) &&
nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXDRDY))
{
rx_byte();
if (m_cb.rx_buffer_length == m_cb.rx_counter)
{
if (m_cb.rx_secondary_buffer_length)
{
uint8_t * p_data = m_cb.p_rx_buffer;
uint8_t rx_counter = m_cb.rx_counter;
//Switch to secondary buffer.
m_cb.rx_buffer_length = m_cb.rx_secondary_buffer_length;
m_cb.p_rx_buffer = m_cb.p_rx_secondary_buffer;
m_cb.rx_secondary_buffer_length = 0;
m_cb.rx_counter = 0;
rx_done_event(rx_counter, p_data);
}
else
{
if (!m_cb.rx_enabled)
{
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STOPRX);
}
nrf_uart_int_disable(NRF_UART0, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
m_cb.rx_buffer_length = 0;
rx_done_event(m_cb.rx_counter, m_cb.p_rx_buffer);
}
}
}
if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_TXDRDY) &&
nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY))
{
if (m_cb.tx_counter < (uint16_t) m_cb.tx_buffer_length)
{
tx_byte();
}
else
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_TXDRDY);
if (m_cb.tx_buffer_length)
{
tx_done_event(m_cb.tx_buffer_length);
}
}
}
if (nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXTO))
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_RXTO);
// RXTO event may be triggered as a result of abort call. In th
if (m_cb.rx_enabled)
{
nrf_uart_task_trigger(NRF_UART0, NRF_UART_TASK_STARTRX);
}
if (m_cb.rx_buffer_length)
{
m_cb.rx_buffer_length = 0;
rx_done_event(m_cb.rx_counter, m_cb.p_rx_buffer);
}
}
}
#endif
#if defined(UARTE_IN_USE)
__STATIC_INLINE void uarte_irq_handler()
{
if (nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_ERROR))
{
nrf_drv_uart_event_t event;
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ERROR);
event.type = NRF_DRV_UART_EVT_ERROR;
event.data.error.error_mask = nrf_uarte_errorsrc_get_and_clear(NRF_UARTE0);
event.data.error.rxtx.bytes = nrf_uarte_rx_amount_get(NRF_UARTE0);
event.data.error.rxtx.p_data = m_cb.p_rx_buffer;
//abort transfer
m_cb.rx_buffer_length = 0;
m_cb.rx_secondary_buffer_length = 0;
m_cb.handler(&event,m_cb.p_context);
}
else if (nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_ENDRX))
{
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ENDRX);
uint8_t amount = nrf_uarte_rx_amount_get(NRF_UARTE0);
// If the transfer was stopped before completion, amount of transfered bytes
// will not be equal to the buffer length. Interrupted trunsfer is ignored.
if (amount == m_cb.rx_buffer_length)
{
if (m_cb.rx_secondary_buffer_length)
{
uint8_t * p_data = m_cb.p_rx_buffer;
nrf_uarte_shorts_disable(NRF_UARTE0, NRF_UARTE_SHORT_ENDRX_STARTRX);
m_cb.rx_buffer_length = m_cb.rx_secondary_buffer_length;
m_cb.p_rx_buffer = m_cb.p_rx_secondary_buffer;
m_cb.rx_secondary_buffer_length = 0;
rx_done_event(amount, p_data);
}
else
{
m_cb.rx_buffer_length = 0;
rx_done_event(amount, m_cb.p_rx_buffer);
}
}
}
if (nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_RXTO))
{
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_RXTO);
if (m_cb.rx_buffer_length)
{
m_cb.rx_buffer_length = 0;
rx_done_event(nrf_uarte_rx_amount_get(NRF_UARTE0), m_cb.p_rx_buffer);
}
}
if (nrf_uarte_event_check(NRF_UARTE0, NRF_UARTE_EVENT_ENDTX))
{
nrf_uarte_event_clear(NRF_UARTE0, NRF_UARTE_EVENT_ENDTX);
if (m_cb.tx_buffer_length)
{
tx_done_event(nrf_uarte_tx_amount_get(NRF_UARTE0));
}
}
}
#endif
void UART0_IRQHandler(void)
{
CODE_FOR_UARTE
(
uarte_irq_handler();
)
CODE_FOR_UART
(
uart_irq_handler();
)
}

320
hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/sdk/drivers_nrf/uart/nrf_drv_uart.h
View File

@ -1,320 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**@file
* @addtogroup nrf_uart UART driver and HAL
* @ingroup nrf_drivers
* @brief UART API.
* @details The UART driver provides APIs for utilizing the UART peripheral.
*
* @defgroup nrf_drv_uart UART driver
* @{
* @ingroup nrf_uart
*
* @brief UART driver.
*/
#ifndef NRF_DRV_UART_H
#define NRF_DRV_UART_H
#include "nrf_uart.h"
#ifdef NRF52
#include "nrf_uarte.h"
#endif
#include "sdk_errors.h"
#include "nrf_drv_config.h"
/**
* @brief Types of UART driver events.
*/
typedef enum
{
NRF_DRV_UART_EVT_TX_DONE, ///< Requested TX transfer completed.
NRF_DRV_UART_EVT_RX_DONE, ///< Requested RX transfer completed.
NRF_DRV_UART_EVT_ERROR, ///< Error reported by UART peripheral.
} nrf_drv_uart_evt_type_t;
/**@brief Structure for UART configuration. */
typedef struct
{
uint32_t pseltxd; ///< TXD pin number.
uint32_t pselrxd; ///< RXD pin number.
uint32_t pselcts; ///< CTS pin number.
uint32_t pselrts; ///< RTS pin number.
void * p_context; ///< Context passed to interrupt handler.
nrf_uart_hwfc_t hwfc; ///< Flow control configuration.
nrf_uart_parity_t parity; ///< Parity configuration.
nrf_uart_baudrate_t baudrate; ///< Baudrate.
uint8_t interrupt_priority; ///< Interrupt priority.
#ifdef NRF52
bool use_easy_dma;
#endif
} nrf_drv_uart_config_t;
/**@brief UART default configuration. */
#ifdef NRF52
#if !UART_LEGACY_SUPPORT
#define DEFAULT_CONFIG_USE_EASY_DMA true
#elif !UART_EASY_DMA_SUPPORT
#define DEFAULT_CONFIG_USE_EASY_DMA false
#else
#define DEFAULT_CONFIG_USE_EASY_DMA UART0_CONFIG_USE_EASY_DMA
#endif
#define NRF_DRV_UART_DEFAULT_CONFIG \
{ \
.pseltxd = UART0_CONFIG_PSEL_TXD, \
.pselrxd = UART0_CONFIG_PSEL_RXD, \
.pselcts = UART0_CONFIG_PSEL_CTS, \
.pselrts = UART0_CONFIG_PSEL_RTS, \
.p_context = NULL, \
.hwfc = UART0_CONFIG_HWFC, \
.parity = UART0_CONFIG_PARITY, \
.baudrate = UART0_CONFIG_BAUDRATE, \
.interrupt_priority = UART0_CONFIG_IRQ_PRIORITY, \
.use_easy_dma = DEFAULT_CONFIG_USE_EASY_DMA \
}
#else
#define NRF_DRV_UART_DEFAULT_CONFIG \
{ \
.pseltxd = UART0_CONFIG_PSEL_TXD, \
.pselrxd = UART0_CONFIG_PSEL_RXD, \
.pselcts = UART0_CONFIG_PSEL_CTS, \
.pselrts = UART0_CONFIG_PSEL_RTS, \
.p_context = NULL, \
.hwfc = UART0_CONFIG_HWFC, \
.parity = UART0_CONFIG_PARITY, \
.baudrate = UART0_CONFIG_BAUDRATE, \
.interrupt_priority = UART0_CONFIG_IRQ_PRIORITY \
}
#endif
/**@brief Structure for UART transfer completion event. */
typedef struct
{
uint8_t * p_data; ///< Pointer to memory used for transfer.
uint8_t bytes; ///< Number of bytes transfered.
} nrf_drv_uart_xfer_evt_t;
/**@brief Structure for UART error event. */
typedef struct
{
nrf_drv_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transfered.
uint32_t error_mask;///< Mask of error flags that generated the event.
} nrf_drv_uart_error_evt_t;
/**@brief Structure for UART event. */
typedef struct
{
nrf_drv_uart_evt_type_t type; ///< Event type.
union
{
nrf_drv_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events.
nrf_drv_uart_error_evt_t error;///< Data provided for error event.
} data;
} nrf_drv_uart_event_t;
/**
* @brief UART interrupt event handler.
*
* @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
* only within the context of the event handler.
* @param[in] p_context Context passed to interrupt handler, set on initialization.
*/
typedef void (*nrf_uart_event_handler_t)(nrf_drv_uart_event_t * p_event, void * p_context);
/**
* @brief Function for initializing the UART driver.
*
* This function configures and enables UART. After this function GPIO pins are controlled by UART.
*
* @param[in] p_config Initial configuration. Default configuration used if NULL.
* @param[in] event_handler Event handler provided by the user. If not provided driver works in
* blocking mode.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_INVALID_STATE If driver is already initialized.
*/
ret_code_t nrf_drv_uart_init(nrf_drv_uart_config_t const * p_config,
nrf_uart_event_handler_t event_handler);
/**
* @brief Function for uninitializing the UART driver.
*/
void nrf_drv_uart_uninit(void);
/**
* @brief Function for getting the address of a specific UART task.
*
* @param[in] task Task.
*
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_uart_task_t task);
/**
* @brief Function for getting the address of a specific UART event.
*
* @param[in] event Event.
*
* @return Event address.
*/
__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_uart_event_t event);
/**
* @brief Function for sending data over UART.
*
* If an event handler was provided in nrf_drv_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
*
* @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers
* are placed in the Data RAM region. If they are not and UARTE instance is
* used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
*
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to send.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_BUSY If driver is already transferring.
* @retval NRF_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only, also see @ref nrf_drv_uart_rx_disable).
* @retval NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only).
*/
ret_code_t nrf_drv_uart_tx(uint8_t const * const p_data, uint8_t length);
/**
* @brief Function for checking if UART is currently transmitting.
*
* @retval true If UART is transmitting.
* @retval false If UART is not transmitting.
*/
bool nrf_drv_uart_tx_in_progress(void);
/**
* @brief Function for aborting any ongoing transmission.
* @note @ref NRF_DRV_UART_EVT_TX_DONE event will be generated in non-blocking mode. Event will
* contain number of bytes sent until abort was called. If Easy DMA is not used event will be
* called from the function context. If Easy DMA is used it will be called from UART interrupt
* context.
*/
void nrf_drv_uart_tx_abort(void);
/**
* @brief Function for receiving data over UART.
*
* If an event handler was provided in the nrf_drv_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
* The receive buffer pointer is double buffered in non-blocking mode. The secondary
* buffer can be set immediately after starting the transfer and will be filled
* when the primary buffer is full. The double buffering feature allows
* receiving data continuously.
*
* @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers
* are placed in the Data RAM region. If they are not and UARTE instance is
* used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to receive.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_BUSY If the driver is already receiving
* (and the secondary buffer has already been set
* in non-blocking mode).
* @retval NRF_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only, also see @ref nrf_drv_uart_rx_disable).
* @retval NRF_ERROR_INTERNAL If UART peripheral reported an error.
* @retval NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only).
*/
ret_code_t nrf_drv_uart_rx(uint8_t * p_data, uint8_t length);
/**
* @brief Function for enabling receiver.
*
* UART has 6 byte long RX FIFO and it will be used to store incoming data. If user will not call
* UART receive function before FIFO is filled, overrun error will encounter. Enabling receiver
* without specifying RX buffer is supported only in UART mode (without Easy DMA). Receiver must be
* explicitly closed by the user @sa nrf_drv_uart_rx_disable. Function asserts if mode is wrong.
*/
void nrf_drv_uart_rx_enable(void);
/**
* @brief Function for disabling receiver.
*
* Function must be called to close the receiver after it has been explicitly enabled by
* @sa nrf_drv_uart_rx_enable. Feature is supported only in UART mode (without Easy DMA). Function
* asserts if mode is wrong.
*/
void nrf_drv_uart_rx_disable(void);
/**
* @brief Function for aborting any ongoing reception.
* @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. Event will
* contain number of bytes received until abort was called. If Easy DMA is not used event will be
* called from the function context. If Easy DMA is used it will be called from UART interrupt
* context.
*/
void nrf_drv_uart_rx_abort(void);
/**
* @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t.
* @note Function should be used in blocking mode only. In case of non-blocking mode error event is
* generated. Function clears error sources after reading.
*
* @retval Mask of reported errors.
*/
uint32_t nrf_drv_uart_errorsrc_get(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_uart_task_t task)
{
return nrf_uart_task_address_get(NRF_UART0, task);
}
__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_uart_event_t event)
{
return nrf_uart_event_address_get(NRF_UART0, event);
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
#endif //NRF_DRV_UART_H
/** @} */

742
hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/serial_api.c
View File

@ -36,51 +36,302 @@
*
*/
#include <string.h>
#include "mbed_assert.h"
#include "mbed_error.h"
#include "serial_api.h"
#include "nrf_drv_uart.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
#if DEVICE_SERIAL
#if DEVICE_SERIAL_ASYNCH
#define SERIAL_S(obj) (&obj->serial)
#else
#define SERIAL_S(obj) (obj)
#endif
#include <string.h>
#include "mbed_assert.h"
#include "mbed_error.h"
#include "nrf_uart.h"
#include "nrf_drv_common.h"
#include "nrf_drv_config.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
#define UART_INSTANCE_COUNT 1
#define UART_INSTANCE NRF_UART0
#define UART_INSTANCE_ID 0
#define UART_IRQn UART0_IRQn
#define UART_INSTANCE_COUNT 1
#define UART_INSTANCE NRF_UART0
#define UART_IRQn UART0_IRQn
#define UART_IRQ_HANDLER UART0_IRQHandler
#define UART_INSTANCE_ID 0
#define UART_CB uart_cb[UART_INSTANCE_ID]
#define UART_DEFAULT_BAUDRATE UART0_CONFIG_BAUDRATE
#define UART_DEFAULT_PARITY UART0_CONFIG_PARITY
#define UART_DEFAULT_HWFC UART0_CONFIG_HWFC
#define UART_DEFAULT_CTS UART0_CONFIG_PSEL_CTS
#define UART_DEFAULT_RTS UART0_CONFIG_PSEL_RTS
// Required by "retarget.cpp".
int stdio_uart_inited = 0;
serial_t stdio_uart;
static nrf_drv_uart_config_t uart_config = NRF_DRV_UART_DEFAULT_CONFIG;
typedef struct {
volatile bool tx_active;
volatile bool rx_active;
bool async_mode;
bool initialized;
uint8_t irqs_enabled;
uint32_t irq_context;
uart_irq_handler irq_handler;
uint32_t registered_events;
uint32_t event_flags;
void (*async_handler)();
uint8_t *rx_buffer;
uint8_t rx_pos;
uint8_t rx_length;
bool initialized;
uint32_t irq_context;
uart_irq_handler irq_handler;
uint32_t pselrxd;
uint32_t pseltxd;
uint32_t pselcts;
uint32_t pselrts;
nrf_uart_hwfc_t hwfc;
nrf_uart_parity_t parity;
nrf_uart_baudrate_t baudrate;
#if DEVICE_SERIAL_ASYNCH
bool volatile rx_active;
uint8_t *rx_buffer;
size_t rx_length;
size_t rx_pos;
void (*rx_asynch_handler)();
uint8_t char_match;
bool volatile tx_active;
const uint8_t *tx_buffer;
size_t tx_length;
size_t tx_pos;
void (*tx_asynch_handler)();
uint32_t events_wanted;
uint32_t events_occured;
#define UART_IRQ_TX 1
#define UART_IRQ_RX 2
uint8_t irq_enabled;
#endif // DEVICE_SERIAL_ASYNCH
} uart_ctlblock_t;
static uart_ctlblock_t uart_cb[UART_INSTANCE_COUNT];
#if DEVICE_SERIAL_ASYNCH
static void end_asynch_rx(void)
{
// If RX interrupt is activated for synchronous operations,
// don't disable it, just stop handling it here.
if (!(UART_CB.irq_enabled & UART_IRQ_RX)) {
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY);
}
UART_CB.rx_active = false;
}
static void end_asynch_tx(void)
{
// If TX interrupt is activated for synchronous operations,
// don't disable it, just stop handling it here.
if (!(UART_CB.irq_enabled & UART_IRQ_TX)) {
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
}
UART_CB.tx_active = false;
}
#endif // DEVICE_SERIAL_ASYNCH
void UART_IRQ_HANDLER(void)
{
if (nrf_uart_int_enable_check(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY) &&
nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY)) {
#if DEVICE_SERIAL_ASYNCH
if (UART_CB.rx_active) {
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
uint8_t rx_data = nrf_uart_rxd_get(UART_INSTANCE);
UART_CB.rx_buffer[UART_CB.rx_pos] = rx_data;
bool end_rx = false;
// If character matching should be performed, check if the current
// data matches the given one.
if (UART_CB.char_match != SERIAL_RESERVED_CHAR_MATCH &&
rx_data == UART_CB.char_match) {
// If it does, report the match and abort further receiving.
UART_CB.events_occured |= SERIAL_EVENT_RX_CHARACTER_MATCH;
if (UART_CB.events_wanted & SERIAL_EVENT_RX_CHARACTER_MATCH) {
end_rx = true;
}
}
if (++UART_CB.rx_pos >= UART_CB.rx_length) {
UART_CB.events_occured |= SERIAL_EVENT_RX_COMPLETE;
end_rx = true;
}
if (end_rx) {
end_asynch_rx();
if (UART_CB.rx_asynch_handler) {
// Use local variable to make it possible to start a next
// transfer from callback routine.
void (*handler)() = UART_CB.rx_asynch_handler;
UART_CB.rx_asynch_handler = NULL;
handler();
}
}
}
else
#endif
if (UART_CB.irq_handler) {
UART_CB.irq_handler(UART_CB.irq_context, RxIrq);
}
}
if (nrf_uart_int_enable_check(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY) &&
nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY)) {
#if DEVICE_SERIAL_ASYNCH
if (UART_CB.tx_active) {
if (++UART_CB.tx_pos <= UART_CB.tx_length) {
// When there is still something to send, clear the TXDRDY event
// and put next byte to transmitter.
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
nrf_uart_txd_set(UART_INSTANCE,
UART_CB.tx_buffer[UART_CB.tx_pos]);
}
else {
// When the TXDRDY event is set after the last byte to be sent
// has been passed to the transmitter, the job is done and TX
// complete can be indicated.
// Don't clear the TXDRDY event, it needs to remain set for the
// 'serial_writable' function to work properly.
end_asynch_tx();
UART_CB.events_occured |= SERIAL_EVENT_TX_COMPLETE;
if (UART_CB.tx_asynch_handler) {
// Use local variable to make it possible to start a next
// transfer from callback routine.
void (*handler)() = UART_CB.tx_asynch_handler;
UART_CB.tx_asynch_handler = NULL;
handler();
}
}
}
else
#endif
if (UART_CB.irq_handler) {
UART_CB.irq_handler(UART_CB.irq_context, TxIrq);
}
}
#if DEVICE_SERIAL_ASYNCH
if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_ERROR)) {
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
uint8_t errorsrc = nrf_uart_errorsrc_get_and_clear(UART_INSTANCE);
if (UART_CB.rx_asynch_handler) {
UART_CB.events_occured |= SERIAL_EVENT_ERROR;
if (errorsrc & NRF_UART_ERROR_PARITY_MASK) {
UART_CB.events_occured |= SERIAL_EVENT_RX_PARITY_ERROR;
}
if (errorsrc & NRF_UART_ERROR_FRAMING_MASK) {
UART_CB.events_occured |= SERIAL_EVENT_RX_FRAMING_ERROR;
}
if (errorsrc & NRF_UART_ERROR_OVERRUN_MASK) {
UART_CB.events_occured |= SERIAL_EVENT_RX_OVERRUN_ERROR;
}
UART_CB.rx_asynch_handler();
}
}
#endif // DEVICE_SERIAL_ASYNCH
}
void serial_init(serial_t *obj, PinName tx, PinName rx) {
UART_CB.pseltxd =
(tx == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)tx;
UART_CB.pselrxd =
(rx == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)rx;
if (UART_CB.pseltxd != NRF_UART_PSEL_DISCONNECTED) {
nrf_gpio_pin_set(UART_CB.pseltxd);
nrf_gpio_cfg_output(UART_CB.pseltxd);
}
if (UART_CB.pselrxd != NRF_UART_PSEL_DISCONNECTED) {
nrf_gpio_cfg_input(UART_CB.pselrxd, NRF_GPIO_PIN_NOPULL);
}
// UART pins must only be configured when the peripheral is disabled.
nrf_uart_disable(UART_INSTANCE);
if (UART_CB.initialized) {
// Reconfigure RX/TX pins only.
nrf_uart_txrx_pins_set(UART_INSTANCE, UART_CB.pseltxd, UART_CB.pselrxd);
nrf_uart_enable(UART_INSTANCE);
}
else {
UART_CB.baudrate = UART_DEFAULT_BAUDRATE;
UART_CB.parity = UART_DEFAULT_PARITY;
UART_CB.hwfc = UART_DEFAULT_HWFC;
UART_CB.pselcts = UART_DEFAULT_CTS;
UART_CB.pselrts = UART_DEFAULT_RTS;
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY |
NRF_UART_INT_MASK_TXDRDY);
#if DEVICE_SERIAL_ASYNCH
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_ERROR);
#endif
nrf_drv_common_irq_enable(UART_IRQn, APP_IRQ_PRIORITY_LOW);
// TX interrupt needs to be signaled when transmitter buffer is empty,
// so a dummy transmission is needed to get the TXDRDY event initially
// set.
nrf_uart_configure(UART_INSTANCE,
NRF_UART_PARITY_EXCLUDED, NRF_UART_HWFC_DISABLED);
// Use maximum baud rate, so this dummy transmission takes as little
// time as possible.
nrf_uart_baudrate_set(UART_INSTANCE, NRF_UART_BAUDRATE_1000000);
// Perform it with disconnected TX pin, so nothing actually comes out
// of the device.
nrf_uart_txrx_pins_disconnect(UART_INSTANCE);
nrf_uart_hwfc_pins_disconnect(UART_INSTANCE);
nrf_uart_enable(UART_INSTANCE);
nrf_uart_txd_set(UART_INSTANCE, 0);
while (!nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY)) {
}
nrf_uart_disable(UART_INSTANCE);
// Now everything is prepared to set the default configuration and
// connect the peripheral to actual pins.
nrf_uart_txrx_pins_set(UART_INSTANCE, UART_CB.pseltxd, UART_CB.pselrxd);
nrf_uart_baudrate_set(UART_INSTANCE, UART_CB.baudrate);
nrf_uart_configure(UART_INSTANCE, UART_CB.parity, UART_CB.hwfc);
if (UART_CB.hwfc == NRF_UART_HWFC_ENABLED) {
serial_set_flow_control(obj, FlowControlRTSCTS,
UART_CB.pselrts, UART_CB.pselcts);
}
nrf_uart_enable(UART_INSTANCE);
UART_CB.initialized = true;
}
if (tx == STDIO_UART_TX && rx == STDIO_UART_RX) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
else {
stdio_uart_inited = 0;
}
}
void serial_free(serial_t *obj)
{
(void)obj;
if (UART_CB.initialized) {
nrf_uart_disable(UART_INSTANCE);
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY |
NRF_UART_INT_MASK_TXDRDY |
NRF_UART_INT_MASK_ERROR);
nrf_drv_common_irq_disable(UART_IRQn);
UART_CB.initialized = false;
// There is only one UART instance, thus at this point the stdio UART
// can no longer be initialized.
stdio_uart_inited = 0;
}
}
static nrf_uart_baudrate_t baud_translate(int rate)
{
nrf_uart_baudrate_t baud;
@ -132,177 +383,36 @@ static nrf_uart_baudrate_t baud_translate(int rate)
}
return baud;
}
void serial_baud(serial_t *obj, int baudrate)
{
(void)obj;
uart_config.baudrate = baud_translate(baudrate);
UART_CB.baudrate = baud_translate(baudrate);
// Reconfigure UART peripheral.
nrf_uart_baudrate_set(UART_INSTANCE, uart_config.baudrate);
nrf_uart_baudrate_set(UART_INSTANCE, UART_CB.baudrate);
}
void uart_event_handler(nrf_drv_uart_event_t *p_event, void *p_context)
{
(void)p_context;
if (p_event->type == NRF_DRV_UART_EVT_TX_DONE) {
UART_CB.tx_active = false;
if (UART_CB.async_mode) {
if (UART_CB.async_handler) {
UART_CB.event_flags |= SERIAL_EVENT_TX_COMPLETE;
UART_CB.async_handler();
}
}
else {
if (UART_CB.irqs_enabled & (1 << NRF_DRV_UART_EVT_TX_DONE)) {
if (UART_CB.irq_handler) {
UART_CB.irq_handler(UART_CB.irq_context, TxIrq);
}
}
}
}
if (p_event->type == NRF_DRV_UART_EVT_RX_DONE) {
if (UART_CB.async_mode) {
bool rx_end = true;
if (UART_CB.registered_events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
serial_t *serial = (serial_t *)(uart_config.p_context);
uint8_t *rx_buffer = (uint8_t *)(serial->rx_buff.buffer);
uint8_t last_char = rx_buffer[serial->rx_buff.pos];
++serial->rx_buff.pos;
if (last_char == serial->char_match) {
UART_CB.event_flags |= SERIAL_EVENT_RX_CHARACTER_MATCH;
serial->char_found = 1;
}
else {
if (serial->rx_buff.pos < serial->rx_buff.length) {
rx_end = false;
nrf_drv_uart_rx(&rx_buffer[serial->rx_buff.pos], 1);
}
}
}
if (rx_end && UART_CB.async_handler) {
UART_CB.rx_active = false;
UART_CB.event_flags |= SERIAL_EVENT_RX_COMPLETE;
UART_CB.async_handler();
}
}
else {
UART_CB.rx_active = false;
if (UART_CB.irqs_enabled & (1 << NRF_DRV_UART_EVT_RX_DONE)) {
if (UART_CB.irq_handler) {
UART_CB.irq_handler(UART_CB.irq_context, RxIrq);
}
}
}
}
if (p_event->type == NRF_DRV_UART_EVT_ERROR) {
if (UART_CB.async_mode && p_event->data.error.error_mask) {
if (UART_CB.async_handler) {
UART_CB.event_flags |= SERIAL_EVENT_ERROR;
if (p_event->data.error.error_mask & NRF_UART_ERROR_PARITY_MASK) {
UART_CB.event_flags |= SERIAL_EVENT_RX_PARITY_ERROR;
}
if (p_event->data.error.error_mask & NRF_UART_ERROR_FRAMING_MASK) {
UART_CB.event_flags |= SERIAL_EVENT_RX_FRAMING_ERROR;
}
if (p_event->data.error.error_mask & NRF_UART_ERROR_OVERRUN_MASK) {
UART_CB.event_flags |= SERIAL_EVENT_RX_OVERRUN_ERROR;
}
UART_CB.async_handler();
}
}
}
}
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
uart_config.pseltxd =
(tx == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)tx;
uart_config.pselrxd =
(rx == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)rx;
uart_config.p_context = (void *)obj;
if (UART_CB.initialized) {
// Reconfigure RX/TX pins only.
nrf_uart_txrx_pins_set(UART_INSTANCE,
uart_config.pseltxd, uart_config.pselrxd);
return;
}
memset(&UART_CB, 0, sizeof(uart_ctlblock_t));
ret_code_t err_code = nrf_drv_uart_init(&uart_config, uart_event_handler);
if (err_code == NRF_SUCCESS) {
UART_CB.initialized = true;
nrf_drv_uart_rx_enable();
if (tx == STDIO_UART_TX && rx == STDIO_UART_RX) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
else {
error("UART init failure.");
}
}
void serial_free(serial_t *obj)
{
(void)obj;
if (UART_CB.initialized) {
nrf_drv_uart_uninit();
UART_CB.initialized = false;
stdio_uart_inited = 0;
}
}
int serial_writable(serial_t *obj)
{
(void)obj;
if (!UART_CB.async_mode) {
return true;
}
return !UART_CB.tx_active;
}
int serial_readable(serial_t *obj)
{
(void)obj;
return (!UART_CB.rx_active &&
nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY));
}
void serial_putc(serial_t *obj, int c)
void serial_format(serial_t *obj,
int data_bits, SerialParity parity, int stop_bits)
{
(void)obj;
// Interrupt on the TXDRDY event must be temporarily disabled, otherwise
// the driver would try to handle (and clear) this event in the interrupt
// handler.
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
nrf_uart_txd_set(UART_INSTANCE, (uint8_t)c);
while (!nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY)) {
if (data_bits != 8) {
error("UART supports only 8 data bits.\r\n");
}
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STOPTX);
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
}
int serial_getc(serial_t *obj)
{
(void)obj;
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
while (!nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY)) {
if (stop_bits != 1) {
error("UART supports only 1 stop bits.\r\n");
}
if (parity == ParityNone) {
UART_CB.parity = NRF_UART_PARITY_EXCLUDED;
} else if (parity == ParityEven) {
UART_CB.parity = NRF_UART_PARITY_INCLUDED;
} else {
error("UART supports only even parity.\r\n");
}
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STOPRX);
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
return nrf_uart_rxd_get(UART_INSTANCE);
// Reconfigure UART peripheral.
nrf_uart_configure(UART_INSTANCE, UART_CB.parity, UART_CB.hwfc);
}
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
@ -318,24 +428,132 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
if (enable) {
switch (irq) {
case RxIrq:
UART_CB.irqs_enabled |= (1 << NRF_DRV_UART_EVT_RX_DONE);
#if DEVICE_SERIAL_ASYNCH
UART_CB.irq_enabled |= UART_IRQ_RX;
#endif
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY);
break;
case TxIrq:
UART_CB.irqs_enabled |= (1 << NRF_DRV_UART_EVT_TX_DONE);
#if DEVICE_SERIAL_ASYNCH
UART_CB.irq_enabled |= UART_IRQ_TX;
#endif
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
break;
}
} else {
switch (irq) {
case RxIrq:
UART_CB.irqs_enabled &= ~(1 << NRF_DRV_UART_EVT_RX_DONE);
#if DEVICE_SERIAL_ASYNCH
UART_CB.irq_enabled &= ~UART_IRQ_RX;
if (!UART_CB.rx_active)
#endif
{
nrf_uart_int_disable(UART_INSTANCE,
NRF_UART_INT_MASK_RXDRDY);
}
break;
case TxIrq:
UART_CB.irqs_enabled &= ~(1 << NRF_DRV_UART_EVT_TX_DONE);
#if DEVICE_SERIAL_ASYNCH
UART_CB.irq_enabled &= ~UART_IRQ_TX;
if (!UART_CB.tx_active)
#endif
{
nrf_uart_int_disable(UART_INSTANCE,
NRF_UART_INT_MASK_TXDRDY);
}
break;
}
}
}
int serial_getc(serial_t *obj)
{
while (!serial_readable(obj)) {
}
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
return nrf_uart_rxd_get(UART_INSTANCE);
}
void serial_putc(serial_t *obj, int c)
{
while (!serial_writable(obj)) {
}
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
nrf_uart_txd_set(UART_INSTANCE, (uint8_t)c);
// Wait until sending is completed.
while (!nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY)) {
}
}
int serial_readable(serial_t *obj)
{
(void)obj;
#if DEVICE_SERIAL_ASYNCH
if (UART_CB.rx_active) {
return 0;
}
#endif
return (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY));
}
int serial_writable(serial_t *obj)
{
(void)obj;
#if DEVICE_SERIAL_ASYNCH
if (UART_CB.tx_active) {
return 0;
}
#endif
return (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY));
}
void serial_break_set(serial_t *obj)
{
(void)obj;
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_SUSPEND);
nrf_uart_txrx_pins_disconnect(UART_INSTANCE);
nrf_gpio_pin_clear(UART_CB.pseltxd);
}
void serial_break_clear(serial_t *obj)
{
(void)obj;
nrf_gpio_pin_set(UART_CB.pseltxd);
nrf_uart_txrx_pins_set(UART_INSTANCE, UART_CB.pseltxd, UART_CB.pselrxd);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
}
void serial_set_flow_control(serial_t *obj, FlowControl type,
PinName rxflow, PinName txflow)
{
(void)obj;
UART_CB.pselrts =
(rxflow == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)rxflow;
UART_CB.pselcts =
(txflow == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)txflow;
if (UART_CB.pselrts != NRF_UART_PSEL_DISCONNECTED) {
nrf_gpio_pin_set(UART_CB.pselrts);
nrf_gpio_cfg_output(UART_CB.pselrts);
}
if (UART_CB.pselcts != NRF_UART_PSEL_DISCONNECTED) {
nrf_gpio_cfg_input(UART_CB.pselcts, NRF_GPIO_PIN_NOPULL);
}
nrf_uart_disable(UART_INSTANCE);
nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_CB.pselrts, UART_CB.pselcts);
nrf_uart_enable(UART_INSTANCE);
}
void serial_clear(serial_t *obj) {
(void)obj;
}
#if DEVICE_SERIAL_ASYNCH
int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length,
@ -345,22 +563,20 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length,
(void)obj;
(void)tx_width;
(void)hint;
if (UART_CB.tx_active) {
if (UART_CB.tx_active || !tx_length) {
return 0;
}
// TX length is limited to 255 in uart driver.
if (tx_length > 255) {
tx_length = 255;
}
UART_CB.async_mode = true;
UART_CB.tx_buffer = tx;
UART_CB.tx_length = tx_length;
UART_CB.tx_pos = 0;
UART_CB.tx_asynch_handler = (void(*)())handler;
UART_CB.events_wanted &= ~SERIAL_EVENT_TX_ALL;
UART_CB.events_wanted |= event;
UART_CB.tx_active = true;
UART_CB.registered_events &= ~SERIAL_EVENT_TX_ALL;
UART_CB.registered_events |= event;
UART_CB.async_handler = (void(*)())handler;
if (nrf_drv_uart_tx((uint8_t *)tx, (uint8_t)tx_length) == NRF_SUCCESS) {
return tx_length;
}
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
return 0;
}
@ -368,34 +584,23 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length,
uint8_t rx_width, uint32_t handler, uint32_t event,
uint8_t char_match, DMAUsage hint)
{
(void)obj;
(void)rx_width;
(void)hint;
if (UART_CB.rx_active || !rx_length) {
return;
}
// RX length is limited to 255 in uart driver.
if (rx_length > 255) {
rx_length = 255;
}
UART_CB.async_mode = true;
UART_CB.rx_buffer = rx;
UART_CB.rx_length = rx_length;
UART_CB.rx_pos = 0;
UART_CB.rx_asynch_handler = (void(*)())handler;
UART_CB.events_wanted &= ~SERIAL_EVENT_RX_ALL;
UART_CB.events_wanted |= event;
UART_CB.char_match = char_match;
UART_CB.rx_active = true;
if (char_match == SERIAL_RESERVED_CHAR_MATCH) {
event &= ~SERIAL_EVENT_RX_CHARACTER_MATCH;
}
UART_CB.registered_events &= ~SERIAL_EVENT_RX_ALL;
UART_CB.registered_events |= event;
UART_CB.async_handler = (void(*)())handler;
if (event & SERIAL_EVENT_RX_CHARACTER_MATCH) {
obj->char_match = char_match;
obj->rx_buff.buffer = rx;
obj->rx_buff.length = rx_length;
obj->rx_buff.pos = 0;
obj->rx_buff.width = 8;
nrf_drv_uart_rx((uint8_t *)rx, 1);
} else {
nrf_drv_uart_rx((uint8_t *)rx, (uint8_t)rx_length);
}
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY);
}
uint8_t serial_tx_active(serial_t *obj)
@ -413,96 +618,25 @@ uint8_t serial_rx_active(serial_t *obj)
int serial_irq_handler_asynch(serial_t *obj)
{
(void)obj;
uint32_t result = UART_CB.registered_events & UART_CB.event_flags;
UART_CB.event_flags &= (~result);
return result;
uint32_t events_to_report = UART_CB.events_wanted & UART_CB.events_occured;
UART_CB.events_occured &= (~events_to_report);
return events_to_report;
}
void serial_tx_abort_asynch(serial_t *obj)
{
(void)obj;
nrf_drv_uart_tx_abort();
end_asynch_tx();
UART_CB.tx_asynch_handler = NULL;
}
void serial_rx_abort_asynch(serial_t *obj)
{
(void)obj;
nrf_drv_uart_rx_abort();
end_asynch_rx();
UART_CB.rx_asynch_handler = NULL;
}
#endif
void serial_format(serial_t *obj,
int data_bits, SerialParity parity, int stop_bits)
{
(void)obj;
(void)data_bits;
(void)stop_bits;
if (parity == ParityNone) {
uart_config.parity = NRF_UART_PARITY_EXCLUDED;
} else {
uart_config.parity = NRF_UART_PARITY_INCLUDED;
}
// Reconfigure UART peripheral.
nrf_uart_configure(UART_INSTANCE, uart_config.parity, uart_config.hwfc);
}
void serial_break_set(serial_t *obj)
{
(void)obj;
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_SUSPEND);
nrf_uart_txrx_pins_disconnect(UART_INSTANCE);
nrf_gpio_pin_set(uart_config.pseltxd);
nrf_gpio_pin_clear(uart_config.pseltxd);
}
void serial_break_clear(serial_t *obj)
{
(void)obj;
nrf_gpio_pin_set(uart_config.pseltxd);
nrf_uart_txrx_pins_set(UART_INSTANCE,
uart_config.pseltxd, uart_config.pselrxd);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
}
void serial_set_flow_control(serial_t *obj,
FlowControl type, PinName rxflow, PinName txflow)
{
(void)obj;
if (type == FlowControlNone) {
uart_config.hwfc = NRF_UART_HWFC_DISABLED;
rxflow = NC;
txflow = NC;
} else {
uart_config.hwfc = NRF_UART_HWFC_ENABLED;
if (type == FlowControlRTS) {
txflow = NC;
} else if (type == FlowControlCTS) {
rxflow = NC;
}
}
uart_config.pselrts =
(rxflow == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)rxflow;
uart_config.pselcts =
(txflow == NC) ? NRF_UART_PSEL_DISCONNECTED : (uint32_t)txflow;
// Reconfigure UART peripheral.
if (uart_config.hwfc == NRF_UART_HWFC_ENABLED) {
nrf_gpio_cfg_input(uart_config.pselcts, NRF_GPIO_PIN_NOPULL);
nrf_gpio_pin_set(uart_config.pselrts);
nrf_gpio_cfg_output(uart_config.pselrts);
nrf_uart_hwfc_pins_set(UART_INSTANCE,
uart_config.pselrts, uart_config.pselcts);
}
nrf_uart_configure(UART_INSTANCE, uart_config.parity, uart_config.hwfc);
}
void serial_clear(serial_t *obj)
{
(void)obj;
}
#endif // DEVICE_SERIAL_ASYNCH
#endif // DEVICE_SERIAL