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STM32 common filess astyle

pull/14699/head
jeromecoutant 2021-05-25 14:38:26 +02:00
parent 8b1cd98a8e
commit c02cb71b35
9 changed files with 109 additions and 106 deletions
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28
targets/TARGET_STM/USBPhy_STM32.cpp
View File

@ -250,13 +250,13 @@ void USBPhyHw::init(USBPhyEvents *events)
__HAL_RCC_USB_OTG_HS_CLK_ENABLE();
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
map = PinMap_USB_HS;
#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_FS)
@ -267,13 +267,13 @@ void USBPhyHw::init(USBPhyEvents *events)
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
#ifdef __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE
__HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
#endif
map = PinMap_USB_FS;
#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG)

19
targets/TARGET_STM/can_api.c
View File

@ -142,13 +142,13 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
// !When the sample point should be lower than 50%, this must be changed to
// !IS_FDCAN_NOMINAL_TSEG2(ntq/nominalPrescaler), since
// NTSEG2 and SJW max values are lower. For now the sample point is fix @75%
while (!IS_FDCAN_NOMINAL_TSEG1(ntq/nominalPrescaler)){
while (!IS_FDCAN_NOMINAL_TSEG1(ntq / nominalPrescaler)) {
nominalPrescaler ++;
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)){
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)) {
error("Could not determine good nominalPrescaler. Bad clock value\n");
}
}
ntq = ntq/nominalPrescaler;
ntq = ntq / nominalPrescaler;
obj->CanHandle.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
obj->CanHandle.Init.Mode = FDCAN_MODE_NORMAL;
@ -298,13 +298,13 @@ int can_frequency(can_t *obj, int f)
// !When the sample point should be lower than 50%, this must be changed to
// !IS_FDCAN_DATA_TSEG2(ntq/nominalPrescaler), since
// NTSEG2 and SJW max values are lower. For now the sample point is fix @75%
while (!IS_FDCAN_DATA_TSEG1(ntq/nominalPrescaler)){
while (!IS_FDCAN_DATA_TSEG1(ntq / nominalPrescaler)) {
nominalPrescaler ++;
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)){
if (!IS_FDCAN_NOMINAL_PRESCALER(nominalPrescaler)) {
error("Could not determine good nominalPrescaler. Bad clock value\n");
}
}
ntq = ntq/nominalPrescaler;
ntq = ntq / nominalPrescaler;
obj->CanHandle.Init.NominalPrescaler = nominalPrescaler;
obj->CanHandle.Init.NominalTimeSeg1 = ntq * 0.75; // Phase_segment_1
@ -596,7 +596,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
#ifndef TARGET_STM32G4
interrupts = FDCAN_IT_RX_BUFFER_NEW_MESSAGE;
#else
interrupts = FDCAN_IT_RX_FIFO0_NEW_MESSAGE;
interrupts = FDCAN_IT_RX_FIFO0_NEW_MESSAGE;
#endif
break;
case IRQ_ERROR:
@ -1102,7 +1102,7 @@ int can_mode(can_t *obj, CanMode mode)
int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle)
{
int success = 0;
// filter for CANAny format cannot be configured for STM32
if ((format == CANStandard) || (format == CANExtended)) {
CAN_FilterConfTypeDef sFilterConfig;
@ -1126,8 +1126,7 @@ int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t
sFilterConfig.FilterActivation = ENABLE;
sFilterConfig.BankNumber = 14;
if (HAL_CAN_ConfigFilter(&obj->CanHandle, &sFilterConfig) == HAL_OK)
{
if (HAL_CAN_ConfigFilter(&obj->CanHandle, &sFilterConfig) == HAL_OK) {
success = 1;
}
}

2
targets/TARGET_STM/hal_tick_overrides.c
View File

@ -71,7 +71,7 @@ uint32_t HAL_GetTick()
prev_tick_remainder = elapsed_time % 1000;
}
total_ticks += elapsed_ticks;
core_util_critical_section_exit();
return total_ticks;
}

2
targets/TARGET_STM/lp_ticker.c
View File

@ -285,7 +285,7 @@ void lp_ticker_init(void)
#if (LPTIM_MST_BASE == LPTIM1_BASE)
#if defined (__HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT)
__HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT();
__HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT();
#endif
#endif
#if defined (__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT)

36
targets/TARGET_STM/mbed_overrides.c
View File

@ -41,30 +41,31 @@ extern void SetSysClock(void);
/**
* @brief configure the LSE crystal driver load
* This settings ist target hardware dependend and
* This setting is target hardware dependend and
* depends on the crystal that is used for LSE clock.
* For low power requirements, crystals with low load capacitors can be used and
* driver setting is RCC_LSEDRIVE_LOW.
* For higher stablity, crystals with higher load capacitys can be used and
* driver setting is RCC_LSEDRIVE_HIGH.
*
*
* A detailed description about this setting can be found here:
* https://www.st.com/resource/en/application_note/cd00221665-oscillator-design-guide-for-stm8afals-stm32-mcus-and-mpus-stmicroelectronics.pdf
*
* LSE maybe used later, but crystal load drive setting is necessary before
*
* LSE maybe used later, but crystal load drive setting is necessary before
* enabling LSE.
*
*
* @param None
* @retval None
*/
static void LSEDriveConfig(void) {
static void LSEDriveConfig(void)
{
HAL_PWR_EnableBkUpAccess();
#if defined(__HAL_RCC_LSEDRIVE_CONFIG)
__HAL_RCC_LSEDRIVE_CONFIG(LSE_DRIVE_LOAD_LEVEL);
#else
HAL_RCCEx_SelectLSEMode(LSE_DRIVE_LOAD_LEVEL);
#endif
#if defined(__HAL_RCC_LSEDRIVE_CONFIG)
__HAL_RCC_LSEDRIVE_CONFIG(LSE_DRIVE_LOAD_LEVEL);
#else
HAL_RCCEx_SelectLSEMode(LSE_DRIVE_LOAD_LEVEL);
#endif
}
#endif // LSE_CONFIG_AVAILABLE
@ -79,13 +80,15 @@ static void LSEDriveConfig(void) {
* @param None
* @retval None
*/
MBED_WEAK void TargetBSP_Init(void) {
MBED_WEAK void TargetBSP_Init(void)
{
/** Do nothing */
}
#ifndef MBED_DEBUG
#if MBED_CONF_TARGET_GPIO_RESET_AT_INIT
void GPIO_Full_Init(void) {
void GPIO_Full_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = GPIO_PIN_All;
@ -238,7 +241,7 @@ void mbed_sdk_init()
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
#else
#error system_power_supply not configured
#error system_power_supply not configured
#endif
#endif
@ -276,7 +279,7 @@ void mbed_sdk_init()
#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
#else
#error system_power_supply not configured
#error system_power_supply not configured
#endif
#endif
@ -290,8 +293,7 @@ void mbed_sdk_init()
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
PeriphClkInitStruct.RTCClockSelection = (RCC_RTCCLKSOURCE_HSE_DIVX | RTC_HSE_DIV << 16);
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
error("PeriphClkInitStruct RTC failed with HSE\n");
}
#elif ((MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) && !MBED_CONF_TARGET_LSE_AVAILABLE) || (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSI)

15
targets/TARGET_STM/ospi_api.c
View File

@ -65,7 +65,7 @@ ospi_status_t ospi_prepare_command(const ospi_command_t *command, OSPI_RegularCm
st_command->Instruction = 0;
} else {
st_command->Instruction = ((command->instruction.bus_width == OSPI_CFG_BUS_OCTA) || (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR))
? command->instruction.value << 8 | (0xFF - command->instruction.value) : command->instruction.value;
? command->instruction.value << 8 | (0xFF - command->instruction.value) : command->instruction.value;
switch (command->instruction.bus_width) {
case OSPI_CFG_BUS_SINGLE:
st_command->InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
@ -87,14 +87,14 @@ ospi_status_t ospi_prepare_command(const ospi_command_t *command, OSPI_RegularCm
}
st_command->InstructionSize = (st_command->InstructionMode == HAL_OSPI_INSTRUCTION_8_LINES) ? HAL_OSPI_INSTRUCTION_16_BITS : HAL_OSPI_INSTRUCTION_8_BITS;
st_command->InstructionDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_INSTRUCTION_DTR_ENABLE :HAL_OSPI_INSTRUCTION_DTR_DISABLE;
st_command->InstructionDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_INSTRUCTION_DTR_ENABLE : HAL_OSPI_INSTRUCTION_DTR_DISABLE;
st_command->DummyCycles = command->dummy_count;
// these are target specific settings, use default values
st_command->SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
st_command->DataDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_DATA_DTR_ENABLE : HAL_OSPI_DATA_DTR_DISABLE;
st_command->AddressDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_ADDRESS_DTR_ENABLE : HAL_OSPI_ADDRESS_DTR_DISABLE;
st_command->AlternateBytesDtrMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_ALTERNATE_BYTES_DTR_ENABLE : HAL_OSPI_ALTERNATE_BYTES_DTR_DISABLE;
st_command->DQSMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_DQS_ENABLE :HAL_OSPI_DQS_DISABLE;
st_command->DQSMode = (command->instruction.bus_width == OSPI_CFG_BUS_OCTA_DTR) ? HAL_OSPI_DQS_ENABLE : HAL_OSPI_DQS_DISABLE;
st_command->OperationType = HAL_OSPI_OPTYPE_COMMON_CFG;
if (command->address.disabled == true) {
@ -245,7 +245,7 @@ static ospi_status_t _ospi_init_direct(ospi_t *obj, const ospi_pinmap_t *pinmap,
// Set default OCTOSPI handle values
obj->handle.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
//#if defined(TARGET_MX25LM512451G)
// obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MACRONIX; // Read sequence in DTR mode: D1-D0-D3-D2
// obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MACRONIX; // Read sequence in DTR mode: D1-D0-D3-D2
//#else
obj->handle.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON; // Read sequence in DTR mode: D0-D1-D2-D3
//#endif
@ -365,7 +365,7 @@ static ospi_status_t _ospi_init_direct(ospi_t *obj, const ospi_pinmap_t *pinmap,
}
ospi_status_t ospi_init(ospi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName io4, PinName io5, PinName io6, PinName io7,
PinName sclk, PinName ssel, PinName dqs, uint32_t hz, uint8_t mode)
PinName sclk, PinName ssel, PinName dqs, uint32_t hz, uint8_t mode)
{
OSPIName ospiio0name = (OSPIName)pinmap_peripheral(io0, PinMap_OSPI_DATA0);
OSPIName ospiio1name = (OSPIName)pinmap_peripheral(io1, PinMap_OSPI_DATA1);
@ -403,8 +403,9 @@ ospi_status_t ospi_init(ospi_t *obj, PinName io0, PinName io1, PinName io2, PinN
int function_dqs = (int)pinmap_find_function(dqs, PinMap_OSPI_DQS);
const ospi_pinmap_t static_pinmap = {peripheral, io0, function_io0, io1, function_io1, io2, function_io2, io3, function_io3,
io4, function_io4, io5, function_io5, io6, function_io6, io7, function_io7,
sclk, function_sclk, ssel, function_ssel, dqs, function_dqs};
io4, function_io4, io5, function_io5, io6, function_io6, io7, function_io7,
sclk, function_sclk, ssel, function_ssel, dqs, function_dqs
};
return OSPI_INIT_DIRECT(obj, &static_pinmap, hz, mode);
}

4
targets/TARGET_STM/serial_api.c
View File

@ -354,10 +354,10 @@ void serial_free(serial_t *obj)
pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
#if DEVICE_SERIAL_FC
if ( (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS) ) {
if ((obj_s->hw_flow_ctl == UART_HWCONTROL_RTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS)) {
pin_function(obj_s->pin_rts, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
}
if ( (obj_s->hw_flow_ctl == UART_HWCONTROL_CTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS) ) {
if ((obj_s->hw_flow_ctl == UART_HWCONTROL_CTS) || (obj_s->hw_flow_ctl == UART_HWCONTROL_RTS_CTS)) {
pin_function(obj_s->pin_cts, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0));
}
#endif

2
targets/TARGET_STM/sleep.c
View File

@ -181,7 +181,7 @@ __WEAK void hal_deepsleep(void)
save_timer_ctx();
// Request to enter STOP mode with regulator in low power mode
//PWR_CR1_LPMS_STOP2 -> STM32L4 ; PWR_LOWPOWERMODE_STOP2 -> STM32WL
//PWR_CR1_LPMS_STOP2 -> STM32L4 ; PWR_LOWPOWERMODE_STOP2 -> STM32WL
#if defined (PWR_CR1_LPMS_STOP2) || defined(PWR_LOWPOWERMODE_STOP2)
int pwrClockEnabled = __HAL_RCC_PWR_IS_CLK_ENABLED();
int lowPowerModeEnabled = PWR->CR1 & PWR_CR1_LPR;

107
targets/TARGET_STM/stm_spi_api.c
View File

@ -400,132 +400,132 @@ void spi_format(spi_t *obj, int bits, int mode, int slave)
DataSize = SPI_DATASIZE_4BIT;
break;
#endif
#if defined(SPI_DATASIZE_5BIT)
#if defined(SPI_DATASIZE_5BIT)
case 5:
DataSize = SPI_DATASIZE_5BIT;
break;
#endif
#if defined(SPI_DATASIZE_6BIT)
#if defined(SPI_DATASIZE_6BIT)
case 6:
DataSize = SPI_DATASIZE_6BIT;
break;
#endif
#if defined(SPI_DATASIZE_7BIT)
#if defined(SPI_DATASIZE_7BIT)
case 7:
DataSize = SPI_DATASIZE_7BIT;
break;
#endif
#if defined(SPI_DATASIZE_9BIT)
#if defined(SPI_DATASIZE_9BIT)
case 9:
DataSize = SPI_DATASIZE_9BIT;
break;
#endif
#if defined(SPI_DATASIZE_10BIT)
#if defined(SPI_DATASIZE_10BIT)
case 10:
DataSize = SPI_DATASIZE_10BIT;
break;
#endif
#if defined(SPI_DATASIZE_11BIT)
#if defined(SPI_DATASIZE_11BIT)
case 11:
DataSize = SPI_DATASIZE_11BIT;
break;
#endif
#if defined(SPI_DATASIZE_12BIT)
#if defined(SPI_DATASIZE_12BIT)
case 12:
DataSize = SPI_DATASIZE_12BIT;
break;
#endif
#if defined(SPI_DATASIZE_13BIT)
#if defined(SPI_DATASIZE_13BIT)
case 13:
DataSize = SPI_DATASIZE_13BIT;
break;
#endif
#if defined(SPI_DATASIZE_14BIT)
#if defined(SPI_DATASIZE_14BIT)
case 14:
DataSize = SPI_DATASIZE_14BIT;
break;
#endif
#if defined(SPI_DATASIZE_15BIT)
#if defined(SPI_DATASIZE_15BIT)
case 15:
DataSize = SPI_DATASIZE_15BIT;
break;
#endif
#if defined(SPI_DATASIZE_17BIT)
#if defined(SPI_DATASIZE_17BIT)
case 17:
DataSize = SPI_DATASIZE_17BIT;
break;
#endif
#if defined(SPI_DATASIZE_18BIT)
#if defined(SPI_DATASIZE_18BIT)
case 18:
DataSize = SPI_DATASIZE_18BIT;
break;
#endif
#if defined(SPI_DATASIZE_19BIT)
#if defined(SPI_DATASIZE_19BIT)
case 19:
DataSize = SPI_DATASIZE_19BIT;
break;
#endif
#if defined(SPI_DATASIZE_20BIT)
#if defined(SPI_DATASIZE_20BIT)
case 20:
DataSize = SPI_DATASIZE_20BIT;
break;
#endif
#if defined(SPI_DATASIZE_21BIT)
#if defined(SPI_DATASIZE_21BIT)
case 21:
DataSize = SPI_DATASIZE_21BIT;
break;
#endif
#if defined(SPI_DATASIZE_22BIT)
#if defined(SPI_DATASIZE_22BIT)
case 22:
DataSize = SPI_DATASIZE_22BIT;
break;
#endif
#if defined(SPI_DATASIZE_23BIT)
#if defined(SPI_DATASIZE_23BIT)
case 23:
DataSize = SPI_DATASIZE_23BIT;
break;
#endif
#if defined(SPI_DATASIZE_24BIT)
#if defined(SPI_DATASIZE_24BIT)
case 24:
DataSize = SPI_DATASIZE_24BIT;
break;
#endif
#if defined(SPI_DATASIZE_25BIT)
#if defined(SPI_DATASIZE_25BIT)
case 25:
DataSize = SPI_DATASIZE_25BIT;
break;
#endif
#if defined(SPI_DATASIZE_26BIT)
#if defined(SPI_DATASIZE_26BIT)
case 26:
DataSize = SPI_DATASIZE_26BIT;
break;
#endif
#if defined(SPI_DATASIZE_27BIT)
#if defined(SPI_DATASIZE_27BIT)
case 27:
DataSize = SPI_DATASIZE_27BIT;
break;
#endif
#if defined(SPI_DATASIZE_28BIT)
#if defined(SPI_DATASIZE_28BIT)
case 28:
DataSize = SPI_DATASIZE_28BIT;
break;
#endif
#if defined(SPI_DATASIZE_29BIT)
#if defined(SPI_DATASIZE_29BIT)
case 29:
DataSize = SPI_DATASIZE_29BIT;
break;
#endif
#if defined(SPI_DATASIZE_30BIT)
#if defined(SPI_DATASIZE_30BIT)
case 30:
DataSize = SPI_DATASIZE_30BIT;
break;
#endif
#if defined(SPI_DATASIZE_31BIT)
#if defined(SPI_DATASIZE_31BIT)
case 31:
DataSize = SPI_DATASIZE_31BIT;
break;
#endif
#if defined(SPI_DATASIZE_32BIT)
#if defined(SPI_DATASIZE_32BIT)
case 32:
DataSize = SPI_DATASIZE_32BIT;
break;
@ -667,106 +667,107 @@ static inline int ssp_busy(spi_t *obj)
return status;
}
static inline int datasize_to_transfer_bitshift(uint32_t DataSize) {
static inline int datasize_to_transfer_bitshift(uint32_t DataSize)
{
switch (DataSize) {
#if defined(SPI_DATASIZE_4BIT)
case SPI_DATASIZE_4BIT:
#endif
#if defined(SPI_DATASIZE_5BIT)
#if defined(SPI_DATASIZE_5BIT)
case SPI_DATASIZE_5BIT:
#endif
#if defined(SPI_DATASIZE_6BIT)
#if defined(SPI_DATASIZE_6BIT)
case SPI_DATASIZE_6BIT:
#endif
#if defined(SPI_DATASIZE_7BIT)
#if defined(SPI_DATASIZE_7BIT)
case SPI_DATASIZE_7BIT:
#endif
case SPI_DATASIZE_8BIT:
return 0;
#if defined(SPI_DATASIZE_9BIT)
#if defined(SPI_DATASIZE_9BIT)
case SPI_DATASIZE_9BIT:
#endif
#if defined(SPI_DATASIZE_10BIT)
#if defined(SPI_DATASIZE_10BIT)
case SPI_DATASIZE_10BIT:
#endif
#if defined(SPI_DATASIZE_11BIT)
#if defined(SPI_DATASIZE_11BIT)
case SPI_DATASIZE_11BIT:
#endif
#if defined(SPI_DATASIZE_12BIT)
#if defined(SPI_DATASIZE_12BIT)
case SPI_DATASIZE_12BIT:
#endif
#if defined(SPI_DATASIZE_13BIT)
#if defined(SPI_DATASIZE_13BIT)
case SPI_DATASIZE_13BIT:
#endif
#if defined(SPI_DATASIZE_14BIT)
#if defined(SPI_DATASIZE_14BIT)
case SPI_DATASIZE_14BIT:
#endif
#if defined(SPI_DATASIZE_15BIT)
#if defined(SPI_DATASIZE_15BIT)
case SPI_DATASIZE_15BIT:
#endif
case SPI_DATASIZE_16BIT:
return 1;
#if defined(SPI_DATASIZE_17BIT)
#if defined(SPI_DATASIZE_17BIT)
case SPI_DATASIZE_17BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_18BIT)
#if defined(SPI_DATASIZE_18BIT)
case SPI_DATASIZE_18BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_19BIT)
#if defined(SPI_DATASIZE_19BIT)
case SPI_DATASIZE_19BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_20BIT)
#if defined(SPI_DATASIZE_20BIT)
case SPI_DATASIZE_20BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_21BIT)
#if defined(SPI_DATASIZE_21BIT)
case SPI_DATASIZE_21BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_22BIT)
#if defined(SPI_DATASIZE_22BIT)
case SPI_DATASIZE_22BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_23BIT)
#if defined(SPI_DATASIZE_23BIT)
case SPI_DATASIZE_23BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_24BIT)
#if defined(SPI_DATASIZE_24BIT)
case SPI_DATASIZE_24BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_25BIT)
#if defined(SPI_DATASIZE_25BIT)
case SPI_DATASIZE_25BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_26BIT)
#if defined(SPI_DATASIZE_26BIT)
case SPI_DATASIZE_26BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_27BIT)
#if defined(SPI_DATASIZE_27BIT)
case SPI_DATASIZE_27BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_28BIT)
#if defined(SPI_DATASIZE_28BIT)
case SPI_DATASIZE_28BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_29BIT)
#if defined(SPI_DATASIZE_29BIT)
case SPI_DATASIZE_29BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_30BIT)
#if defined(SPI_DATASIZE_30BIT)
case SPI_DATASIZE_30BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_31BIT)
#if defined(SPI_DATASIZE_31BIT)
case SPI_DATASIZE_31BIT:
return 2;
#endif
#if defined(SPI_DATASIZE_32BIT)
#if defined(SPI_DATASIZE_32BIT)
case SPI_DATASIZE_32BIT:
return 2;
#endif