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STM32L496: fix RAM size in ARM scatter file

pull/7631/head
bcostm 2018-07-19 14:02:05 +02:00 committed by Cruz Monrreal II
parent 6064af0434
commit becdc31214
2 changed files with 6 additions and 6 deletions
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6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/stm32l496xx.sct
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@ -1,6 +1,6 @@
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics ; Copyright (c) 2018, STMicroelectronics
; All rights reserved. ; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; Redistribution and use in source and binary forms, with or without
@ -27,7 +27,7 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 1MB FLASH (0x100000) + 320KB SRAM (0xxxxx) ; 1MB FLASH (0x100000) + 320KB SRAM (0x50000)
LR_IROM1 0x08000000 0x100000 { ; load region size_region LR_IROM1 0x08000000 0x100000 { ; load region size_region
ER_IROM1 0x08000000 0x100000 { ; load address = execution address ER_IROM1 0x08000000 0x100000 { ; load address = execution address
@ -37,7 +37,7 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region
} }
; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM ; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1AC) (0x00500000-0x1AC) { ; RW data 320k L4-SRAM1 RW_IRAM1 (0x20000000+0x1AC) (0x50000-0x1AC) { ; RW data 320k L4-SRAM1
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
} }

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_STD/stm32l496xx.sct
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@ -1,6 +1,6 @@
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics ; Copyright (c) 2018, STMicroelectronics
; All rights reserved. ; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; Redistribution and use in source and binary forms, with or without
@ -27,7 +27,7 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 1MB FLASH (0x100000) + 320KB SRAM (0xxxxx) ; 1MB FLASH (0x100000) + 320KB SRAM (0x50000)
LR_IROM1 0x08000000 0x100000 { ; load region size_region LR_IROM1 0x08000000 0x100000 { ; load region size_region
ER_IROM1 0x08000000 0x100000 { ; load address = execution address ER_IROM1 0x08000000 0x100000 { ; load address = execution address
@ -37,7 +37,7 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region
} }
; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM ; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1AC) (0x00500000-0x1AC) { ; RW data 320k L4-SRAM1 RW_IRAM1 (0x20000000+0x1AC) (0x50000-0x1AC) { ; RW data 320k L4-SRAM1
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
} }