From becaffc9d242c2e6069c2d33e4af605d41af91dd Mon Sep 17 00:00:00 2001
From: jeromecoutant <jerome.coutant@st.com>
Date: Fri, 7 Jun 2019 17:17:44 +0200
Subject: [PATCH] STM32L0 warning compilation

[-Wparentheses-equality]
---
 .../TARGET_STM32L0/device/stm32l0xx_hal_tim.c | 28 +++++++++----------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
index a431331ded..bf38663fc9 100644
--- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
@@ -394,11 +394,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U))
     {
@@ -765,11 +765,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1243,11 +1243,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1714,11 +1714,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U))
     {
@@ -2505,11 +2505,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U)) 
     {
@@ -3227,11 +3227,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
@@ -3429,11 +3429,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U))
     {