diff --git a/targets/TARGET_STM/PeripheralPins.h b/targets/TARGET_STM/PeripheralPins.h
index fe4954068a..56303f8bab 100644
--- a/targets/TARGET_STM/PeripheralPins.h
+++ b/targets/TARGET_STM/PeripheralPins.h
@@ -34,6 +34,27 @@
 #include "pinmap.h"
 #include "PeripheralNames.h"
 
+#if TARGET_STM32F1
+#define AFIO_NONE                 0
+#define AFIO_REMAP_SPI1_ENABLE    1
+#define AFIO_REMAP_I2C1_ENABLE    2
+#define AFIO_REMAP_USART1_ENABLE  3
+#define AFIO_REMAP_USART2_ENABLE  4
+#define AFIO_REMAP_USART3_PARTIAL 5
+#define AFIO_REMAP_TIM1_PARTIAL   6
+#define AFIO_REMAP_TIM3_PARTIAL   7
+#define AFIO_REMAP_TIM2_ENABLE    8
+#define AFIO_REMAP_TIM3_ENABLE    9
+#define AFIO_REMAP_CAN1_2         10
+#define AFIO_REMAP_TIM1_ENABLE    11
+#define AFIO_REMAP_USART3_ENABLE  12
+#define AFIO_REMAP_CAN1_3         13
+#define AFIO_REMAP_TIM2_PARTIAL_1 14
+#define AFIO_REMAP_TIM2_PARTIAL_2 15
+#define AFIO_REMAP_TIM4_ENABLE    16
+#endif
+
+
 //*** GPIO ***
 #if GPIO_PINMAP_READY
 /* If this macro is defined, then PinMap_GPIO is present in PeripheralPins.c */
diff --git a/targets/TARGET_STM/TARGET_STM32F1/pin_device.h b/targets/TARGET_STM/TARGET_STM32F1/pin_device.h
index e431932180..660403eb5c 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/pin_device.h
+++ b/targets/TARGET_STM/TARGET_STM32F1/pin_device.h
@@ -32,6 +32,7 @@
 
 #include "cmsis.h"
 #include "stm32f1xx_ll_gpio.h"
+#include "PeripheralPins.h"
 
 extern const uint32_t ll_pin_defines[16];
 
@@ -58,38 +59,56 @@ static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t af
 
     if (afnum > 0) {
         switch (afnum) {
-            case 1: // Remap SPI1
+            case AFIO_REMAP_SPI1_ENABLE:
                 __HAL_AFIO_REMAP_SPI1_ENABLE();
                 break;
-            case 2: // Remap I2C1
+            case AFIO_REMAP_I2C1_ENABLE:
                 __HAL_AFIO_REMAP_I2C1_ENABLE();
                 break;
-            case 3: // Remap USART1
+            case AFIO_REMAP_USART1_ENABLE:
                 __HAL_AFIO_REMAP_USART1_ENABLE();
                 break;
-            case 4: // Remap USART2
+            case AFIO_REMAP_USART2_ENABLE:
                 __HAL_AFIO_REMAP_USART2_ENABLE();
                 break;
-            case 5: // Partial Remap USART3
+            case AFIO_REMAP_USART3_PARTIAL:
                 __HAL_AFIO_REMAP_USART3_PARTIAL();
                 break;
-            case 6: // Partial Remap TIM1
+            case AFIO_REMAP_TIM1_PARTIAL:
                 __HAL_AFIO_REMAP_TIM1_PARTIAL();
                 break;
-            case 7: // Partial Remap TIM3
+            case AFIO_REMAP_TIM3_PARTIAL:
                 __HAL_AFIO_REMAP_TIM3_PARTIAL();
                 break;
-            case 8: // Full Remap TIM2
+            case AFIO_REMAP_TIM2_ENABLE:
                 __HAL_AFIO_REMAP_TIM2_ENABLE();
                 break;
-            case 9: // Full Remap TIM3
+            case AFIO_REMAP_TIM3_ENABLE:
                 __HAL_AFIO_REMAP_TIM3_ENABLE();
                 break;
 #if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
-            case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
+            case AFIO_REMAP_CAN1_2:
                 __HAL_AFIO_REMAP_CAN1_2();
                 break;
 #endif
+            case AFIO_REMAP_TIM1_ENABLE:
+                __HAL_AFIO_REMAP_TIM1_ENABLE();
+                break;
+            case AFIO_REMAP_USART3_ENABLE:
+                __HAL_AFIO_REMAP_USART3_ENABLE();
+                break;
+            case AFIO_REMAP_CAN1_3:
+                __HAL_AFIO_REMAP_CAN1_3();
+                break;
+            case AFIO_REMAP_TIM2_PARTIAL_1:
+                __HAL_AFIO_REMAP_TIM2_PARTIAL_1();
+                break;
+            case AFIO_REMAP_TIM2_PARTIAL_2:
+                __HAL_AFIO_REMAP_TIM2_PARTIAL_2();
+                break;
+            case AFIO_REMAP_TIM4_ENABLE:
+                __HAL_AFIO_REMAP_TIM4_ENABLE();
+                break;
             default:
                 break;
         }