Merge pull request #397 from 0xc0170/dev_k20d50m

[K20D50M] K20D5M -> K20D50M
pull/401/head^2
Bogdan Marinescu 2014-07-11 09:57:00 +01:00
commit bbf5cbc715
37 changed files with 114 additions and 55 deletions

View File

@ -197,10 +197,10 @@ typedef enum {
LED_BLUE = PTA2, LED_BLUE = PTA2,
// mbed original LED naming // mbed original LED naming
LED1 = LED_BLUE, LED1 = LED_RED,
LED2 = LED_GREEN, LED2 = LED_GREEN,
LED3 = LED_RED, LED3 = LED_BLUE,
LED4 = LED_RED, LED4 = LED_BLUE,
// USB Pins // USB Pins
USBTX = PTB17, USBTX = PTB17,
@ -231,6 +231,12 @@ typedef enum {
A4 = PTB1, A4 = PTB1,
A5 = PTB0, A5 = PTB0,
I2C_SCL = D15,
I2C_SDA = D14,
TSI_ELEC0 = PTB16,
TSI_ELEC1 = PTB17,
// Not connected // Not connected
NC = (int)0xFFFFFFFF NC = (int)0xFFFFFFFF
} PinName; } PinName;

View File

@ -20,6 +20,8 @@
#include "pinmap.h" #include "pinmap.h"
#include "clk_freqs.h" #include "clk_freqs.h"
#define MAX_FADC 6000000
static const PinMap PinMap_ADC[] = { static const PinMap PinMap_ADC[] = {
{PTC2, ADC0_SE4b, 0}, {PTC2, ADC0_SE4b, 0},
{PTD1, ADC0_SE5b, 0}, {PTD1, ADC0_SE5b, 0},
@ -34,8 +36,6 @@ static const PinMap PinMap_ADC[] = {
{NC, NC, 0} {NC, NC, 0}
}; };
#define MAX_FADC 6000000
void analogin_init(analogin_t *obj, PinName pin) { void analogin_init(analogin_t *obj, PinName pin) {
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
MBED_ASSERT(obj->adc != (ADCName)NC); MBED_ASSERT(obj->adc != (ADCName)NC);

View File

@ -30,45 +30,63 @@ static gpio_irq_handler irq_handler;
#define IRQ_EITHER_EDGE PORT_PCR_IRQC(11) #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
static void handle_interrupt_in(PORT_Type *port, int ch_base) { static void handle_interrupt_in(PORT_Type *port, int ch_base) {
uint32_t mask = 0, i; uint32_t isfr;
uint32_t pin;
for (i = 0; i < 32; i++) { while ((isfr = port->ISFR) != 0) {
uint32_t pmask = (1 << i); pin = 31 - __CLZ(isfr);
if (port->ISFR & pmask) { uint32_t id = channel_ids[ch_base + pin];
mask |= pmask; if (id == 0) {
uint32_t id = channel_ids[ch_base + i]; continue;
if (id == 0)
continue;
GPIO_Type *gpio = PTA;
gpio_irq_event event = IRQ_NONE;
uint32_t port_num = (port - PORTA) >> 12;
switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
case IRQ_RAISING_EDGE:
event = IRQ_RISE;
break;
case IRQ_FALLING_EDGE:
event = IRQ_FALL;
break;
case IRQ_EITHER_EDGE:
gpio += (port_num * 0x40);
event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
break;
}
if (event != IRQ_NONE)
irq_handler(id, event);
} }
GPIO_Type *gpio = PTA;
gpio_irq_event event = IRQ_NONE;
uint32_t port_num = (port - PORTA) >> 12;
switch (port->PCR[pin] & PORT_PCR_IRQC_MASK) {
case IRQ_RAISING_EDGE:
event = IRQ_RISE;
break;
case IRQ_FALLING_EDGE:
event = IRQ_FALL;
break;
case IRQ_EITHER_EDGE:
gpio += (port_num * 0x40);
event = (gpio->PDIR & (1 << pin)) ? (IRQ_RISE) : (IRQ_FALL);
break;
}
if (event != IRQ_NONE) {
irq_handler(id, event);
}
port->ISFR = 1 << pin;
} }
port->ISFR = mask;
} }
void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);} void gpio_irqA(void) {
void gpio_irqB(void) {handle_interrupt_in(PORTB, 32);} handle_interrupt_in(PORTA, 0);
void gpio_irqC(void) {handle_interrupt_in(PORTC, 64);} }
void gpio_irqD(void) {handle_interrupt_in(PORTD, 96);}
void gpio_irqE(void) {handle_interrupt_in(PORTE, 128);} void gpio_irqB(void)
{
handle_interrupt_in(PORTB, 32);
}
void gpio_irqC(void)
{
handle_interrupt_in(PORTC, 64);
}
void gpio_irqD(void)
{
handle_interrupt_in(PORTD, 96);
}
void gpio_irqE(void)
{
handle_interrupt_in(PORTE, 128);
}
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
if (pin == NC) if (pin == NC)

View File

@ -26,12 +26,20 @@
static const PinMap PinMap_UART_TX[] = { static const PinMap PinMap_UART_TX[] = {
{PTB17, UART_0, 3}, {PTB17, UART_0, 3},
{NC , NC , 0} {PTC4 , UART_1, 3},
{PTD3 , UART_2, 3},
{PTD7 , UART_0, 3},
{PTE0 , UART_1, 3},
{NC , NC , 0}
}; };
static const PinMap PinMap_UART_RX[] = { static const PinMap PinMap_UART_RX[] = {
{PTB16, UART_0, 3}, {PTB16, UART_0, 3},
{NC , NC , 0} {PTC3 , UART_1, 3},
{PTD2 , UART_2, 3},
{PTD6 , UART_0, 3},
{PTE1 , UART_1, 3},
{NC , NC , 0}
}; };
#define UART_NUM 3 #define UART_NUM 3
@ -52,18 +60,33 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
obj->uart = (UART_Type *)uart; obj->uart = (UART_Type *)uart;
// enable clk // enable clk
switch (uart) { switch (uart) {
case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; case UART_0:
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break; SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
case UART_1: SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break; SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
case UART_2: SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
break;
case UART_1:
SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
break;
case UART_2:
SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK;
SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
break;
} }
// Disable UART before changing registers // Disable UART before changing registers
obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK); obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
switch (uart) { switch (uart) {
case UART_0: obj->index = 0; break; case UART_0:
case UART_1: obj->index = 1; break; obj->index = 0;
case UART_2: obj->index = 2; break; break;
case UART_1:
obj->index = 1;
break;
case UART_2:
obj->index = 2;
break;
} }
// set default baud rate and format // set default baud rate and format
@ -131,9 +154,20 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
uint32_t parity_enable, parity_select; uint32_t parity_enable, parity_select;
switch (parity) { switch (parity) {
case ParityNone: parity_enable = 0; parity_select = 0; break; case ParityNone:
case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break; parity_enable = 0;
case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break; parity_select = 0;
break;
case ParityOdd :
parity_enable = 1;
parity_select = 1;
data_bits++;
break;
case ParityEven:
parity_enable = 1;
parity_select = 0;
data_bits++;
break;
default: default:
break; break;
} }

View File

@ -45,6 +45,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('KL25Z', ('ARM', 'GCC_ARM')), ('KL25Z', ('ARM', 'GCC_ARM')),
('KL46Z', ('ARM', 'GCC_ARM')), ('KL46Z', ('ARM', 'GCC_ARM')),
('K64F', ('ARM', 'GCC_ARM')), ('K64F', ('ARM', 'GCC_ARM')),
('K20D50M', ('ARM', 'GCC_ARM')),
('NUCLEO_F030R8', ('ARM', 'uARM')), ('NUCLEO_F030R8', ('ARM', 'uARM')),
('NUCLEO_F072RB', ('ARM', 'uARM')), ('NUCLEO_F072RB', ('ARM', 'uARM')),

View File

@ -28,7 +28,7 @@ class GccArm(Exporter):
'KL25Z', 'KL25Z',
'KL46Z', 'KL46Z',
'K64F', 'K64F',
'K20D5M', 'K20D50M',
'LPC4088', 'LPC4088',
'LPC11U24', 'LPC11U24',
'LPC1114', 'LPC1114',

View File

@ -28,7 +28,7 @@ class Uvision4(Exporter):
'KL25Z', 'KL25Z',
'KL46Z', 'KL46Z',
'K64F', 'K64F',
'K20D5M', 'K20D50M',
'LPC1347', 'LPC1347',
'LPC1114', 'LPC1114',
'LPC11C24', 'LPC11C24',

View File

@ -124,7 +124,7 @@ class KL46Z(Target):
self.is_disk_virtual = True self.is_disk_virtual = True
class K20D5M(Target): class K20D50M(Target):
def __init__(self): def __init__(self):
Target.__init__(self) Target.__init__(self)
self.core = "Cortex-M4" self.core = "Cortex-M4"
@ -550,7 +550,7 @@ TARGETS = [
KL05Z(), KL05Z(),
KL25Z(), KL25Z(),
KL46Z(), KL46Z(),
K20D5M(), K20D50M(),
K64F(), K64F(),
LPC812(), LPC812(),
LPC810(), LPC810(),