From bb65961089deaf78d086c27799885d4aa3034622 Mon Sep 17 00:00:00 2001 From: Maciej Bojczuk Date: Mon, 13 Jun 2016 11:25:32 +0200 Subject: [PATCH] [NUCLEO_F030R8] Set NVIC Timer priorities This fix is a solution for issue #816 when having two separate IRQ handlers in Timers (UPDATE Irq and OutputCompare Irq). The update priority needs to be higher to avoid undefined behaviours. Change-Id: Ic143ed0f3e4e42ad5f7b95337d8c005b7ec61274 --- .../TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c index 7c7314d9f3..9547c9bc45 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c @@ -128,8 +128,10 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { // Output compare channel 2 interrupt for HAL tick NVIC_SetVector(TIM_MST_UP_IRQ, (uint32_t)timer_update_irq_handler); NVIC_EnableIRQ(TIM_MST_UP_IRQ); + NVIC_SetPriority(TIM_MST_UP_IRQ, 0); NVIC_SetVector(TIM_MST_OC_IRQ, (uint32_t)timer_oc_irq_handler); NVIC_EnableIRQ(TIM_MST_OC_IRQ); + NVIC_SetPriority(TIM_MST_OC_IRQ, 1); // Enable interrupts __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_UPDATE); // For 32-bit counter