mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #4638 from bcostm/fix_cmsis5_disco_l475vg
DISCO_L475VG_IOT01A: Fix startup files for cmsis5pull/3912/merge
Jimmy Brisson
GitHub
commit
bb3bedad79
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@ -83,7 +83,7 @@
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*/
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#include "stm32l4xx.h"
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#include "hal_tick.h"
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#include "nvic_addr.h"
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
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@ -215,20 +215,9 @@ void SystemInit(void)
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
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#endif
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/* Configure the Cube driver */
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SystemCoreClock = MSI_VALUE; // At this stage the MSI is used as system clock
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HAL_Init();
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/* Configure the System clock source, PLL Multiplier and Divider factors,
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AHB/APBx prescalers and Flash settings */
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SetSysClock();
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/* Reset the timer to avoid issues after the RAM initialization */
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TIM_MST_RESET_ON;
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TIM_MST_RESET_OFF;
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}
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/**
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@ -1,3 +1,4 @@
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#! armcc -E
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; Scatter-Loading Description File
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright (c) 2015, STMicroelectronics
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@ -27,10 +28,18 @@
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
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LR_IROM1 0x08000000 0x100000 { ; load region size_region
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x08000000
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#endif
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ER_IROM1 0x08000000 0x100000 { ; load address = execution address
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x100000
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#endif
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; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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@ -1,3 +1,4 @@
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#! armcc -E
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; Scatter-Loading Description File
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright (c) 2015, STMicroelectronics
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@ -27,10 +28,18 @@
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
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LR_IROM1 0x08000000 0x100000 { ; load region size_region
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x08000000
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#endif
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ER_IROM1 0x08000000 0x100000 { ; load address = execution address
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x100000
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#endif
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; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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@ -1,7 +1,15 @@
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x08000000
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 1024k
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#endif
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/* Linker script to configure memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
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FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
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SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
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SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
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}
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@ -1,13 +1,16 @@
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/* [ROM = 1024kb = 0x100000] */
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define symbol __intvec_start__ = 0x08000000;
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define symbol __region_ROM_start__ = 0x08000000;
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define symbol __region_ROM_end__ = 0x080FFFFF;
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if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
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if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
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/* [RAM = 128kb = 96kb + 32kb = 0x20000] */
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/* [ROM = 1024kb = 0x100000] */
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define symbol __intvec_start__ = MBED_APP_START;
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define symbol __region_ROM_start__ = MBED_APP_START;
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define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
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/* [RAM = 96kb + 32kb = 0x20000] */
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/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
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define symbol __NVIC_start__ = 0x10000000;
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define symbol __NVIC_end__ = 0x10000187;
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define symbol __region_SRAM2_start__ = 0x10000188; /* This adress is 8-byte aligned */
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define symbol __NVIC_end__ = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */
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define symbol __region_SRAM2_start__ = 0x10000188;
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define symbol __region_SRAM2_end__ = 0x10007FFF;
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define symbol __region_SRAM1_start__ = 0x20000000;
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define symbol __region_SRAM1_end__ = 0x20017FFF;
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@ -0,0 +1,40 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2017-2017 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef NVIC_ADDR_H
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#define NVIC_ADDR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(__ICCARM__)
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#pragma section=".intvec"
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#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec"))
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#elif defined(__CC_ARM)
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extern uint32_t Load$$LR$$LR_IROM1$$Base[];
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#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base)
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#elif defined(__GNUC__)
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extern uint32_t g_pfnVectors[];
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#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors)
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#else
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#error "Flash vector address not set for this toolchain"
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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