mirror of https://github.com/ARMmbed/mbed-os.git
[M453] Fix EADC module is initialized multiple times
Also fix EADC module name EADC is hardcoded.pull/3309/head
parent
35b2ad5a2c
commit
bb1617c5f8
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@ -23,76 +23,25 @@
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#include "PeripheralPins.h"
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#include "nu_modutil.h"
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struct nu_adc_var {
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uint32_t en_msk;
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};
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static struct nu_adc_var adc0_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc1_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc2_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc3_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc4_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc5_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc6_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc7_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc8_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc9_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc10_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc11_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc12_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc13_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc14_var = {
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.en_msk = 0
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};
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static struct nu_adc_var adc15_var = {
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.en_msk = 0
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};
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static uint32_t eadc_modinit_mask = 0;
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static const struct nu_modinit_s adc_modinit_tab[] = {
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{ADC_0_0, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc0_var},
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{ADC_0_1, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc1_var},
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{ADC_0_2, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc2_var},
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{ADC_0_3, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc3_var},
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{ADC_0_4, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc4_var},
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{ADC_0_5, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc5_var},
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{ADC_0_6, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc6_var},
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{ADC_0_7, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc7_var},
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{ADC_0_8, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc8_var},
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{ADC_0_9, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc9_var},
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{ADC_0_10, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc10_var},
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{ADC_0_11, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc11_var},
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{ADC_0_12, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc12_var},
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{ADC_0_13, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc13_var},
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{ADC_0_14, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc14_var},
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{ADC_0_15, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, &adc15_var},
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{ADC_0_0, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_1, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_2, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_3, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_4, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_5, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_6, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_7, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_8, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_9, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_10, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_11, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_12, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_13, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_14, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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{ADC_0_15, EADC_MODULE, 0, CLK_CLKDIV0_EADC(8), EADC_RST, ADC00_IRQn, NULL},
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};
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void analogin_init(analogin_t *obj, PinName pin)
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@ -107,7 +56,7 @@ void analogin_init(analogin_t *obj, PinName pin)
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EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
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// NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module.
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if (! ((struct nu_adc_var *) modinit->var)->en_msk) {
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if (! eadc_modinit_mask) {
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// Reset this module if no channel enabled
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SYS_ResetModule(modinit->rsetidx);
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@ -116,9 +65,6 @@ void analogin_init(analogin_t *obj, PinName pin)
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// Enable clock of paired channels
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CLK_EnableModuleClock(modinit->clkidx);
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// Power on ADC
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//ADC_POWER_ON(ADC);
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// Set the ADC internal sampling time, input mode as single-end and enable the A/D converter
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EADC_Open(eadc_base, EADC_CTL_DIFFEN_SINGLE_END);
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EADC_SetInternalSampleTime(eadc_base, 6);
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@ -130,9 +76,9 @@ void analogin_init(analogin_t *obj, PinName pin)
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pinmap_pinout(pin, PinMap_ADC);
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// Configure the sample module Nmod for analog input channel Nch and software trigger source
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EADC_ConfigSampleModule(EADC, chn, EADC_SOFTWARE_TRIGGER, chn);
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EADC_ConfigSampleModule(eadc_base, chn, EADC_SOFTWARE_TRIGGER, chn);
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((struct nu_adc_var *) modinit->var)->en_msk |= 1 << chn;
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eadc_modinit_mask |= 1 << chn;
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}
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uint16_t analogin_read_u16(analogin_t *obj)
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