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STM32L1 baremetal support

pull/13001/head
jeromecoutant 2020-05-15 17:43:00 +02:00
parent 59df4efaac
commit ba7deb4660
4 changed files with 169 additions and 107 deletions
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80
targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct
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@ -1,53 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
; STM32L152RE: 512KB FLASH + 80KB SRAM #if !defined(MBED_BOOT_STACK_SIZE)
LR_IROM1 0x08000000 0x80000 { ; load region size_region /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
ER_IROM1 0x08000000 0x80000 { ; load address = execution address /* Round up VECTORS_SIZE to 8 bytes */
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4)to be reserved in RAM RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0x128) (0x14000-0x128-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x14000) EMPTY -Stack_Size { ; stack
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

68
targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld
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@ -1,19 +1,44 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
STACK_SIZE = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
/* 512KB FLASH, 80KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292 FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
* bytes (0x124) in RAM. But all GCC scripts seem to require BootRAM @0x138 RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
* 8-byte aligned(0x13C) = 0x140
*/
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512k
RAM (rwx) : ORIGIN = 0x20000140, LENGTH = 0x14000-0x140
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
@ -51,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -73,7 +99,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -87,7 +113,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -108,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -124,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -139,9 +177,9 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -157,7 +195,7 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */

70
targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf
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@ -1,33 +1,59 @@
/* [ROM = 64kb = 0x10000] */ /* Linker script to configure memory regions.
define symbol __intvec_start__ = 0x08000000; *
define symbol __region_ROM_start__ = 0x08000000; * SPDX-License-Identifier: BSD-3-Clause
define symbol __region_ROM_end__ = 0x0807FFFF; ******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* [RAM = 80kb = 0x14000] Vector table dynamic copy: 73 vectors = 292 bytes (0x124) to be reserved in RAM */ /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x20000127; /* Add 4 more bytes to be aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x20000128;
define symbol __region_RAM_end__ = 0x20013FFF;
/* Memory regions */ define symbol VECTORS = 73; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define memory mem with size = 4G; define symbol HEAP_SIZE = 0x4000;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x5000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
block CSTACK, block HEAP };

58
targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/cmsis_nvic.h
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@ -1,41 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
******************************************************************************* * SPDX-License-Identifier: BSD-3-Clause
* Copyright (c) 2014, STMicroelectronics ******************************************************************************
* All rights reserved. * @attention
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// STM32L152RE #if !defined(MBED_ROM_START)
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #define MBED_ROM_START 0x8000000
// MCU Peripherals: 57 vectors = 228 bytes from 0x40 to 0x123 #endif
// Total: 73 vectors = 292 bytes (0x124) to be reserved in RAM
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x80000 // 512 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x14000 // 80 KB
#endif
#define NVIC_NUM_VECTORS 73 #define NVIC_NUM_VECTORS 73
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif