mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #9678 from lrusinowicz/sequana_psa_deepsleep
FUTURE_SEQUANA_PSA: fixed deep sleep modepull/9710/head
commit
ba7aa88715
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@ -67,9 +67,13 @@
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* multiplexer. This requires that we define which of the 32 NVIC channels is used
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* by which interrupt. This is done here.
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*/
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#define CY_M0_CORE_IRQ_CHANNEL_US_TICKER ((IRQn_Type)0)
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#define CY_M0_CORE_IRQ_CHANNEL_LP_TICKER ((IRQn_Type)0)
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#define CY_M0_CORE_IRQ_CHANNEL_IPC_SYS ((IRQn_Type)1)
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#define CY_M0_CORE_IRQ_CHANNEL_IPC_USR ((IRQn_Type)2)
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#define CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX ((IRQn_Type)3)
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#define CY_M0_CORE_IRQ_CHANNEL_SERIAL ((IRQn_Type)4)
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#define CY_M0_CORE_IRQ_CHANNEL_BLE ((IRQn_Type)3)
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#define CY_M0_CORE_IRQ_CHANNEL_BLE ((IRQn_Type)7)
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#define CY_M0_CORE_IRQ_CHANNEL_US_TICKER ((IRQn_Type)8)
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/** Identifiers used in allocation of NVIC channels.
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*/
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@ -78,4 +82,5 @@
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#define CY_BLE_IRQN_ID (0x300)
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#define CY_GPIO_IRQN_ID (0x400)
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#define CY_LP_TICKER_IRQN_ID (0x500)
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#define CY_PSA_MAILBOX_IRQN_ID (0x600)
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#endif
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@ -20,12 +20,13 @@
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#include "spm_api.h"
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#include "cmsis.h"
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#include "device.h"
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#include "cyip_ipc.h"
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#include "cy_ipc_drv.h"
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#include "cy_syslib.h"
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#include "cy_sysint.h"
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#include "psoc6_utils.h"
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#include "mbed_error.h"
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/* ------------------------------------ Definitions ---------------------------------- */
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@ -65,9 +66,12 @@ void mailbox_init(void)
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// Configure interrupts ISR / MUX and priority
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cy_stc_sysint_t ipc_intr_Config;
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ipc_intr_Config.intrSrc = (IRQn_Type)NvicMux3_IRQn; // Can be any Mux we choose
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ipc_intr_Config.intrSrc = CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX;
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ipc_intr_Config.cm0pSrc = (cy_en_intr_t)cpuss_interrupts_ipc_0_IRQn + SPM_IPC_NOTIFY_CM0P_INTR; // Must match the interrupt we trigger using NOTIFY on CM4
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ipc_intr_Config.intrPriority = 1;
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if (cy_m0_nvic_reserve_channel(CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX, CY_PSA_MAILBOX_IRQN_ID) == (IRQn_Type)(-1)) {
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error("PSA SPM Mailbox NVIC channel reservation conflict.");
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}
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(void)Cy_SysInt_Init(&ipc_intr_Config, ipc_interrupt_handler);
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// Set specific NOTIFY interrupt mask only.
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -64,7 +64,7 @@ static cy_stc_mcwdt_config_t config = {
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static cy_stc_sysint_t lpt_sysint_config = {
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#if defined(TARGET_MCU_PSOC6_M0)
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.intrSrc = (IRQn_Type)(-1),
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.cm0pSrc = LPT_INTERRUPT_SOURCE,
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.cm0pSrc = CY_M0_CORE_IRQ_CHANNEL_LP_TICKER,
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#else
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.intrSrc = LPT_INTERRUPT_SOURCE,
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#endif
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@ -82,11 +82,10 @@ void lp_ticker_init(void)
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}
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#ifdef TARGET_MCU_PSOC6_M0
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// Allocate NVIC channel.
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lpt_sysint_config.intrSrc = cy_m0_nvic_allocate_channel(CY_LP_TICKER_IRQN_ID);
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if (lpt_sysint_config.intrSrc == (IRQn_Type)(-1)) {
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// Reserve NVIC channel.
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if (cy_m0_nvic_reserve_channel(CY_M0_CORE_IRQ_CHANNEL_LP_TICKER, CY_LP_TICKER_IRQN_ID) == (IRQn_Type)(-1)) {
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// No free NVIC channel.
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error("LP_TICKER NVIC channel allocation failed.");
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error("LP_TICKER NVIC channel reservation conflict.");
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return;
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}
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#endif
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@ -343,6 +343,10 @@ void cy_free_tcpwm(uint32_t tcpwm_num)
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#if defined(TARGET_MCU_PSOC6_M0)
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#define NUM_NVIC_CHANNELS ((uint32_t)(NvicMux31_IRQn - NvicMux0_IRQn) + 1)
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/*
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* First 8 NVIC channels are wakeup-capable, we reserve them for manual allocation.
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*/
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#define FIRST_ALLOC_CHANNEL ((uint32_t)(NvicMux8_IRQn - NvicMux0_IRQn))
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static uint32_t irq_channels[NUM_NVIC_CHANNELS] = {0};
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@ -354,7 +358,7 @@ IRQn_Type cy_m0_nvic_allocate_channel(uint32_t channel_id)
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MBED_ASSERT(channel_id);
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core_util_critical_section_enter();
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for (chn = 0; chn < NUM_NVIC_CHANNELS; ++chn) {
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for (chn = FIRST_ALLOC_CHANNEL; chn < NUM_NVIC_CHANNELS; ++chn) {
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if (irq_channels[chn] == 0) {
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irq_channels[chn] = channel_id;
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alloc = NvicMux0_IRQn + chn;
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@ -7990,6 +7990,7 @@
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"components_add": ["SPM_MAILBOX", "FLASHIAP"],
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"extra_labels_add": ["PSA", "MBED_SPM"],
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"macros_add": [
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"MBED_TICKLESS",
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"PSOC6_DYNSRM_DISABLE=1",
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"MBEDTLS_PSA_CRYPTO_SPM",
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"MBEDTLS_PSA_CRYPTO_C",
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