Merge pull request #9678 from lrusinowicz/sequana_psa_deepsleep

FUTURE_SEQUANA_PSA: fixed deep sleep mode
pull/9710/head
Martin Kojtal 2019-02-13 11:33:09 +01:00 committed by GitHub
commit ba7aa88715
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7 changed files with 29698 additions and 28969 deletions

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@ -67,9 +67,13 @@
* multiplexer. This requires that we define which of the 32 NVIC channels is used
* by which interrupt. This is done here.
*/
#define CY_M0_CORE_IRQ_CHANNEL_US_TICKER ((IRQn_Type)0)
#define CY_M0_CORE_IRQ_CHANNEL_LP_TICKER ((IRQn_Type)0)
#define CY_M0_CORE_IRQ_CHANNEL_IPC_SYS ((IRQn_Type)1)
#define CY_M0_CORE_IRQ_CHANNEL_IPC_USR ((IRQn_Type)2)
#define CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX ((IRQn_Type)3)
#define CY_M0_CORE_IRQ_CHANNEL_SERIAL ((IRQn_Type)4)
#define CY_M0_CORE_IRQ_CHANNEL_BLE ((IRQn_Type)3)
#define CY_M0_CORE_IRQ_CHANNEL_BLE ((IRQn_Type)7)
#define CY_M0_CORE_IRQ_CHANNEL_US_TICKER ((IRQn_Type)8)
/** Identifiers used in allocation of NVIC channels.
*/
@ -78,4 +82,5 @@
#define CY_BLE_IRQN_ID (0x300)
#define CY_GPIO_IRQN_ID (0x400)
#define CY_LP_TICKER_IRQN_ID (0x500)
#define CY_PSA_MAILBOX_IRQN_ID (0x600)
#endif

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@ -20,12 +20,13 @@
#include "spm_api.h"
#include "cmsis.h"
#include "device.h"
#include "cyip_ipc.h"
#include "cy_ipc_drv.h"
#include "cy_syslib.h"
#include "cy_sysint.h"
#include "psoc6_utils.h"
#include "mbed_error.h"
/* ------------------------------------ Definitions ---------------------------------- */
@ -65,9 +66,12 @@ void mailbox_init(void)
// Configure interrupts ISR / MUX and priority
cy_stc_sysint_t ipc_intr_Config;
ipc_intr_Config.intrSrc = (IRQn_Type)NvicMux3_IRQn; // Can be any Mux we choose
ipc_intr_Config.intrSrc = CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX;
ipc_intr_Config.cm0pSrc = (cy_en_intr_t)cpuss_interrupts_ipc_0_IRQn + SPM_IPC_NOTIFY_CM0P_INTR; // Must match the interrupt we trigger using NOTIFY on CM4
ipc_intr_Config.intrPriority = 1;
if (cy_m0_nvic_reserve_channel(CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX, CY_PSA_MAILBOX_IRQN_ID) == (IRQn_Type)(-1)) {
error("PSA SPM Mailbox NVIC channel reservation conflict.");
}
(void)Cy_SysInt_Init(&ipc_intr_Config, ipc_interrupt_handler);
// Set specific NOTIFY interrupt mask only.

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@ -64,7 +64,7 @@ static cy_stc_mcwdt_config_t config = {
static cy_stc_sysint_t lpt_sysint_config = {
#if defined(TARGET_MCU_PSOC6_M0)
.intrSrc = (IRQn_Type)(-1),
.cm0pSrc = LPT_INTERRUPT_SOURCE,
.cm0pSrc = CY_M0_CORE_IRQ_CHANNEL_LP_TICKER,
#else
.intrSrc = LPT_INTERRUPT_SOURCE,
#endif
@ -82,11 +82,10 @@ void lp_ticker_init(void)
}
#ifdef TARGET_MCU_PSOC6_M0
// Allocate NVIC channel.
lpt_sysint_config.intrSrc = cy_m0_nvic_allocate_channel(CY_LP_TICKER_IRQN_ID);
if (lpt_sysint_config.intrSrc == (IRQn_Type)(-1)) {
// Reserve NVIC channel.
if (cy_m0_nvic_reserve_channel(CY_M0_CORE_IRQ_CHANNEL_LP_TICKER, CY_LP_TICKER_IRQN_ID) == (IRQn_Type)(-1)) {
// No free NVIC channel.
error("LP_TICKER NVIC channel allocation failed.");
error("LP_TICKER NVIC channel reservation conflict.");
return;
}
#endif

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@ -343,6 +343,10 @@ void cy_free_tcpwm(uint32_t tcpwm_num)
#if defined(TARGET_MCU_PSOC6_M0)
#define NUM_NVIC_CHANNELS ((uint32_t)(NvicMux31_IRQn - NvicMux0_IRQn) + 1)
/*
* First 8 NVIC channels are wakeup-capable, we reserve them for manual allocation.
*/
#define FIRST_ALLOC_CHANNEL ((uint32_t)(NvicMux8_IRQn - NvicMux0_IRQn))
static uint32_t irq_channels[NUM_NVIC_CHANNELS] = {0};
@ -354,7 +358,7 @@ IRQn_Type cy_m0_nvic_allocate_channel(uint32_t channel_id)
MBED_ASSERT(channel_id);
core_util_critical_section_enter();
for (chn = 0; chn < NUM_NVIC_CHANNELS; ++chn) {
for (chn = FIRST_ALLOC_CHANNEL; chn < NUM_NVIC_CHANNELS; ++chn) {
if (irq_channels[chn] == 0) {
irq_channels[chn] = channel_id;
alloc = NvicMux0_IRQn + chn;

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@ -7990,6 +7990,7 @@
"components_add": ["SPM_MAILBOX", "FLASHIAP"],
"extra_labels_add": ["PSA", "MBED_SPM"],
"macros_add": [
"MBED_TICKLESS",
"PSOC6_DYNSRM_DISABLE=1",
"MBEDTLS_PSA_CRYPTO_SPM",
"MBEDTLS_PSA_CRYPTO_C",