mirror of https://github.com/ARMmbed/mbed-os.git
Merge branch 'master' of https://github.com/mbedmicro/mbed
commit
ba5efc7b12
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@ -3,7 +3,7 @@
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||||||
* @file system_stm32l1xx.c
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* @file system_stm32l1xx.c
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||||||
* @author MCD Application Team
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* @author MCD Application Team
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||||||
* @version V1.2.0
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* @version V1.2.0
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||||||
* @date 11-January-2014
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* @date 14-March-2014
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* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
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* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
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* This file contains the system clock configuration for STM32L1xx Ultra
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* This file contains the system clock configuration for STM32L1xx Ultra
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||||||
* Low power devices, and is generated by the clock configuration
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* Low power devices, and is generated by the clock configuration
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@ -43,11 +43,11 @@
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*=============================================================================
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*=============================================================================
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* System Clock Configuration
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* System Clock Configuration
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*=============================================================================
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*=============================================================================
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* System clock source | HSI
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* System Clock source | PLL(HSI)
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* SYSCLK | 16000000 Hz
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* SYSCLK | 32000000 Hz
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* HCLK | 16000000 Hz
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* HCLK | 32000000 Hz
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* AHB Prescaler | 1
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* AHB Prescaler | 1
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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@ -55,17 +55,17 @@
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* APB2 Prescaler | 1
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* APB2 Prescaler | 1
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* HSE Frequency | 8000000 Hz
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* HSE Frequency | Not used
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* PLL DIV | Not Used
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* PLL DIV | 2
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||||||
*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* PLL MUL | Not Used
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* PLL MUL | 4
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* VDD | 3.3 V
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* VDD | 3.3 V
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* Vcore | 1.8 V (Range 1)
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* Vcore | 1.8 V (Range 1)
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* Flash Latency | 0 WS
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* Flash Latency | 1 WS
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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* Require 48MHz for USB clock | Disabled
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* Require 48MHz for USB clock | Disabled
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*-----------------------------------------------------------------------------
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*-----------------------------------------------------------------------------
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@ -149,7 +149,7 @@
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/** @addtogroup STM32L1xx_System_Private_Variables
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/** @addtogroup STM32L1xx_System_Private_Variables
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* @{
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* @{
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*/
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*/
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uint32_t SystemCoreClock = 16000000;
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uint32_t SystemCoreClock = 32000000;
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__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
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__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
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__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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@ -161,7 +161,7 @@ __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}
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* @{
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* @{
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*/
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*/
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static void SetSysClock(void);
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void SetSysClock(void);
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/**
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/**
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* @}
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* @}
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@ -206,6 +206,23 @@ void SystemInit (void)
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#else
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
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#endif
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#endif
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/* ADDED FOR MBED DEBUG PURPOSE */
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/*
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// Enable the GPIOA peripheral
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
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// Output the system clock on MCO pin (PA.08)
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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// Select the clock to output on MCO pin (PA.08)
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RCC_MCOConfig(RCC_MCOSource_SYSCLK, RCC_MCODiv_1);
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//RCC_MCOConfig(RCC_MCOSource_HSI, RCC_MCODiv_1);
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*/
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}
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}
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/**
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/**
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@ -305,7 +322,7 @@ void SystemCoreClockUpdate (void)
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* @param None
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* @param None
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* @retval None
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* @retval None
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||||||
*/
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*/
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static void SetSysClock(void)
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void SetSysClock(void)
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{
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{
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__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
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__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
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@ -330,42 +347,54 @@ static void SetSysClock(void)
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if (HSIStatus == (uint32_t)0x01)
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if (HSIStatus == (uint32_t)0x01)
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{
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{
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/* Flash 0 wait state */
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/* Enable 64-bit access */
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FLASH->ACR &= ~FLASH_ACR_LATENCY;
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FLASH->ACR |= FLASH_ACR_ACC64;
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/* Disable Prefetch Buffer */
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/* Enable Prefetch Buffer */
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FLASH->ACR &= ~FLASH_ACR_PRFTEN;
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FLASH->ACR |= FLASH_ACR_PRFTEN;
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/* Disable 64-bit access */
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/* Flash 1 wait state (latency) */
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FLASH->ACR &= ~FLASH_ACR_ACC64;
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FLASH->ACR |= FLASH_ACR_LATENCY;
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/* Power enable */
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/* Power enable */
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RCC->APB1ENR |= RCC_APB1ENR_PWREN;
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RCC->APB1ENR |= RCC_APB1ENR_PWREN;
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/* Select the Voltage Range 1 (1.8 V) */
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/* Select the Voltage Range 1 (1.8 V) */
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PWR->CR = PWR_CR_VOS_0;
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PWR->CR = PWR_CR_VOS_0;
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/* Wait Until the Voltage Regulator is ready */
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/* Wait Until the Voltage Regulator is ready */
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while((PWR->CSR & PWR_CSR_VOSF) != RESET)
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while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
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{
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{
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||||||
}
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}
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/* HCLK = SYSCLK /1*/
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/* PLL configuration */
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/* SYSCLK = (HSI 16 MHz * 4) / 2 = 32 MHz */
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RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV));
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RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI | RCC_CFGR_PLLMUL4 | RCC_CFGR_PLLDIV2);
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||||||
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/* HCLK = 32 MHz */
|
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RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
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RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
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||||||
/* PCLK2 = HCLK /1*/
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|
||||||
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/* PCLK2 = 32 MHz */
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RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
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RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
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/* PCLK1 = HCLK /1*/
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/* PCLK1 = 32 MHz */
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RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
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RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
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||||||
/* Select HSI as system clock source */
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|
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RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
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RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;
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/* Wait till HSI is used as system clock source */
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/* Enable PLL */
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while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI)
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RCC->CR |= RCC_CR_PLLON;
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/* Wait till PLL is ready */
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while((RCC->CR & RCC_CR_PLLRDY) == 0)
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|
{
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|
}
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/* Select PLL as system clock source */
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RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
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RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
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/* Wait till PLL is used as system clock source */
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while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
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{
|
{
|
||||||
}
|
}
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}
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}
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@ -37,8 +37,7 @@ extern "C" {
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#endif
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#endif
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typedef enum {
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typedef enum {
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ADC_1 = (int)ADC1_BASE,
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ADC_1 = (int)ADC1_BASE
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ADC_2 = (int)ADC_BASE
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} ADCName;
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} ADCName;
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|
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||||||
typedef enum {
|
typedef enum {
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||||||
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|
@ -69,9 +68,13 @@ typedef enum {
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} I2CName;
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} I2CName;
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|
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typedef enum {
|
typedef enum {
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PWM_2 = (int)TIM2_BASE,
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_4 = (int)TIM4_BASE
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PWM_4 = (int)TIM4_BASE,
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PWM_5 = (int)TIM5_BASE,
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||||||
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PWM_9 = (int)TIM9_BASE,
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PWM_10 = (int)TIM10_BASE,
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||||||
|
PWM_11 = (int)TIM11_BASE
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||||||
} PWMName;
|
} PWMName;
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||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
|
|
||||||
|
|
@ -143,6 +143,8 @@ typedef enum {
|
||||||
LED3 = PA_5,
|
LED3 = PA_5,
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LED4 = PA_5,
|
LED4 = PA_5,
|
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USER_BUTTON = PC_13,
|
USER_BUTTON = PC_13,
|
||||||
|
SERIAL_TX = PA_2,
|
||||||
|
SERIAL_RX = PA_3,
|
||||||
USBTX = PA_2,
|
USBTX = PA_2,
|
||||||
USBRX = PA_3,
|
USBRX = PA_3,
|
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I2C_SCL = PB_8,
|
I2C_SCL = PB_8,
|
||||||
|
|
|
||||||
|
|
@ -35,23 +35,36 @@
|
||||||
#include "error.h"
|
#include "error.h"
|
||||||
|
|
||||||
static const PinMap PinMap_ADC[] = {
|
static const PinMap PinMap_ADC[] = {
|
||||||
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN0
|
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN0
|
||||||
{PA_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN1
|
{PA_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN1
|
||||||
{PA_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN4
|
{PA_2, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN2
|
||||||
{PB_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN8
|
{PA_3, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN3
|
||||||
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN11
|
{PA_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN4
|
||||||
{PC_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN10
|
{PA_5, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN5
|
||||||
{NC, NC, 0}
|
{PA_6, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN6
|
||||||
|
{PA_7, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN7
|
||||||
|
{PB_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN8
|
||||||
|
{PB_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN9
|
||||||
|
{PB_12, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN18
|
||||||
|
{PB_13, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN19
|
||||||
|
{PB_14, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN20
|
||||||
|
{PB_15, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN21
|
||||||
|
{PC_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN10
|
||||||
|
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN11
|
||||||
|
{PC_2, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN12
|
||||||
|
{PC_3, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN13
|
||||||
|
{PC_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN14
|
||||||
|
{PC_5, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN15
|
||||||
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
int adc_inited = 0;
|
int adc_inited = 0;
|
||||||
|
|
||||||
void analogin_init(analogin_t *obj, PinName pin) {
|
void analogin_init(analogin_t *obj, PinName pin) {
|
||||||
|
ADC_TypeDef *adc;
|
||||||
ADC_TypeDef *adc;
|
|
||||||
ADC_InitTypeDef ADC_InitStructure;
|
ADC_InitTypeDef ADC_InitStructure;
|
||||||
|
|
||||||
// Get the peripheral name (ADC_1, ADC_2...) from the pin and assign it to the object
|
// Get the peripheral name from the pin and assign it to the object
|
||||||
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
|
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
|
||||||
|
|
||||||
if (obj->adc == (ADCName)NC) {
|
if (obj->adc == (ADCName)NC) {
|
||||||
|
|
@ -92,31 +105,76 @@ void analogin_init(analogin_t *obj, PinName pin) {
|
||||||
static inline uint16_t adc_read(analogin_t *obj) {
|
static inline uint16_t adc_read(analogin_t *obj) {
|
||||||
// Get ADC registers structure address
|
// Get ADC registers structure address
|
||||||
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
|
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
|
||||||
|
uint8_t channel = 0;
|
||||||
|
|
||||||
// Configure ADC channel
|
// Configure ADC channel
|
||||||
switch (obj->pin) {
|
switch (obj->pin) {
|
||||||
case PA_0:
|
case PA_0:
|
||||||
ADC_RegularChannelConfig(adc, ADC_Channel_0, 1, ADC_SampleTime_4Cycles);
|
channel = ADC_Channel_0;
|
||||||
break;
|
break;
|
||||||
case PA_1:
|
case PA_1:
|
||||||
ADC_RegularChannelConfig(adc, ADC_Channel_1, 1, ADC_SampleTime_4Cycles);
|
channel = ADC_Channel_1;
|
||||||
break;
|
break;
|
||||||
|
case PA_2:
|
||||||
|
channel = ADC_Channel_2;
|
||||||
|
break;
|
||||||
|
case PA_3:
|
||||||
|
channel = ADC_Channel_3;
|
||||||
|
break;
|
||||||
case PA_4:
|
case PA_4:
|
||||||
ADC_RegularChannelConfig(adc, ADC_Channel_4, 1, ADC_SampleTime_4Cycles);
|
channel = ADC_Channel_4;
|
||||||
break;
|
break;
|
||||||
|
case PA_5:
|
||||||
|
channel = ADC_Channel_5;
|
||||||
|
break;
|
||||||
|
case PA_6:
|
||||||
|
channel = ADC_Channel_6;
|
||||||
|
break;
|
||||||
|
case PA_7:
|
||||||
|
channel = ADC_Channel_7;
|
||||||
|
break;
|
||||||
case PB_0:
|
case PB_0:
|
||||||
ADC_RegularChannelConfig(adc, ADC_Channel_8, 1, ADC_SampleTime_4Cycles);
|
channel = ADC_Channel_8;
|
||||||
|
break;
|
||||||
|
case PB_1:
|
||||||
|
channel = ADC_Channel_9;
|
||||||
|
break;
|
||||||
|
case PB_12:
|
||||||
|
channel = ADC_Channel_18;
|
||||||
|
break;
|
||||||
|
case PB_13:
|
||||||
|
channel = ADC_Channel_19;
|
||||||
|
break;
|
||||||
|
case PB_14:
|
||||||
|
channel = ADC_Channel_20;
|
||||||
|
break;
|
||||||
|
case PB_15:
|
||||||
|
channel = ADC_Channel_21;
|
||||||
|
break;
|
||||||
|
case PC_0:
|
||||||
|
channel = ADC_Channel_10;
|
||||||
break;
|
break;
|
||||||
case PC_1:
|
case PC_1:
|
||||||
ADC_RegularChannelConfig(adc, ADC_Channel_11, 1, ADC_SampleTime_4Cycles);
|
channel = ADC_Channel_11;
|
||||||
break;
|
break;
|
||||||
case PC_0:
|
case PC_2:
|
||||||
ADC_RegularChannelConfig(adc, ADC_Channel_10, 1, ADC_SampleTime_4Cycles);
|
channel = ADC_Channel_12;
|
||||||
break;
|
break;
|
||||||
|
case PC_3:
|
||||||
|
channel = ADC_Channel_13;
|
||||||
|
break;
|
||||||
|
case PC_4:
|
||||||
|
channel = ADC_Channel_14;
|
||||||
|
break;
|
||||||
|
case PC_5:
|
||||||
|
channel = ADC_Channel_15;
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_4Cycles);
|
||||||
|
|
||||||
ADC_SoftwareStartConv(adc); // Start conversion
|
ADC_SoftwareStartConv(adc); // Start conversion
|
||||||
|
|
||||||
while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
|
while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
|
||||||
|
|
|
||||||
|
|
@ -37,7 +37,7 @@
|
||||||
|
|
||||||
static const PinMap PinMap_DAC[] = {
|
static const PinMap PinMap_DAC[] = {
|
||||||
{PA_4, DAC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // DAC_OUT1
|
{PA_4, DAC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // DAC_OUT1
|
||||||
//{PA_5, DAC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // DAC_OUT2 - Cannot be used due to the LED connected on it
|
{PA_5, DAC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // DAC_OUT2
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -61,20 +61,20 @@ void analogout_init(dac_t *obj, PinName pin) {
|
||||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
|
||||||
|
|
||||||
// Configure and enable DAC channel
|
// Configure and enable DAC channel
|
||||||
DAC_InitStructure.DAC_Trigger = DAC_Trigger_None;
|
DAC_InitStructure.DAC_Trigger = DAC_Trigger_None;
|
||||||
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
|
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
|
||||||
DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
|
DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
|
||||||
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable;
|
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable;
|
||||||
|
|
||||||
if (obj->channel == PA_4) {
|
if (obj->channel == PA_4) {
|
||||||
DAC_Init(DAC_Channel_1, &DAC_InitStructure);
|
DAC_Init(DAC_Channel_1, &DAC_InitStructure);
|
||||||
DAC_Cmd(DAC_Channel_1, ENABLE);
|
DAC_Cmd(DAC_Channel_1, ENABLE);
|
||||||
}
|
}
|
||||||
//if (obj->channel == PA_5) {
|
if (obj->channel == PA_5) {
|
||||||
// DAC_Init(DAC_Channel_2, &DAC_InitStructure);
|
DAC_Init(DAC_Channel_2, &DAC_InitStructure);
|
||||||
// DAC_Cmd(DAC_Channel_2, ENABLE);
|
DAC_Cmd(DAC_Channel_2, ENABLE);
|
||||||
//}
|
}
|
||||||
|
|
||||||
analogout_write_u16(obj, 0);
|
analogout_write_u16(obj, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -83,20 +83,20 @@ void analogout_free(dac_t *obj) {
|
||||||
|
|
||||||
static inline void dac_write(dac_t *obj, uint16_t value) {
|
static inline void dac_write(dac_t *obj, uint16_t value) {
|
||||||
if (obj->channel == PA_4) {
|
if (obj->channel == PA_4) {
|
||||||
DAC_SetChannel1Data(DAC_Align_12b_R, value);
|
DAC_SetChannel1Data(DAC_Align_12b_R, value);
|
||||||
|
}
|
||||||
|
if (obj->channel == PA_5) {
|
||||||
|
DAC_SetChannel2Data(DAC_Align_12b_R, value);
|
||||||
}
|
}
|
||||||
//if (obj->channel == PA_5) {
|
|
||||||
// DAC_SetChannel2Data(DAC_Align_12b_R, value);
|
|
||||||
//}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline int dac_read(dac_t *obj) {
|
static inline int dac_read(dac_t *obj) {
|
||||||
if (obj->channel == PA_4) {
|
if (obj->channel == PA_4) {
|
||||||
return (int)DAC_GetDataOutputValue(DAC_Channel_1);
|
return (int)DAC_GetDataOutputValue(DAC_Channel_1);
|
||||||
|
}
|
||||||
|
if (obj->channel == PA_5) {
|
||||||
|
return (int)DAC_GetDataOutputValue(DAC_Channel_2);
|
||||||
}
|
}
|
||||||
//if (obj->channel == PA_5) {
|
|
||||||
// return (int)DAC_GetDataOutputValue(DAC_Channel_2);
|
|
||||||
//}
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -42,10 +42,10 @@
|
||||||
#define DEVICE_SERIAL 1
|
#define DEVICE_SERIAL 1
|
||||||
|
|
||||||
#define DEVICE_I2C 1
|
#define DEVICE_I2C 1
|
||||||
#define DEVICE_I2CSLAVE 0
|
#define DEVICE_I2CSLAVE 0 // Not yet supported
|
||||||
|
|
||||||
#define DEVICE_SPI 1
|
#define DEVICE_SPI 1
|
||||||
#define DEVICE_SPISLAVE 0
|
#define DEVICE_SPISLAVE 0 // Not yet supported
|
||||||
|
|
||||||
#define DEVICE_RTC 1
|
#define DEVICE_RTC 1
|
||||||
|
|
||||||
|
|
@ -63,7 +63,7 @@
|
||||||
|
|
||||||
#define DEVICE_STDIO_MESSAGES 1
|
#define DEVICE_STDIO_MESSAGES 1
|
||||||
|
|
||||||
//#define DEVICE_ERROR_RED 0
|
#define DEVICE_ERROR_RED 0
|
||||||
|
|
||||||
#include "objects.h"
|
#include "objects.h"
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -90,21 +90,24 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
||||||
void i2c_frequency(i2c_t *obj, int hz) {
|
void i2c_frequency(i2c_t *obj, int hz) {
|
||||||
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
I2C_InitTypeDef I2C_InitStructure;
|
I2C_InitTypeDef I2C_InitStructure;
|
||||||
|
|
||||||
|
if (hz == 0) return;
|
||||||
|
if (hz > 400000) hz = 400000;
|
||||||
|
|
||||||
|
/* Warning: To use the I2C at 400 kHz (in fast mode), the PCLK1 frequency
|
||||||
|
(I2C peripheral input clock) must be a multiple of 10 MHz.
|
||||||
|
With the actual clock configuration, the max frequency is measured at 296 kHz */
|
||||||
|
|
||||||
if ((hz != 0) && (hz <= 400000)) {
|
// I2C configuration
|
||||||
I2C_DeInit(i2c);
|
I2C_DeInit(i2c);
|
||||||
|
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
|
||||||
// I2C configuration
|
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
|
||||||
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
|
I2C_InitStructure.I2C_OwnAddress1 = 0;
|
||||||
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
|
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
|
||||||
I2C_InitStructure.I2C_OwnAddress1 = 0;
|
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
|
||||||
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
|
I2C_InitStructure.I2C_ClockSpeed = hz;
|
||||||
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
|
I2C_Init(i2c, &I2C_InitStructure);
|
||||||
I2C_InitStructure.I2C_ClockSpeed = hz;
|
I2C_Cmd(i2c, ENABLE);
|
||||||
I2C_Init(i2c, &I2C_InitStructure);
|
|
||||||
|
|
||||||
I2C_Cmd(i2c, ENABLE);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
inline int i2c_start(i2c_t *obj) {
|
inline int i2c_start(i2c_t *obj) {
|
||||||
|
|
@ -118,7 +121,6 @@ inline int i2c_start(i2c_t *obj) {
|
||||||
|
|
||||||
// Wait the START condition has been correctly sent
|
// Wait the START condition has been correctly sent
|
||||||
timeout = FLAG_TIMEOUT;
|
timeout = FLAG_TIMEOUT;
|
||||||
//while (I2C_CheckEvent(i2c, I2C_EVENT_MASTER_MODE_SELECT) == ERROR) {
|
|
||||||
while (I2C_GetFlagStatus(i2c, I2C_FLAG_SB) == RESET) {
|
while (I2C_GetFlagStatus(i2c, I2C_FLAG_SB) == RESET) {
|
||||||
timeout--;
|
timeout--;
|
||||||
if (timeout == 0) {
|
if (timeout == 0) {
|
||||||
|
|
@ -131,9 +133,25 @@ inline int i2c_start(i2c_t *obj) {
|
||||||
|
|
||||||
inline int i2c_stop(i2c_t *obj) {
|
inline int i2c_stop(i2c_t *obj) {
|
||||||
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
I2C_GenerateSTOP(i2c, ENABLE);
|
volatile int temp;
|
||||||
|
|
||||||
|
if (I2C_GetFlagStatus(i2c, I2C_FLAG_MSL) == RESET) {
|
||||||
|
timeout = LONG_TIMEOUT;
|
||||||
|
// wait for STOP
|
||||||
|
while (I2C_GetFlagStatus(i2c, I2C_FLAG_STOPF) == RESET) {
|
||||||
|
timeout--;
|
||||||
|
if (timeout == 0) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
temp = i2c->SR1;
|
||||||
|
I2C_Cmd(i2c, ENABLE);
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
I2C_GenerateSTOP(i2c, ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -145,17 +163,6 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||||
|
|
||||||
if (length == 0) return 0;
|
if (length == 0) return 0;
|
||||||
|
|
||||||
/*
|
|
||||||
// Wait until the bus is not busy anymore
|
|
||||||
timeout = LONG_TIMEOUT;
|
|
||||||
while (I2C_GetFlagStatus(i2c, I2C_FLAG_BUSY) == SET) {
|
|
||||||
timeout--;
|
|
||||||
if (timeout == 0) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
i2c_start(obj);
|
i2c_start(obj);
|
||||||
|
|
||||||
// Send slave address for read
|
// Send slave address for read
|
||||||
|
|
@ -193,17 +200,6 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||||
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
int timeout;
|
int timeout;
|
||||||
int count;
|
int count;
|
||||||
|
|
||||||
/*
|
|
||||||
// Wait until the bus is not busy anymore
|
|
||||||
timeout = LONG_TIMEOUT;
|
|
||||||
while (I2C_GetFlagStatus(i2c, I2C_FLAG_BUSY) == SET) {
|
|
||||||
timeout--;
|
|
||||||
if (timeout == 0) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
i2c_start(obj);
|
i2c_start(obj);
|
||||||
|
|
||||||
|
|
@ -268,8 +264,7 @@ int i2c_byte_write(i2c_t *obj, int data) {
|
||||||
I2C_SendData(i2c, (uint8_t)data);
|
I2C_SendData(i2c, (uint8_t)data);
|
||||||
|
|
||||||
// Wait until the byte is transmitted
|
// Wait until the byte is transmitted
|
||||||
timeout = FLAG_TIMEOUT;
|
timeout = FLAG_TIMEOUT;
|
||||||
//while (I2C_CheckEvent(i2c, I2C_EVENT_MASTER_BYTE_TRANSMITTED) == ERROR) {
|
|
||||||
while ((I2C_GetFlagStatus(i2c, I2C_FLAG_TXE) == RESET) &&
|
while ((I2C_GetFlagStatus(i2c, I2C_FLAG_TXE) == RESET) &&
|
||||||
(I2C_GetFlagStatus(i2c, I2C_FLAG_BTF) == RESET)) {
|
(I2C_GetFlagStatus(i2c, I2C_FLAG_BTF) == RESET)) {
|
||||||
timeout--;
|
timeout--;
|
||||||
|
|
@ -319,7 +314,6 @@ void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
||||||
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
|
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
|
||||||
|
|
||||||
int i2c_slave_receive(i2c_t *obj) {
|
int i2c_slave_receive(i2c_t *obj) {
|
||||||
// TO BE DONE
|
|
||||||
return(0);
|
return(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -95,8 +95,7 @@ void pin_function(PinName pin, int data) {
|
||||||
GPIO_InitStructure.GPIO_PuPd = (GPIOPuPd_TypeDef)pupd;
|
GPIO_InitStructure.GPIO_PuPd = (GPIOPuPd_TypeDef)pupd;
|
||||||
GPIO_Init(gpio, &GPIO_InitStructure);
|
GPIO_Init(gpio, &GPIO_InitStructure);
|
||||||
|
|
||||||
// *** TODO ***
|
// [TODO] Disconnect JTAG-DP + SW-DP signals.
|
||||||
// Disconnect JTAG-DP + SW-DP signals.
|
|
||||||
// Warning: Need to reconnect under reset
|
// Warning: Need to reconnect under reset
|
||||||
//if ((pin == PA_13) || (pin == PA_14)) {
|
//if ((pin == PA_13) || (pin == PA_14)) {
|
||||||
//
|
//
|
||||||
|
|
|
||||||
|
|
@ -33,11 +33,43 @@
|
||||||
#include "pinmap.h"
|
#include "pinmap.h"
|
||||||
#include "error.h"
|
#include "error.h"
|
||||||
|
|
||||||
|
// TIM5 cannot be used because already used by the us_ticker
|
||||||
static const PinMap PinMap_PWM[] = {
|
static const PinMap PinMap_PWM[] = {
|
||||||
{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
|
//{PA_0, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH1
|
||||||
{PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
|
{PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
|
||||||
{PB_6, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH1
|
//{PA_1, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH1
|
||||||
{NC, NC, 0}
|
{PA_2, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH3
|
||||||
|
//{PA_2, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH3
|
||||||
|
//{PA_2, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH1
|
||||||
|
{PA_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH4
|
||||||
|
//{PA_3, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH4
|
||||||
|
//{PA_3, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH2
|
||||||
|
{PA_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
|
||||||
|
//{PA_6, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
|
||||||
|
{PA_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH2
|
||||||
|
//{PA_7, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
|
||||||
|
{PB_0, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH3
|
||||||
|
{PB_1, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH4
|
||||||
|
{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
|
||||||
|
{PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
|
||||||
|
{PB_5, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH2
|
||||||
|
{PB_6, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH1
|
||||||
|
{PB_7, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH2
|
||||||
|
{PB_8, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH3
|
||||||
|
//{PB_8, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
|
||||||
|
{PB_9, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH4
|
||||||
|
//{PB_9, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
|
||||||
|
{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH3
|
||||||
|
{PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH4
|
||||||
|
{PB_12, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
|
||||||
|
{PB_13, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH1
|
||||||
|
{PB_14, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH2
|
||||||
|
{PB_15, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
|
||||||
|
{PC_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
|
||||||
|
{PC_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH2
|
||||||
|
{PC_8, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH3
|
||||||
|
{PC_9, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH4
|
||||||
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||||
|
|
@ -52,6 +84,10 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||||
if (obj->pwm == PWM_2) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
|
if (obj->pwm == PWM_2) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
|
||||||
if (obj->pwm == PWM_3) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
|
if (obj->pwm == PWM_3) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
|
||||||
if (obj->pwm == PWM_4) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
|
if (obj->pwm == PWM_4) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
|
||||||
|
if (obj->pwm == PWM_5) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
|
||||||
|
if (obj->pwm == PWM_9) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM9, ENABLE);
|
||||||
|
if (obj->pwm == PWM_10) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM10, ENABLE);
|
||||||
|
if (obj->pwm == PWM_11) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM11, ENABLE);
|
||||||
|
|
||||||
// Configure GPIO
|
// Configure GPIO
|
||||||
pinmap_pinout(pin, PinMap_PWM);
|
pinmap_pinout(pin, PinMap_PWM);
|
||||||
|
|
@ -71,7 +107,7 @@ void pwmout_free(pwmout_t* obj) {
|
||||||
void pwmout_write(pwmout_t* obj, float value) {
|
void pwmout_write(pwmout_t* obj, float value) {
|
||||||
TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
|
TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
|
||||||
TIM_OCInitTypeDef TIM_OCInitStructure;
|
TIM_OCInitTypeDef TIM_OCInitStructure;
|
||||||
|
|
||||||
if (value < 0.0) {
|
if (value < 0.0) {
|
||||||
value = 0.0;
|
value = 0.0;
|
||||||
} else if (value > 1.0) {
|
} else if (value > 1.0) {
|
||||||
|
|
@ -80,21 +116,62 @@ void pwmout_write(pwmout_t* obj, float value) {
|
||||||
|
|
||||||
obj->pulse = (uint32_t)((float)obj->period * value);
|
obj->pulse = (uint32_t)((float)obj->period * value);
|
||||||
|
|
||||||
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
||||||
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
|
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
|
||||||
TIM_OCInitStructure.TIM_Pulse = obj->pulse;
|
TIM_OCInitStructure.TIM_Pulse = obj->pulse;
|
||||||
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
|
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
|
||||||
|
|
||||||
// Configure channel 1
|
// Configure the channels
|
||||||
if ((obj->pin == PB_4) || (obj->pin == PB_6)) {
|
switch (obj->pin) {
|
||||||
TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
|
// Channels 1
|
||||||
TIM_OC1Init(tim, &TIM_OCInitStructure);
|
//case PA_0:
|
||||||
}
|
//case PA_1:
|
||||||
|
//case PA_2:
|
||||||
// Configure channel 2
|
case PA_6:
|
||||||
if (obj->pin == PB_3) {
|
//case PA_7:
|
||||||
TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
|
case PB_4:
|
||||||
TIM_OC2Init(tim, &TIM_OCInitStructure);
|
case PB_6:
|
||||||
|
//case PB_8:
|
||||||
|
//case PB_9:
|
||||||
|
case PB_12:
|
||||||
|
case PB_13:
|
||||||
|
case PB_15:
|
||||||
|
case PC_6:
|
||||||
|
TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
|
||||||
|
TIM_OC1Init(tim, &TIM_OCInitStructure);
|
||||||
|
break;
|
||||||
|
// Channels 2
|
||||||
|
case PA_1:
|
||||||
|
//case PA_3:
|
||||||
|
case PA_7:
|
||||||
|
case PB_3:
|
||||||
|
case PB_5:
|
||||||
|
case PB_7:
|
||||||
|
case PB_14:
|
||||||
|
case PC_7:
|
||||||
|
TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
|
||||||
|
TIM_OC2Init(tim, &TIM_OCInitStructure);
|
||||||
|
break;
|
||||||
|
// Channels 3
|
||||||
|
case PA_2:
|
||||||
|
case PB_0:
|
||||||
|
case PB_8:
|
||||||
|
case PB_10:
|
||||||
|
case PC_8:
|
||||||
|
TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
|
||||||
|
TIM_OC3Init(tim, &TIM_OCInitStructure);
|
||||||
|
break;
|
||||||
|
// Channels 4
|
||||||
|
case PA_3:
|
||||||
|
case PB_1:
|
||||||
|
case PB_9:
|
||||||
|
case PB_11:
|
||||||
|
case PC_9:
|
||||||
|
TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
|
||||||
|
TIM_OC4Init(tim, &TIM_OCInitStructure);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -123,10 +200,10 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
||||||
|
|
||||||
obj->period = us;
|
obj->period = us;
|
||||||
|
|
||||||
TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
|
TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
|
||||||
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
|
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
|
||||||
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
|
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
|
||||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||||
TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
|
TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
|
||||||
|
|
||||||
// Set duty cycle again
|
// Set duty cycle again
|
||||||
|
|
|
||||||
|
|
@ -49,7 +49,7 @@ void rtc_init(void) {
|
||||||
|
|
||||||
RTC_WaitForSynchro(); // Wait for RTC registers synchronization
|
RTC_WaitForSynchro(); // Wait for RTC registers synchronization
|
||||||
|
|
||||||
uint32_t lsi_freq = 40000; // *** TODO** To be measured precisely using a timer input capture
|
uint32_t lsi_freq = 40000; // [TODO] To be measured precisely using a timer input capture
|
||||||
|
|
||||||
RTC_InitTypeDef RTC_InitStructure;
|
RTC_InitTypeDef RTC_InitStructure;
|
||||||
RTC_InitStructure.RTC_AsynchPrediv = 127;
|
RTC_InitStructure.RTC_AsynchPrediv = 127;
|
||||||
|
|
|
||||||
|
|
@ -34,24 +34,24 @@
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
static const PinMap PinMap_UART_TX[] = {
|
static const PinMap PinMap_UART_TX[] = {
|
||||||
|
{PA_2, UART_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART2)},
|
||||||
{PA_9, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
{PA_9, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
||||||
{PB_6, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
{PB_6, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
||||||
{PA_2, UART_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART2)},
|
|
||||||
{PB_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
{PB_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
||||||
{PC_10, UART_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART4)},
|
//{PC_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
||||||
//{PC_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)}, //The consructor will find UART4
|
{PC_10, UART_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART4)},
|
||||||
{PC_12, UART_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART5)}, //which share the same PIN
|
{PC_12, UART_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART5)},
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
static const PinMap PinMap_UART_RX[] = {
|
static const PinMap PinMap_UART_RX[] = {
|
||||||
{PA_10, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
|
||||||
{PB_7 , UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
|
||||||
{PA_3, UART_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART2)},
|
{PA_3, UART_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART2)},
|
||||||
|
{PA_10, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
||||||
|
{PB_7, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
|
||||||
{PB_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
{PB_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
||||||
|
//{PC_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
||||||
{PC_11, UART_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART4)},
|
{PC_11, UART_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART4)},
|
||||||
//{PC_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
|
{PD_2, UART_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART5)},
|
||||||
{PC_2 , UART_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART5)},
|
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -70,12 +70,12 @@ static void init_usart(serial_t *obj) {
|
||||||
|
|
||||||
USART_Cmd(usart, DISABLE);
|
USART_Cmd(usart, DISABLE);
|
||||||
|
|
||||||
USART_InitStructure.USART_BaudRate = obj->baudrate;
|
USART_InitStructure.USART_BaudRate = obj->baudrate;
|
||||||
USART_InitStructure.USART_WordLength = obj->databits;
|
USART_InitStructure.USART_WordLength = obj->databits;
|
||||||
USART_InitStructure.USART_StopBits = obj->stopbits;
|
USART_InitStructure.USART_StopBits = obj->stopbits;
|
||||||
USART_InitStructure.USART_Parity = obj->parity;
|
USART_InitStructure.USART_Parity = obj->parity;
|
||||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||||
USART_Init(usart, &USART_InitStructure);
|
USART_Init(usart, &USART_InitStructure);
|
||||||
|
|
||||||
USART_Cmd(usart, ENABLE);
|
USART_Cmd(usart, ENABLE);
|
||||||
|
|
@ -100,17 +100,16 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||||
if (obj->uart == UART_2) {
|
if (obj->uart == UART_2) {
|
||||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
||||||
}
|
}
|
||||||
if (obj->uart == UART_3) {
|
if (obj->uart == UART_3) {
|
||||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
|
||||||
}
|
}
|
||||||
if (obj->uart == UART_4) {
|
if (obj->uart == UART_4) {
|
||||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
|
||||||
}
|
}
|
||||||
if (obj->uart == UART_5) {
|
if (obj->uart == UART_5) {
|
||||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// Configure the UART pins
|
// Configure the UART pins
|
||||||
pinmap_pinout(tx, PinMap_UART_TX);
|
pinmap_pinout(tx, PinMap_UART_TX);
|
||||||
pinmap_pinout(rx, PinMap_UART_RX);
|
pinmap_pinout(rx, PinMap_UART_RX);
|
||||||
|
|
@ -136,8 +135,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||||
if (obj->uart == STDIO_UART) {
|
if (obj->uart == STDIO_UART) {
|
||||||
stdio_uart_inited = 1;
|
stdio_uart_inited = 1;
|
||||||
memcpy(&stdio_uart, obj, sizeof(serial_t));
|
memcpy(&stdio_uart, obj, sizeof(serial_t));
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void serial_free(serial_t *obj) {
|
void serial_free(serial_t *obj) {
|
||||||
|
|
@ -224,23 +222,22 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||||
irq_n = USART2_IRQn;
|
irq_n = USART2_IRQn;
|
||||||
vector = (uint32_t)&uart2_irq;
|
vector = (uint32_t)&uart2_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (obj->uart == UART_3) {
|
if (obj->uart == UART_3) {
|
||||||
irq_n = USART3_IRQn;
|
irq_n = USART3_IRQn;
|
||||||
vector = (uint32_t)&uart3_irq;
|
vector = (uint32_t)&uart3_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (obj->uart == UART_4) {
|
if (obj->uart == UART_4) {
|
||||||
irq_n = UART4_IRQn;
|
irq_n = UART4_IRQn;
|
||||||
vector = (uint32_t)&uart4_irq;
|
vector = (uint32_t)&uart4_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (obj->uart == UART_5) {
|
if (obj->uart == UART_5) {
|
||||||
irq_n = UART5_IRQn;
|
irq_n = UART5_IRQn;
|
||||||
vector = (uint32_t)&uart5_irq;
|
vector = (uint32_t)&uart5_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
|
|
||||||
if (irq == RxIrq) {
|
if (irq == RxIrq) {
|
||||||
|
|
|
||||||
|
|
@ -30,74 +30,8 @@
|
||||||
#include "sleep_api.h"
|
#include "sleep_api.h"
|
||||||
#include "cmsis.h"
|
#include "cmsis.h"
|
||||||
|
|
||||||
static void SetSysClock_HSI(void)
|
// This function is in the system_stm32l1xx.c file
|
||||||
{
|
extern void SetSysClock(void);
|
||||||
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
|
|
||||||
|
|
||||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
|
||||||
/* Enable HSI */
|
|
||||||
RCC->CR |= ((uint32_t)RCC_CR_HSION);
|
|
||||||
|
|
||||||
/* Wait till HSI is ready and if Time out is reached exit */
|
|
||||||
do
|
|
||||||
{
|
|
||||||
HSIStatus = RCC->CR & RCC_CR_HSIRDY;
|
|
||||||
} while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
|
|
||||||
|
|
||||||
if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
|
|
||||||
{
|
|
||||||
HSIStatus = (uint32_t)0x01;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
HSIStatus = (uint32_t)0x00;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (HSIStatus == (uint32_t)0x01)
|
|
||||||
{
|
|
||||||
/* Flash 0 wait state */
|
|
||||||
FLASH->ACR &= ~FLASH_ACR_LATENCY;
|
|
||||||
|
|
||||||
/* Disable Prefetch Buffer */
|
|
||||||
FLASH->ACR &= ~FLASH_ACR_PRFTEN;
|
|
||||||
|
|
||||||
/* Disable 64-bit access */
|
|
||||||
FLASH->ACR &= ~FLASH_ACR_ACC64;
|
|
||||||
|
|
||||||
/* Power enable */
|
|
||||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
|
||||||
|
|
||||||
/* Select the Voltage Range 1 (1.8 V) */
|
|
||||||
PWR->CR = PWR_CR_VOS_0;
|
|
||||||
|
|
||||||
/* Wait Until the Voltage Regulator is ready */
|
|
||||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
/* HCLK = SYSCLK /1*/
|
|
||||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
|
||||||
/* PCLK2 = HCLK /1*/
|
|
||||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
|
||||||
|
|
||||||
/* PCLK1 = HCLK /1*/
|
|
||||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
|
||||||
|
|
||||||
/* Select HSI as system clock source */
|
|
||||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
|
||||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;
|
|
||||||
|
|
||||||
/* Wait till HSI is used as system clock source */
|
|
||||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
/* If HSI fails to start-up, the application will have wrong clock
|
|
||||||
configuration. User can add here some code to deal with this error */
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// MCU SLEEP mode
|
// MCU SLEEP mode
|
||||||
void sleep(void)
|
void sleep(void)
|
||||||
|
|
@ -121,7 +55,6 @@ void deepsleep(void)
|
||||||
// Enter Stop Mode
|
// Enter Stop Mode
|
||||||
PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
|
PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
|
||||||
|
|
||||||
// After wake-up from STOP reconfigure the system clock (HSI)
|
// After wake-up from STOP reconfigure the PLL
|
||||||
SetSysClock_HSI();
|
SetSysClock();
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -38,42 +38,39 @@
|
||||||
|
|
||||||
static const PinMap PinMap_SPI_MOSI[] = {
|
static const PinMap PinMap_SPI_MOSI[] = {
|
||||||
{PA_7, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
{PA_7, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PA_12, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)}, // REMAP
|
{PA_12, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PB_4, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)}, // REMAP2
|
{PB_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PB_15, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
//{PB_5, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
{PB_5, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
{PB_15, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
||||||
{PC_12, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)}, // REMAP
|
{PC_12, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
|
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
static const PinMap PinMap_SPI_MISO[] = {
|
static const PinMap PinMap_SPI_MISO[] = {
|
||||||
{PA_6, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
{PA_6, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PA_11, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)}, // REMAP
|
{PA_11, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PB_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)}, // REMAP2
|
{PB_4, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PA_6, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
//{PB_4, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
{PB_14, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
{PB_14, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
||||||
{PB_4 , SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
|
||||||
{PC_11, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
{PC_11, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
static const PinMap PinMap_SPI_SCLK[] = {
|
static const PinMap PinMap_SPI_SCLK[] = {
|
||||||
{PA_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
{PA_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PB_3, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)}, // REMAP
|
{PB_3, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
|
//{PB_3, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
{PB_13, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
{PB_13, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
||||||
{PB_3, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
|
||||||
{PC_10, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
{PC_10, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
// Only used in Slave mode
|
|
||||||
static const PinMap PinMap_SPI_SSEL[] = {
|
static const PinMap PinMap_SPI_SSEL[] = {
|
||||||
{PA_4, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
{PA_4, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
{PA_15, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)}, // REMAP
|
//{PA_4, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
|
{PA_15, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
|
||||||
|
//{PA_15, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
||||||
{PB_12, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
{PB_12, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
|
||||||
{PA_4 , SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
|
||||||
{PA_15, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
|
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -83,15 +80,15 @@ static void init_spi(spi_t *obj) {
|
||||||
|
|
||||||
SPI_Cmd(spi, DISABLE);
|
SPI_Cmd(spi, DISABLE);
|
||||||
|
|
||||||
SPI_InitStructure.SPI_Mode = obj->mode;
|
SPI_InitStructure.SPI_Mode = obj->mode;
|
||||||
SPI_InitStructure.SPI_NSS = obj->nss;
|
SPI_InitStructure.SPI_NSS = obj->nss;
|
||||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||||
SPI_InitStructure.SPI_DataSize = obj->bits;
|
SPI_InitStructure.SPI_DataSize = obj->bits;
|
||||||
SPI_InitStructure.SPI_CPOL = obj->cpol;
|
SPI_InitStructure.SPI_CPOL = obj->cpol;
|
||||||
SPI_InitStructure.SPI_CPHA = obj->cpha;
|
SPI_InitStructure.SPI_CPHA = obj->cpha;
|
||||||
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
|
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
|
||||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||||
SPI_Init(spi, &SPI_InitStructure);
|
SPI_Init(spi, &SPI_InitStructure);
|
||||||
|
|
||||||
SPI_Cmd(spi, ENABLE);
|
SPI_Cmd(spi, ENABLE);
|
||||||
|
|
@ -133,7 +130,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
||||||
obj->bits = SPI_DataSize_8b;
|
obj->bits = SPI_DataSize_8b;
|
||||||
obj->cpol = SPI_CPOL_Low;
|
obj->cpol = SPI_CPOL_Low;
|
||||||
obj->cpha = SPI_CPHA_1Edge;
|
obj->cpha = SPI_CPHA_1Edge;
|
||||||
obj->br_presc = SPI_BaudRatePrescaler_16; // 1 MHz
|
obj->br_presc = SPI_BaudRatePrescaler_256;
|
||||||
|
|
||||||
if (ssel == NC) { // Master
|
if (ssel == NC) { // Master
|
||||||
obj->mode = SPI_Mode_Master;
|
obj->mode = SPI_Mode_Master;
|
||||||
|
|
@ -194,26 +191,31 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_frequency(spi_t *obj, int hz) {
|
void spi_frequency(spi_t *obj, int hz) {
|
||||||
// Get SPI clock frequency
|
// Note: The frequencies are obtained with SPI clock = 32 MHz (APB1 & APB2 clocks)
|
||||||
uint32_t PCLK = SystemCoreClock;
|
if (hz < 250000) {
|
||||||
|
obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz
|
||||||
// Choose the baud rate divisor (between 2 and 256)
|
}
|
||||||
uint32_t divisor = PCLK / hz;
|
else if ((hz >= 250000) && (hz < 500000)) {
|
||||||
|
obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz
|
||||||
// Find the nearest power-of-2
|
}
|
||||||
divisor = (divisor > 0 ? divisor-1 : 0);
|
else if ((hz >= 500000) && (hz < 1000000)) {
|
||||||
divisor |= divisor >> 1;
|
obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz
|
||||||
divisor |= divisor >> 2;
|
}
|
||||||
divisor |= divisor >> 4;
|
else if ((hz >= 1000000) && (hz < 2000000)) {
|
||||||
divisor |= divisor >> 8;
|
obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz
|
||||||
divisor |= divisor >> 16;
|
}
|
||||||
divisor++;
|
else if ((hz >= 2000000) && (hz < 4000000)) {
|
||||||
|
obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz
|
||||||
uint32_t baud_rate = __builtin_ffs(divisor) - 2;
|
}
|
||||||
|
else if ((hz >= 4000000) && (hz < 8000000)) {
|
||||||
// Save new value
|
obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz
|
||||||
obj->br_presc = ((baud_rate > 7) ? (7 << 3) : (baud_rate << 3));
|
}
|
||||||
|
else if ((hz >= 8000000) && (hz < 16000000)) {
|
||||||
|
obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz
|
||||||
|
}
|
||||||
|
else { // >= 16000000
|
||||||
|
obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz
|
||||||
|
}
|
||||||
init_spi(obj);
|
init_spi(obj);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,208 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>mbed NUCLEO_F302R8</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>72000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>0</RunSim>
|
||||||
|
<RunTarget>1</RunTarget>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>255</CpuCode>
|
||||||
|
<DllOpt>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||||
|
<SimDlgDllName>DCM.DLL</SimDlgDllName>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||||
|
<TargetDlgDllName>TCM.DLL</TargetDlgDllName>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOpt>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>0</tRtrace>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<nTsel>13</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGTARM</Key>
|
||||||
|
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ARMDBGFLAGS</Key>
|
||||||
|
<Name></Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGUARM</Key>
|
||||||
|
<Name>(105=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||||
|
<Name>-U-O206 -O206 -S3 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F3xx_256 -FS08000000 -FL040000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F3xx_256 -FL040000 -FS08000000 -FP0($$Device:STM32F302RC$Flash\STM32F3xx_256.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>src</GroupName>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>1</FileNumber>
|
||||||
|
<FileType>0</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<Focus>0</Focus>
|
||||||
|
<ColumnNumber>0</ColumnNumber>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<TopLine>0</TopLine>
|
||||||
|
<CurrentLine>0</CurrentLine>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>main.cpp</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
|
|
@ -0,0 +1,438 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>mbed NUCLEO_F302R8</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>STM32F302RC</Device>
|
||||||
|
<Vendor>STMicroelectronics</Vendor>
|
||||||
|
<Cpu>IROM(0x08000000,0x40000) IRAM(0x20000000,0x8000) CPUTYPE("Cortex-M4") FPU2 CLOCK(72000000) ELITTLE</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile></StartupFile>
|
||||||
|
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F3xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32F302RC$Flash\STM32F3xx_256.FLM))</FlashDriverDll>
|
||||||
|
<DeviceId>6576</DeviceId>
|
||||||
|
<RegisterFile>$$Device:STM32F302RC$Device\Include\STM32F30x.h</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>$$Device:STM32F302RC$SVD\STM32F30x.svd</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath></RegisterFilePath>
|
||||||
|
<DBRegisterFilePath></DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\build\</OutputDirectory>
|
||||||
|
<OutputName>{{name}}</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>0</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>1</BrowseInformation>
|
||||||
|
<ListingPath>.\build\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin -o build\{{name}}_NUCLEO_F302R8.bin build\{{name}}.axf</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||||
|
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||||
|
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
<Simulator>
|
||||||
|
<UseSimulator>0</UseSimulator>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>1</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||||
|
</Simulator>
|
||||||
|
<Target>
|
||||||
|
<UseTarget>1</UseTarget>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>0</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<RestoreTracepoints>0</RestoreTracepoints>
|
||||||
|
</Target>
|
||||||
|
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||||
|
<TargetSelection>13</TargetSelection>
|
||||||
|
<SimDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
</SimDlls>
|
||||||
|
<TargetDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
|
||||||
|
</TargetDlls>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4103</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||||
|
<Flash3>"" ()</Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>0</RvdsVP>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>1</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x8000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x40000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x40000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x8000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>0</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>0</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls>--gnu</MiscControls>
|
||||||
|
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x08000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<ScatterFile>{{scatter_file}}</ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc>
|
||||||
|
{% for file in object_files %}
|
||||||
|
{{file}}
|
||||||
|
{% endfor %}
|
||||||
|
</Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
{% for group,files in source_files %}
|
||||||
|
<Group>
|
||||||
|
<GroupName>{{group}}</GroupName>
|
||||||
|
<Files>
|
||||||
|
{% for file in files %}
|
||||||
|
<File>
|
||||||
|
<FileName>{{file.name}}</FileName>
|
||||||
|
<FileType>{{file.type}}</FileType>
|
||||||
|
<FilePath>{{file.path}}</FilePath>
|
||||||
|
<FileOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>2</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
</CommonProperty>
|
||||||
|
<FileArmAds/>
|
||||||
|
</FileOption>
|
||||||
|
</File>
|
||||||
|
{% endfor %}
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
{% endfor %}
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
</Project>
|
||||||
|
|
@ -349,7 +349,7 @@ class NUCLEO_F302R8(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
|
||||||
self.core = "Cortex-M3"
|
self.core = "Cortex-M4"
|
||||||
|
|
||||||
self.extra_labels = ['STM', 'STM32F3', 'STM32F302R8']
|
self.extra_labels = ['STM', 'STM32F3', 'STM32F302R8']
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue