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Added the proper defines for the STM32L432 bootloader support

pull/5738/head
Helmut Tschemernjak 2017-11-27 15:41:30 +01:00 committed by adbridge
parent 78cd49b21d
commit b9f4cdf978
5 changed files with 42 additions and 13 deletions
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2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c
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@ -110,7 +110,7 @@ void SystemInit(void)
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
#endif
}

15
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/stm32l432xx.sct
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@ -1,3 +1,4 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
@ -27,10 +28,18 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 256KB FLASH (0x40000) + 64KB SRAM (0x10000)
LR_IROM1 0x08000000 0x40000 { ; load region size_region
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
ER_IROM1 0x08000000 0x40000 { ; load address = execution address
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x40000
#endif
; 256KB FLASH (0x40000) + 64KB SRAM (0x10000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)

15
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_STD/stm32l432xx.sct
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@ -1,3 +1,4 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
@ -27,10 +28,18 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; 256KB FLASH (0x40000) + 64KB SRAM (0x10000)
LR_IROM1 0x08000000 0x40000 { ; load region size_region
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
ER_IROM1 0x08000000 0x40000 { ; load address = execution address
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x40000
#endif
; 256KB FLASH (0x40000) + 64KB SRAM (0x10000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)

10
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld
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@ -1,7 +1,15 @@
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 256k
#endif
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
SRAM1 (rwx) : ORIGIN = 0x20000188, LENGTH = 64k - 0x188
}

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf
View File

@ -1,9 +1,12 @@
/* [ROM = 256kb = 0x40000] */
define symbol __intvec_start__ = 0x08000000;
define symbol __region_ROM_start__ = 0x08000000;
define symbol __region_ROM_end__ = 0x0803FFFF;
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; }
/* [RAM = 48kb + 16kb = 0xC000] */
/* [ROM = 256kb = 0x40000] */
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 48kb + 16kb = 0x10000] */
/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x20000187; /* Aligned on 8 bytes (392 = 49 x 8) */