From b9e2fab52a9a2f826303bf4fc9515e6a45edfdc5 Mon Sep 17 00:00:00 2001
From: reme <jean-marc.reme@st.com>
Date: Tue, 26 Jan 2021 12:52:53 +0100
Subject: [PATCH] STM32WL : ADDING ARM PACK MANAGER SUPPORT

Add STM32WL information in index.json file
Adding sector
---
 tools/arm_pack_manager/index.json | 70 ++++++++++++++++++++++++++++++-
 1 file changed, 69 insertions(+), 1 deletion(-)

diff --git a/tools/arm_pack_manager/index.json b/tools/arm_pack_manager/index.json
index 3b4cc477ea..5ec32ab2ce 100644
--- a/tools/arm_pack_manager/index.json
+++ b/tools/arm_pack_manager/index.json
@@ -479821,7 +479821,75 @@
         ], 
         "sub_family": "STM32W1",
         "vendor": "STMicroelectronics:13"
-    }, 
+    },
+    "STM32WL55JCIx": {
+        "name": "STM32WL55JCIx",
+        "memories": {
+          "IRAM1": {
+            "access": {
+              "read": true,
+              "write": true,
+              "execute": false,
+              "peripheral": false,
+              "secure": false,
+              "non_secure": false,
+              "non_secure_callable": false
+            },
+            "start": 536870912,
+            "size": 65536,
+            "startup": false,
+            "default": true
+          },
+          "IROM1": {
+            "access": {
+              "read": true,
+              "write": false,
+              "execute": true,
+              "peripheral": false,
+              "secure": false,
+              "non_secure": false,
+              "non_secure_callable": false
+            },
+            "start": 134217728,
+            "size": 262144,
+            "startup": true,
+            "default": true
+          }
+        },
+        "algorithms": [
+          {
+            "file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM",
+            "start": 134217728,
+            "size": 262144,
+            "default": true,
+            "ram_start": null,
+            "ram_size": null
+          }
+        ],
+        "processor": {
+          "Symmetric": {
+            "units": 1,
+            "core": "CortexM4",
+            "fpu": "None",
+            "mpu": "Present"
+          }
+        },
+        "from_pack": {
+          "vendor": "Keil",
+          "pack": "STM32WLxx_DFP",
+          "version": "1.0.0",
+          "url": "http://www.keil.com/pack"
+        },
+        "vendor": "STMicroelectronics:13",
+        "family": "STM32WL Series",
+        "sectors": [
+            [
+                134217728,
+                2048
+            ]
+        ],
+        "sub_family": "STM32WL55"
+      },
     "STM32WB55CCUx": {
         "name": "STM32WB55CCUx",
         "memories": {