Add timeout also on the 1st while loop

pull/4329/head
adustm 2017-05-16 16:16:26 +02:00
parent 9a1d05551b
commit b99ccf65bd
1 changed files with 18 additions and 7 deletions

View File

@ -202,21 +202,32 @@ int can_frequency(can_t *obj, int f)
if (btr > 0) { if (btr > 0) {
can->MCR |= CAN_MCR_INRQ ; can->MCR |= CAN_MCR_INRQ ;
while ((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
}
/* Get tick */ /* Get tick */
tickstart = HAL_GetTick(); tickstart = HAL_GetTick();
can->BTR = btr; while ((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
while ((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
if((HAL_GetTick() - tickstart ) > 2) if((HAL_GetTick() - tickstart ) > 2)
{ {
status = 0; status = 0;
break; break;
} }
} }
if (status ==0) { if (status != 0) {
error("can ESR 0x%04x.%04x + timeout status %d", (can->ESR&0XFFFF0000)>>16, (can->ESR&0XFFFF), status); can->BTR = btr;
can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
/* Get tick */
tickstart = HAL_GetTick();
while ((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
if((HAL_GetTick() - tickstart ) > 2)
{
status = 0;
break;
}
}
if (status ==0) {
error("can ESR 0x%04x.%04x + timeout status %d", (can->ESR&0XFFFF0000)>>16, (can->ESR&0XFFFF), status);
}
} else {
error("can init request timeout\n");
} }
} else { } else {
status=0; status=0;