mirror of https://github.com/ARMmbed/mbed-os.git
add SPI NAND Block device driver
rogeryou
parent
0c6753bb82
commit
b8ccb2e662
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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target_include_directories(mbed-storage-spinand
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INTERFACE
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include
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include/SPINAND
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)
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target_sources(mbed-storage-spinand
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INTERFACE
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source/SPINANDBlockDevice.cpp
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)
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/* mbed Microcontroller Library
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* Copyright (c) 2018 ARM Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_SPINAND_BLOCK_DEVICE_H
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#define MBED_SPINAND_BLOCK_DEVICE_H
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#include "drivers/QSPI.h"
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#include "blockdevice/BlockDevice.h"
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#include "platform/Callback.h"
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#ifndef MBED_CONF_SPINAND_QSPI_IO0
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#define MBED_CONF_SPINAND_QSPI_IO0 NC
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_IO1
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#define MBED_CONF_SPINAND_QSPI_IO1 NC
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_IO2
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#define MBED_CONF_SPINAND_QSPI_IO2 NC
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_IO3
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#define MBED_CONF_SPINAND_QSPI_IO3 NC
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_SCK
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#define MBED_CONF_SPINAND_QSPI_SCK NC
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_CSN
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#define MBED_CONF_SPINAND_QSPI_CSN NC
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_POLARITY_MODE
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#define MBED_CONF_SPINAND_QSPI_POLARITY_MODE 0
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#endif
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#ifndef MBED_CONF_SPINAND_QSPI_FREQ
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#define MBED_CONF_SPINAND_QSPI_FREQ 40000000
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#endif
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/** Enum spinand standard error codes
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*
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* @enum spinand_bd_error
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*/
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enum spinand_bd_error {
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SPINAND_BD_ERROR_OK = 0, /*!< no error */
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SPINAND_BD_ERROR_DEVICE_ERROR = BD_ERROR_DEVICE_ERROR, /*!< device specific error -4001 */
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SPINAND_BD_ERROR_PARSING_FAILED = -4002, /* SFDP Parsing failed */
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SPINAND_BD_ERROR_READY_FAILED = -4003, /* Wait for Mem Ready failed */
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SPINAND_BD_ERROR_WREN_FAILED = -4004, /* Write Enable Failed */
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SPINAND_BD_ERROR_INVALID_ERASE_PARAMS = -4005, /* Erase command not on sector aligned addresses or exceeds device size */
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SPINAND_BD_ERROR_DEVICE_NOT_UNIQUE = -4006, /* Only one instance per csel is allowed */
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SPINAND_BD_ERROR_DEVICE_MAX_EXCEED = -4007 /* Max active SPINAND devices exceeded */
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};
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/** Enum spinand polarity mode
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*
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* @enum spinand_polarity_mode
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*/
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enum spinand_polarity_mode {
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SPINAND_POLARITY_MODE_0 = 0, /* CPOL=0, CPHA=0 */
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SPINAND_POLARITY_MODE_1 /* CPOL=1, CPHA=1 */
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};
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#define SPINAND_MAX_ACTIVE_FLASH_DEVICES 10
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/** BlockDevice for SPI NAND flash devices over QSPI bus
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*
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* @code
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* // Here's an example using SPI NAND flash device on DISCO_L4R9I target
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* #include "mbed.h"
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* #include "SPINANDBlockDevice.h"
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*
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* SPINANDBlockDevice block_device(SPINAND_FLASH1_IO0, SPINAND_FLASH1_IO1, SPINAND_FLASH1_IO2, SPINAND_FLASH1_IO3,
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* SPINAND_FLASH1_SCK, SPINAND_FLASH1_CSN, SPINAND_POLARITY_MODE_0, MBED_CONF_SPINAND_QSPI_FREQ);
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*
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* int main()
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* {
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* printf("SPI NAND Flash Block Device example\n");
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*
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* // Initialize the SPI NAND flash device and print the memory layout
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* block_device.init();
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* bd_size_t sector_size_at_address_0 = block_device.get_erase_size(0);
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*
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* printf("SPINAND BD size: %llu\n", block_device.size());
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* printf("SPINAND BD read size: %llu\n", block_device.get_read_size());
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* printf("SPINAND BD program size: %llu\n", block_device.get_program_size());
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* printf("SPINAND BD erase size (at address 0): %llu\n", sector_size_at_address_0);
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*
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* // Write "Hello World!" to the first block
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* char *buffer = (char *) malloc(sector_size_at_address_0);
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* sprintf(buffer, "Hello World!\n");
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* block_device.erase(0, sector_size_at_address_0);
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* block_device.program(buffer, 0, sector_size_at_address_0);
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*
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* // Read back what was stored
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* block_device.read(buffer, 0, sector_size_at_address_0);
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* printf("%s", buffer);
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*
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* // Deinitialize the device
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* block_device.deinit();
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* }
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* @endcode
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*/
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class SPINANDBlockDevice : public mbed::BlockDevice {
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public:
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/** Create SPINANDBlockDevice - An SPI NAND Flash Block Device over QSPI bus
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*
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* @param io0 1st IO pin used for sending/receiving data during data phase of a transaction
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* @param io1 2nd IO pin used for sending/receiving data during data phase of a transaction
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* @param io2 3rd IO pin used for sending/receiving data during data phase of a transaction
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* @param io3 4th IO pin used for sending/receiving data during data phase of a transaction
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* @param sclk QSPI Clock pin
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* @param csel QSPI chip select pin
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* @param clock_mode specifies the QSPI Clock Polarity mode (SPINAND_POLARITY_MODE_0/SPINAND_POLARITY_MODE_1)
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* default value = 0
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* @param freq Clock frequency of the QSPI bus (defaults to 40MHz)
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*/
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SPINANDBlockDevice(PinName io0 = MBED_CONF_SPINAND_QSPI_IO0,
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PinName io1 = MBED_CONF_SPINAND_QSPI_IO1,
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PinName io2 = MBED_CONF_SPINAND_QSPI_IO2,
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PinName io3 = MBED_CONF_SPINAND_QSPI_IO3,
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PinName sclk = MBED_CONF_SPINAND_QSPI_SCK,
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PinName csel = MBED_CONF_SPINAND_QSPI_CSN,
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int clock_mode = MBED_CONF_SPINAND_QSPI_POLARITY_MODE,
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int freq = MBED_CONF_SPINAND_QSPI_FREQ);
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/** Initialize a block device
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*
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* @return SPINAND_BD_ERROR_OK(0) - success
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* SPINAND_BD_ERROR_DEVICE_ERROR - device driver transaction failed
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* SPINAND_BD_ERROR_READY_FAILED - Waiting for Memory ready failed or timedout
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*/
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virtual int init();
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/** Deinitialize a block device
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*
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* @return SPINAND_BD_ERROR_OK(0) - success
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* SPINAND_BD_ERROR_DEVICE_ERROR - device driver transaction failed
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*/
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virtual int deinit();
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/** Desctruct SPINANDBlockDevie
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*/
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~SPINANDBlockDevice()
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{
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deinit();
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}
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/** Read blocks from a block device
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*
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* @param buffer Buffer to write blocks to
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* @param addr Address of block to begin reading from
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* @param size Size to read in bytes, must be a multiple of read block size
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* @return SPINAND_BD_ERROR_OK(0) - success
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* SPINAND_BD_ERROR_DEVICE_ERROR - device driver transaction failed
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*/
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virtual int read(void *buffer, mbed::bd_addr_t addr, mbed::bd_size_t size);
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/** Program blocks to a block device
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*
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* The blocks must have been erased prior to being programmed
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*
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* @param buffer Buffer of data to write to blocks
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* @param addr Address of block to begin writing to
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* @param size Size to write in bytes, must be a multiple of program block size
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* @return SPINAND_BD_ERROR_OK(0) - success
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* SPINAND_BD_ERROR_DEVICE_ERROR - device driver transaction failed
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* SPINAND_BD_ERROR_READY_FAILED - Waiting for Memory ready failed or timed out
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* SPINAND_BD_ERROR_WREN_FAILED - Write Enable failed
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*/
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virtual int program(const void *buffer, mbed::bd_addr_t addr, mbed::bd_size_t size);
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/** Erase blocks on a block device
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*
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* The state of an erased block is undefined until it has been programmed
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*
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* @param addr Address of block to begin erasing
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* @param size Size to erase in bytes, must be a multiple of erase block size
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* @return SPINAND_BD_ERROR_OK(0) - success
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* SPINAND_BD_ERROR_DEVICE_ERROR - device driver transaction failed
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* SPINAND_BD_ERROR_READY_FAILED - Waiting for Memory ready failed or timed out
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* SPINAND_BD_ERROR_WREN_FAILED - Write Enable failed
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* SPINAND_BD_ERROR_INVALID_ERASE_PARAMS - Trying to erase unaligned address or size
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*/
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virtual int erase(mbed::bd_addr_t addr, mbed::bd_size_t size);
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/** Get the size of a readable block
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*
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* @return Size of a readable block in bytes
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*/
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virtual mbed::bd_size_t get_read_size() const;
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/** Get the size of a programable block
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*
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* @return Size of a program block size in bytes
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* @note Must be a multiple of the read size
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*/
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virtual mbed::bd_size_t get_program_size() const;
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/** Get the size of a eraseable block
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*
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* @return Size of a minimal erase block, common to all regions, in bytes
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* @note Must be a multiple of the program size
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*/
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virtual mbed::bd_size_t get_erase_size() const;
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virtual mbed::bd_size_t get_erase_size(bd_addr_t addr) const;
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/** Get the value of storage byte after it was erased
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*
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* If get_erase_value returns a non-negative byte value, the underlying
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* storage is set to that value when erased, and storage containing
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* that value can be programmed without another erase.
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*
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* @return The value of storage when erased, or -1 if you can't
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* rely on the value of erased storage
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*/
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virtual int get_erase_value() const;
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/** Get the total size of the underlying device
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*
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* @return Size of the underlying device in bytes
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*/
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virtual mbed::bd_size_t size() const;
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/** Get the BlockDevice class type.
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*
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* @return A string represent the BlockDevice class type.
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*/
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virtual const char *get_type() const;
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private:
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/********************************/
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/* Different Device Csel Mgmt */
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/********************************/
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// Add a new SPI NAND device CS to existing devices list.
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// Only one SPINANDBlockDevice instance per CS is allowed
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int add_new_csel_instance(PinName csel);
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// Remove device CS from existing device list upon destroying object (last deinit is called)
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int remove_csel_instance(PinName csel);
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/********************************/
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/* Calls to QSPI Driver APIs */
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/********************************/
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// Send Program/Write command to Driver
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qspi_status_t _qspi_send_program_command(mbed::qspi_inst_t prog_instruction, const void *buffer,
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mbed::bd_addr_t addr, mbed::bd_size_t *size);
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// Send Read command to Driver
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qspi_status_t _qspi_send_read_command(mbed::qspi_inst_t read_instruction, void *buffer, mbed::bd_addr_t addr, mbed::bd_size_t size);
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// Send Erase Instruction using command_transfer command to Driver
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qspi_status_t _qspi_send_erase_command(mbed::qspi_inst_t erase_instruction, mbed::bd_addr_t addr, mbed::bd_size_t size);
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// Send Generic command_transfer command to Driver
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qspi_status_t _qspi_send_general_command(mbed::qspi_inst_t instruction_int, mbed::bd_addr_t addr, const char *tx_buffer,
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mbed::bd_size_t tx_length, const char *rx_buffer, mbed::bd_size_t rx_length);
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// Send set_frequency command to Driver
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qspi_status_t _qspi_set_frequency(int freq);
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/*********************************/
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/* Flash Configuration Functions */
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/*********************************/
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// Quad Enable in Sercurity Register
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int _set_quad_enable();
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// Clear the device's block protection
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int _clear_block_protection();
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// Configure Write Enable in Status Register
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int _set_write_enable();
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// Wait on status register until write not-in-progress
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bool _is_mem_ready();
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private:
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// QSPI Driver Object
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mbed::QSPI _qspi;
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// Static List of different QSPI based Flash devices csel that already exist
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// Each QSPI Flash device csel can have only 1 SPINANDBlockDevice instance
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// _devices_mutex is used to lock csel list - only one SPINANDBlockDevice instance per csel is allowed
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static SingletonPtr<PlatformMutex> _devices_mutex;
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static int _number_of_active_spinand_flash_csel;
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static PinName *_active_spinand_flash_csel_arr;
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int _unique_device_status;
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PinName _csel;
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// Mutex is used to protect Flash device for some QSPI Driver commands that must be done sequentially with no other commands in between
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// e.g. (1)Set Write Enable, (2)Program, (3)Wait Memory Ready
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PlatformMutex _mutex;
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// Command Instructions
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mbed::qspi_inst_t _read_instruction;
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mbed::qspi_inst_t _program_instruction;
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int _freq;
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// Bus speed configuration
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qspi_bus_width_t _inst_width; //Bus width for Instruction phase
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qspi_bus_width_t _address_width; //Bus width for Address phase
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qspi_address_size_t _address_size; //Number of bits for address
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qspi_alt_size_t _alt_size; //Number of bits for alt
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bool _alt_enabled; //Whether alt is enabled
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uint8_t _dummy_cycles; //Number of Dummy cycles required by Current Bus Mode
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qspi_bus_width_t _data_width; //Bus width for Data phase
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uint32_t _init_ref_count;
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bool _is_initialized;
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};
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#endif
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{
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"name": "spinand",
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"config": {
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"enable-and-reset": {
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"help": "(Legacy SFDP 1.0 ONLY) Reset sequence is enable reset (0x66) then reset (0x99)",
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"value": false
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},
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"direct-reset": {
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"help": "(Legacy SFDP 1.0 ONLY) Reset involves a single command (0xF0)",
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"value": false
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},
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"SPINAND_IO0": "MBED_CONF_DRIVERS_QSPI_IO0",
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"SPINAND_IO1": "MBED_CONF_DRIVERS_QSPI_IO1",
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"SPINAND_IO2": "MBED_CONF_DRIVERS_QSPI_IO2",
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"SPINAND_IO3": "MBED_CONF_DRIVERS_QSPI_IO3",
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"SPINAND_SCK": "MBED_CONF_DRIVERS_QSPI_SCK",
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"SPINAND_CSN": "MBED_CONF_DRIVERS_QSPI_CSN",
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"SPINAND_POLARITY_MODE": 0,
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"SPINAND_FREQ": "40000000",
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"SPINAND_MIN_READ_SIZE": "1",
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"SPINAND_MIN_PROG_SIZE": "1",
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"SPINAND_FLASH_SIZE": "2048*64*512",
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"SPINAND_BLOCK_SIZE": "2048*64",
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"SPINAND_PAGE_SIZE": "2048"
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},
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"target_overrides": {
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"MX31LF4GE4BC": {
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"SPINAND_FREQ": "2000000"
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}
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}
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}
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/* mbed Microcontroller Library
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* Copyright (c) 2018 ARM Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "platform/Callback.h"
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#include "SPINANDBlockDevice.h"
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#include <string.h>
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#include "rtos/ThisThread.h"
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#ifndef MBED_CONF_MBED_TRACE_ENABLE
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#define MBED_CONF_MBED_TRACE_ENABLE 0
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#endif
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#include "mbed_trace.h"
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#define TRACE_GROUP "SPINAND"
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using namespace std::chrono;
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using namespace mbed;
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/* SPINAND Parameters */
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/****************************/
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#ifndef UINT64_MAX
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#define UINT64_MAX -1
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#endif
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#define QSPI_NO_ADDRESS_COMMAND UINT64_MAX
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#define QSPI_ALT_DEFAULT_VALUE 0
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// Get/Set Feature Address Definition
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#define FEATURES_ADDR_BLOCK_PROTECTION 0xA0
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#define FEATURES_ADDR_SECURE_OTP 0xB0
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#define FEATURES_ADDR_STATUS 0xC0
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// Status Register Bits
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#define SPINAND_STATUS_BIT_WIP 0x1 // Write In Progress
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#define SPINAND_STATUS_BIT_WEL 0x2 // Write Enable Latch
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#define SPINAND_STATUS_BIT_ERASE_FAIL 0x4 // Erase failed
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#define SPINAND_STATUS_BIT_PROGRAM_FAIL 0x8 // Program failed
|
||||
#define SPINAND_STATUS_BIT_ECC_STATUS_MASK 0x30 // ECC status
|
||||
#define SPINAND_STATUS_ECC_STATUS_NO_ERR 0x00
|
||||
#define SPINAND_STATUS_ECC_STATUS_ERR_COR 0x00
|
||||
#define SPINAND_STATUS_ECC_STATUS_ERR_NO_COR 0x00
|
||||
|
||||
// Secure OTP Register Bits
|
||||
#define SPINAND_SECURE_BIT_QE 0x01 // Quad enable
|
||||
#define SPINAND_SECURE_BIT_ECC_EN 0x10 // On-die ECC enable
|
||||
#define SPINAND_SECURE_BIT_OTP_EN 0x40 //
|
||||
#define SPINAND_SECURE_BIT_OTP_PROT 0x80 //
|
||||
|
||||
// Block Protection Register Bits
|
||||
#define SPINAND_BLOCK_PROT_BIT_SP 0x01
|
||||
#define SPINAND_BLOCK_PROT_BIT_COMPLE 0x02
|
||||
#define SPINAND_BLOCK_PROT_BIT_INVERT 0x04
|
||||
#define SPINAND_BLOCK_PROT_BIT_BP0 0x08
|
||||
#define SPINAND_BLOCK_PROT_BIT_BP1 0x10
|
||||
#define SPINAND_BLOCK_PROT_BIT_BP2 0x20
|
||||
#define SPINAND_BLOCK_PROT_BIT_BPRWD 0x80
|
||||
#define SPINAND_BLOCK_PROT_BIT_BP_MASK 0x38
|
||||
|
||||
#define SPINAND_BLOCK_PROT_BP_OFFSET 3
|
||||
#define SPINAND_BLOCK_PROT_COMPLE_OFFSET 1
|
||||
|
||||
#define IS_MEM_READY_MAX_RETRIES 10000
|
||||
|
||||
// General SPI NAND Flash instructions
|
||||
#define SPINAND_INST_RDID 0x9F // Read Manufacturer and JDEC Device ID
|
||||
#define SPINAND_INST_RSR1 0x05 // Read status register 1
|
||||
|
||||
#define SPINAND_INST_PAGE_READ 0x13 // Read data from array to cache
|
||||
#define SPINAND_INST_READ_CACHE 0x03 // Read data from cache
|
||||
#define SPINAND_INST_READ_CACHE2 0x3B
|
||||
#define SPINAND_INST_READ_CACHE4 0x6B
|
||||
#define SPINAND_INST_READ_CACHE_SEQ 0x31
|
||||
#define SPINAND_INST_READ_CACHE_END 0x3F
|
||||
|
||||
#define SPINAND_INST_WREN 0x06 // Write enable
|
||||
#define SPINAND_INST_WRDI 0x04 // Write disable
|
||||
#define SPINAND_INST_PP_LOAD 0x02
|
||||
#define SPINAND_INST_PP_RAND_LOAD 0x84
|
||||
#define SPINAND_INST_4PP_LOAD 0x32
|
||||
#define SPINAND_INST_4PP_RAND_LOAD 0x34
|
||||
#define SPINAND_INST_PROGRAM_EXEC 0x10
|
||||
#define SPINAND_INST_BE 0xD8
|
||||
|
||||
#define SPINAND_INST_GET_FEATURE 0x0F
|
||||
#define SPINAND_INST_SET_FEATURE 0x1F
|
||||
#define SPINAND_INST_RESET 0xFF
|
||||
#define SPINAND_INST_ECC_STAT_READ 0x7C
|
||||
|
||||
// Default read/legacy erase instructions
|
||||
//#define SPINAND_INST_READ_DEFAULT SPINAND_INST_READ_CACHE
|
||||
//#define SPINAND_INST_READ_DEFAULT SPINAND_INST_READ_CACHE2
|
||||
#define SPINAND_INST_READ_DEFAULT SPINAND_INST_READ_CACHE4
|
||||
//#define SPINAND_INST_PROGRAM_DEFAULT SPINAND_INST_PP_LOAD
|
||||
#define SPINAND_INST_PROGRAM_DEFAULT SPINAND_INST_4PP_LOAD
|
||||
|
||||
#define SPINAND_BLOCK_OFFSET 0x40000
|
||||
#define SPINAND_PAGE_OFFSET 0x1000
|
||||
|
||||
#define SPI_NAND_ROW_ADDR_SIZE QSPI_CFG_ADDR_SIZE_16
|
||||
#define SPI_NAND_COLUMN_ADDR_SIZE QSPI_CFG_ADDR_SIZE_24
|
||||
|
||||
/* Init function to initialize Different Devices CS static list */
|
||||
static PinName *generate_initialized_active_spinand_csel_arr();
|
||||
// Static Members for different devices csel
|
||||
// _devices_mutex is used to lock csel list - only one SPINANDBlockDevice instance per csel is allowed
|
||||
SingletonPtr<PlatformMutex> SPINANDBlockDevice::_devices_mutex;
|
||||
int SPINANDBlockDevice::_number_of_active_spinand_flash_csel = 0;
|
||||
PinName *SPINANDBlockDevice::_active_spinand_flash_csel_arr = generate_initialized_active_spinand_csel_arr();
|
||||
|
||||
/********* Public API Functions *********/
|
||||
/****************************************/
|
||||
SPINANDBlockDevice::SPINANDBlockDevice(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName csel,
|
||||
int clock_mode,
|
||||
int freq)
|
||||
:
|
||||
_qspi(io0, io1, io2, io3, sclk, csel, clock_mode), _csel(csel), _freq(freq),
|
||||
_init_ref_count(0),
|
||||
_is_initialized(false)
|
||||
{
|
||||
_unique_device_status = add_new_csel_instance(csel);
|
||||
|
||||
if (_unique_device_status == 0) {
|
||||
tr_debug("Adding a new SPINANDBlockDevice csel: %d", (int)csel);
|
||||
} else if (_unique_device_status == -1) {
|
||||
tr_error("SPINANDBlockDevice with the same csel(%d) already exists", (int)csel);
|
||||
} else {
|
||||
tr_error("Too many different SPINANDBlockDevice devices - max allowed: %d", SPINAND_MAX_ACTIVE_FLASH_DEVICES);
|
||||
}
|
||||
|
||||
// Default Bus Setup 1_1_1 with 0 dummy and mode cycles
|
||||
_inst_width = QSPI_CFG_BUS_SINGLE;
|
||||
_address_width = QSPI_CFG_BUS_SINGLE;
|
||||
_address_size = QSPI_CFG_ADDR_SIZE_8;
|
||||
_alt_size = 0;
|
||||
_dummy_cycles = 8;
|
||||
_data_width = QSPI_CFG_BUS_SINGLE;
|
||||
|
||||
// Set default read/erase instructions
|
||||
_read_instruction = SPINAND_INST_READ_DEFAULT;
|
||||
_program_instruction = SPINAND_INST_PROGRAM_DEFAULT;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::init()
|
||||
{
|
||||
int status = SPINAND_BD_ERROR_OK;
|
||||
|
||||
if (_unique_device_status == 0) {
|
||||
tr_debug("SPINANDBlockDevice csel: %d", (int)_csel);
|
||||
} else if (_unique_device_status == -1) {
|
||||
tr_error("SPINANDBlockDevice with the same csel(%d) already exists", (int)_csel);
|
||||
return SPINAND_BD_ERROR_DEVICE_NOT_UNIQUE;
|
||||
} else {
|
||||
tr_error("Too many different SPINANDBlockDevice devices - max allowed: %d", SPINAND_MAX_ACTIVE_FLASH_DEVICES);
|
||||
return SPINAND_BD_ERROR_DEVICE_MAX_EXCEED;
|
||||
}
|
||||
|
||||
_mutex.lock();
|
||||
|
||||
// All commands other than Read and RSFDP use default 1-1-1 bus mode (Program/Erase are constrained by flash memory performance more than bus performance)
|
||||
if (QSPI_STATUS_OK != _qspi.configure_format(QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_SINGLE, _address_size, QSPI_CFG_BUS_SINGLE,
|
||||
0, QSPI_CFG_BUS_SINGLE, 0)) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
status = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
if (!_is_initialized) {
|
||||
_init_ref_count = 0;
|
||||
}
|
||||
|
||||
_init_ref_count++;
|
||||
|
||||
if (_init_ref_count != 1) {
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
_alt_size = 0;
|
||||
_dummy_cycles = 8;
|
||||
if (QSPI_STATUS_OK != _qspi_set_frequency(_freq)) {
|
||||
tr_error("QSPI Set Frequency Failed");
|
||||
status = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
// Synchronize Device
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Init - _is_mem_ready Failed");
|
||||
status = SPINAND_BD_ERROR_READY_FAILED;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
if (0 != _clear_block_protection()) {
|
||||
tr_error("Init - clearing block protection failed");
|
||||
status = SPINAND_BD_ERROR_PARSING_FAILED;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
if (_read_instruction == SPINAND_INST_READ_CACHE4) {
|
||||
if (QSPI_STATUS_OK !=_set_quad_enable()) {
|
||||
tr_error("SPI NAND Set Quad enable Failed");
|
||||
status = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
goto exit_point;
|
||||
}
|
||||
}
|
||||
|
||||
_is_initialized = true;
|
||||
|
||||
exit_point:
|
||||
_mutex.unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::deinit()
|
||||
{
|
||||
int result = SPINAND_BD_ERROR_OK;
|
||||
|
||||
_mutex.lock();
|
||||
|
||||
if (!_is_initialized) {
|
||||
_init_ref_count = 0;
|
||||
_mutex.unlock();
|
||||
return result;
|
||||
}
|
||||
|
||||
_init_ref_count--;
|
||||
|
||||
if (_init_ref_count) {
|
||||
_mutex.unlock();
|
||||
return result;
|
||||
}
|
||||
|
||||
// Disable Device for Writing
|
||||
qspi_status_t status = _qspi_send_general_command(SPINAND_INST_WRDI, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
|
||||
if (status != QSPI_STATUS_OK) {
|
||||
tr_error("Write Disable failed");
|
||||
result = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
_is_initialized = false;
|
||||
|
||||
_mutex.unlock();
|
||||
|
||||
if (_unique_device_status == 0) {
|
||||
remove_csel_instance(_csel);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::read(void *buffer, bd_addr_t addr, bd_size_t size)
|
||||
{
|
||||
int status = SPINAND_BD_ERROR_OK;
|
||||
uint32_t offset = 0;
|
||||
uint32_t chunk = 0;
|
||||
bd_size_t read_bytes = 0;
|
||||
|
||||
tr_debug("Read Inst: 0x%xh", _read_instruction);
|
||||
|
||||
while (size > 0) {
|
||||
// Read on _page_size_bytes boundaries (Default 2048 bytes a page)
|
||||
offset = addr % MBED_CONF_SPINAND_SPINAND_PAGE_SIZE;
|
||||
chunk = (offset + size < MBED_CONF_SPINAND_SPINAND_PAGE_SIZE) ? size : (MBED_CONF_SPINAND_SPINAND_PAGE_SIZE - offset);
|
||||
read_bytes = chunk;
|
||||
|
||||
_mutex.lock();
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_read_command(_read_instruction, buffer, addr, read_bytes)) {
|
||||
tr_error("Read Command failed");
|
||||
status = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
buffer = static_cast< uint8_t *>(buffer) + chunk;
|
||||
addr += SPINAND_PAGE_OFFSET;
|
||||
size -= chunk;
|
||||
|
||||
_mutex.unlock();
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::program(const void *buffer, bd_addr_t addr, bd_size_t size)
|
||||
{
|
||||
qspi_status_t result = QSPI_STATUS_OK;
|
||||
bool program_failed = false;
|
||||
int status = SPINAND_BD_ERROR_OK;
|
||||
uint32_t offset = 0;
|
||||
uint32_t chunk = 0;
|
||||
bd_size_t written_bytes = 0;
|
||||
|
||||
tr_debug("Program - Buff: %p, addr: %llu, size: %llu", buffer, addr, size);
|
||||
|
||||
while (size > 0) {
|
||||
// Write on _page_size_bytes boundaries (Default 2048 bytes a page)
|
||||
offset = addr % MBED_CONF_SPINAND_SPINAND_PAGE_SIZE;
|
||||
chunk = (offset + size < MBED_CONF_SPINAND_SPINAND_PAGE_SIZE) ? size : (MBED_CONF_SPINAND_SPINAND_PAGE_SIZE - offset);
|
||||
written_bytes = chunk;
|
||||
|
||||
_mutex.lock();
|
||||
|
||||
//Send WREN
|
||||
if (_set_write_enable() != 0) {
|
||||
tr_error("Write Enabe failed");
|
||||
program_failed = true;
|
||||
status = SPINAND_BD_ERROR_WREN_FAILED;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
result = _qspi_send_program_command(_program_instruction, buffer, addr, &written_bytes);
|
||||
if ((result != QSPI_STATUS_OK) || (chunk != written_bytes)) {
|
||||
tr_error("Write failed");
|
||||
program_failed = true;
|
||||
status = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
buffer = static_cast<const uint8_t *>(buffer) + chunk;
|
||||
addr += SPINAND_PAGE_OFFSET;
|
||||
size -= chunk;
|
||||
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready after write, failed");
|
||||
program_failed = true;
|
||||
status = SPINAND_BD_ERROR_READY_FAILED;
|
||||
goto exit_point;
|
||||
}
|
||||
_mutex.unlock();
|
||||
}
|
||||
|
||||
exit_point:
|
||||
if (program_failed) {
|
||||
_mutex.unlock();
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::erase(bd_addr_t addr, bd_size_t size)
|
||||
{
|
||||
bool erase_failed = false;
|
||||
int status = SPINAND_BD_ERROR_OK;
|
||||
|
||||
tr_debug("Erase - addr: %llu, size: %llu", addr, size);
|
||||
|
||||
if ((addr + size) > MBED_CONF_SPINAND_SPINAND_FLASH_SIZE) {
|
||||
tr_error("Erase exceeds flash device size");
|
||||
return SPINAND_BD_ERROR_INVALID_ERASE_PARAMS;
|
||||
}
|
||||
|
||||
if (((addr % SPINAND_BLOCK_OFFSET) != 0) || ((size % get_erase_size()) != 0)) {
|
||||
tr_error("Invalid erase - unaligned address and size");
|
||||
return SPINAND_BD_ERROR_INVALID_ERASE_PARAMS;
|
||||
}
|
||||
|
||||
while (size > 0) {
|
||||
|
||||
_mutex.lock();
|
||||
|
||||
if (_set_write_enable() != 0) {
|
||||
tr_error("SPI NAND Erase Device not ready - failed");
|
||||
erase_failed = true;
|
||||
status = SPINAND_BD_ERROR_WREN_FAILED;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_erase_command(SPINAND_INST_BE, addr, size)) {
|
||||
tr_error("SPI NAND Erase command failed!");
|
||||
erase_failed = true;
|
||||
status = SPINAND_BD_ERROR_DEVICE_ERROR;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
addr += SPINAND_BLOCK_OFFSET;
|
||||
if(size > MBED_CONF_SPINAND_SPINAND_BLOCK_SIZE) {
|
||||
size -= MBED_CONF_SPINAND_SPINAND_BLOCK_SIZE;
|
||||
} else {
|
||||
size = 0;
|
||||
}
|
||||
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("SPI NAND After Erase Device not ready - failed");
|
||||
erase_failed = true;
|
||||
status = SPINAND_BD_ERROR_READY_FAILED;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
_mutex.unlock();
|
||||
}
|
||||
|
||||
exit_point:
|
||||
if (erase_failed) {
|
||||
_mutex.unlock();
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
bd_size_t SPINANDBlockDevice::get_read_size() const
|
||||
{
|
||||
// Return minimum read size in bytes for the device
|
||||
return MBED_CONF_SPINAND_SPINAND_MIN_READ_SIZE;
|
||||
}
|
||||
|
||||
bd_size_t SPINANDBlockDevice::get_program_size() const
|
||||
{
|
||||
// Return minimum program/write size in bytes for the device
|
||||
return MBED_CONF_SPINAND_SPINAND_MIN_PROG_SIZE;
|
||||
}
|
||||
|
||||
bd_size_t SPINANDBlockDevice::get_erase_size() const
|
||||
{
|
||||
return MBED_CONF_SPINAND_SPINAND_BLOCK_SIZE;
|
||||
}
|
||||
|
||||
bd_size_t SPINANDBlockDevice::get_erase_size(bd_addr_t addr) const
|
||||
{
|
||||
return MBED_CONF_SPINAND_SPINAND_BLOCK_SIZE;
|
||||
}
|
||||
|
||||
const char *SPINANDBlockDevice::get_type() const
|
||||
{
|
||||
return "SPINAND";
|
||||
}
|
||||
|
||||
bd_size_t SPINANDBlockDevice::size() const
|
||||
{
|
||||
return MBED_CONF_SPINAND_SPINAND_FLASH_SIZE;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::get_erase_value() const
|
||||
{
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
/********************************/
|
||||
/* Different Device Csel Mgmt */
|
||||
/********************************/
|
||||
static PinName *generate_initialized_active_spinand_csel_arr()
|
||||
{
|
||||
PinName *init_arr = new PinName[SPINAND_MAX_ACTIVE_FLASH_DEVICES];
|
||||
for (int i_ind = 0; i_ind < SPINAND_MAX_ACTIVE_FLASH_DEVICES; i_ind++) {
|
||||
init_arr[i_ind] = NC;
|
||||
}
|
||||
return init_arr;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::add_new_csel_instance(PinName csel)
|
||||
{
|
||||
int status = 0;
|
||||
_devices_mutex->lock();
|
||||
if (_number_of_active_spinand_flash_csel >= SPINAND_MAX_ACTIVE_FLASH_DEVICES) {
|
||||
status = -2;
|
||||
goto exit_point;
|
||||
}
|
||||
|
||||
// verify the device is unique(no identical csel already exists)
|
||||
for (int i_ind = 0; i_ind < SPINAND_MAX_ACTIVE_FLASH_DEVICES; i_ind++) {
|
||||
if (_active_spinand_flash_csel_arr[i_ind] == csel) {
|
||||
status = -1;
|
||||
goto exit_point;
|
||||
}
|
||||
}
|
||||
|
||||
// Insert new csel into existing device list
|
||||
for (int i_ind = 0; i_ind < SPINAND_MAX_ACTIVE_FLASH_DEVICES; i_ind++) {
|
||||
if (_active_spinand_flash_csel_arr[i_ind] == NC) {
|
||||
_active_spinand_flash_csel_arr[i_ind] = csel;
|
||||
break;
|
||||
}
|
||||
}
|
||||
_number_of_active_spinand_flash_csel++;
|
||||
|
||||
exit_point:
|
||||
_devices_mutex->unlock();
|
||||
return status;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::remove_csel_instance(PinName csel)
|
||||
{
|
||||
int status = -1;
|
||||
_devices_mutex->lock();
|
||||
// remove the csel from existing device list
|
||||
for (int i_ind = 0; i_ind < SPINAND_MAX_ACTIVE_FLASH_DEVICES; i_ind++) {
|
||||
if (_active_spinand_flash_csel_arr[i_ind] == csel) {
|
||||
_active_spinand_flash_csel_arr[i_ind] = NC;
|
||||
if (_number_of_active_spinand_flash_csel > 0) {
|
||||
_number_of_active_spinand_flash_csel--;
|
||||
}
|
||||
status = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
_devices_mutex->unlock();
|
||||
return status;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::_set_quad_enable()
|
||||
{
|
||||
uint8_t secur_reg = 0;
|
||||
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready, set quad enable failed");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_SECURE_OTP,
|
||||
NULL, 0, (char *) &secur_reg, 1)) {
|
||||
tr_error("Reading Security Register failed");
|
||||
}
|
||||
|
||||
secur_reg |= SPINAND_SECURE_BIT_QE;
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_SET_FEATURE, FEATURES_ADDR_SECURE_OTP,
|
||||
(char *) &secur_reg, 1, NULL, 0)) {
|
||||
tr_error("Writing Security Register failed");
|
||||
}
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_SECURE_OTP,
|
||||
NULL, 0, (char *) &secur_reg, 1)) {
|
||||
tr_error("Reading Security Register failed");
|
||||
}
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready, set quad enable failed");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::_clear_block_protection()
|
||||
{
|
||||
uint8_t block_protection_reg = 0;
|
||||
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready, clearing block protection failed");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_BLOCK_PROTECTION,
|
||||
NULL, 0, (char *) &block_protection_reg, 1)) {
|
||||
tr_error("Reading Block Protection Register failed");
|
||||
}
|
||||
|
||||
block_protection_reg &= ~SPINAND_BLOCK_PROT_BIT_BP_MASK;
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_SET_FEATURE, FEATURES_ADDR_BLOCK_PROTECTION,
|
||||
(char *) &block_protection_reg, 1, NULL, 0)) {
|
||||
tr_error("Writing Block Protection Register failed");
|
||||
}
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_BLOCK_PROTECTION,
|
||||
NULL, 0, (char *) &block_protection_reg, 1)) {
|
||||
tr_error("Reading Block Protection Register failed");
|
||||
}
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready, clearing block protection failed");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int SPINANDBlockDevice::_set_write_enable()
|
||||
{
|
||||
// Check Status Register Busy Bit to Verify the Device isn't Busy
|
||||
uint8_t status_value = 0;
|
||||
int status = -1;
|
||||
|
||||
do {
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_WREN, QSPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0)) {
|
||||
tr_error("Sending WREN command FAILED");
|
||||
break;
|
||||
}
|
||||
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready, write failed");
|
||||
break;
|
||||
}
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_STATUS,
|
||||
NULL, 0,
|
||||
(char *) &status_value, 1)) { // store received value in status_value
|
||||
tr_error("Reading Status Register failed");
|
||||
}
|
||||
|
||||
if ((status_value & SPINAND_STATUS_BIT_WEL) == 0) {
|
||||
tr_error("_set_write_enable failed - status register 1 value: %u", status_value);
|
||||
break;
|
||||
}
|
||||
|
||||
status = 0;
|
||||
} while (false);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
bool SPINANDBlockDevice::_is_mem_ready()
|
||||
{
|
||||
// Check Status Register Busy Bit to Verify the Device isn't Busy
|
||||
uint8_t status_value = 0;
|
||||
int retries = 0;
|
||||
bool mem_ready = true;
|
||||
|
||||
do {
|
||||
rtos::ThisThread::sleep_for(1ms);
|
||||
retries++;
|
||||
//Read Status Register 1 from device
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_STATUS,
|
||||
NULL, 0,
|
||||
(char *) &status_value, 1)) { // store received value in status_value
|
||||
tr_error("Reading Status Register failed");
|
||||
}
|
||||
} while ((status_value & SPINAND_STATUS_BIT_WIP) != 0 && retries < IS_MEM_READY_MAX_RETRIES);
|
||||
|
||||
if ((status_value & SPINAND_STATUS_BIT_WIP) != 0) {
|
||||
tr_error("_is_mem_ready FALSE: status value = 0x%x ", status_value);
|
||||
mem_ready = false;
|
||||
}
|
||||
return mem_ready;
|
||||
}
|
||||
|
||||
/***************************************************/
|
||||
/*********** QSPI Driver API Functions *************/
|
||||
/***************************************************/
|
||||
qspi_status_t SPINANDBlockDevice::_qspi_set_frequency(int freq)
|
||||
{
|
||||
return _qspi.set_frequency(freq);
|
||||
}
|
||||
|
||||
qspi_status_t SPINANDBlockDevice::_qspi_send_read_command(qspi_inst_t read_inst, void *buffer,
|
||||
bd_addr_t addr, bd_size_t size)
|
||||
{
|
||||
tr_debug("Inst: 0x%xh, addr: %llu, size: %llu", read_inst, addr, size);
|
||||
|
||||
size_t buf_len = size;
|
||||
|
||||
// Send read command to device driver
|
||||
// Read commands use the best bus mode supported by the part
|
||||
qspi_status_t status = _qspi.configure_format(_inst_width, _address_width, SPI_NAND_COLUMN_ADDR_SIZE, // Alt width should be the same as address width
|
||||
_address_width,_alt_size, _data_width, 0);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_PAGE_READ, addr >> 12, NULL, 0, NULL, 0)) {
|
||||
tr_error("Read page from array failed");
|
||||
}
|
||||
|
||||
status = _qspi.configure_format(_inst_width, _address_width, _address_size, _address_width, // Alt width should be the same as address width
|
||||
_alt_size, _data_width, 0);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
if (false == _is_mem_ready()) {
|
||||
tr_error("Device not ready, clearing block protection failed");
|
||||
// return -1;
|
||||
}
|
||||
|
||||
status = _qspi.configure_format(_inst_width, _address_width, SPI_NAND_ROW_ADDR_SIZE, _address_width, // Alt width should be the same as address width
|
||||
_alt_size, QSPI_CFG_BUS_QUAD, _dummy_cycles);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
// Don't check the read status until after we've configured the format back to 1-1-1, to avoid leaving the interface in an
|
||||
// incorrect state if the read fails.
|
||||
status = _qspi.read(read_inst, (_alt_size == 0) ? -1 : QSPI_ALT_DEFAULT_VALUE, (unsigned int)addr, (char *)buffer, &buf_len);
|
||||
|
||||
// All commands other than Read use default 1-1-1 bus mode (Program/Erase are constrained by flash memory performance more than bus performance)
|
||||
qspi_status_t format_status = _qspi.configure_format(QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_SINGLE, _address_size, QSPI_CFG_BUS_SINGLE, 0, QSPI_CFG_BUS_SINGLE, 0);
|
||||
if (QSPI_STATUS_OK != format_status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return format_status;
|
||||
}
|
||||
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("QSPI Read failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
return QSPI_STATUS_OK;
|
||||
}
|
||||
|
||||
qspi_status_t SPINANDBlockDevice::_qspi_send_program_command(qspi_inst_t prog_inst, const void *buffer,
|
||||
bd_addr_t addr, bd_size_t *size)
|
||||
{
|
||||
tr_debug("Inst: 0x%xh, addr: %llu, size: %llu", prog_inst, addr, *size);
|
||||
|
||||
// Program load commands need 16 bit row address
|
||||
qspi_status_t status = _qspi.configure_format(_inst_width, _address_width, SPI_NAND_ROW_ADDR_SIZE, // Alt width should be the same as address width
|
||||
_address_width, _alt_size, QSPI_CFG_BUS_QUAD, 0);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
// Send program (write) command to device driver
|
||||
status = _qspi.write(prog_inst, -1, addr, (char *)buffer, (size_t *)size);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("QSPI Write failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
// Program execute command need 24 bit column address
|
||||
qspi_status_t format_status = _qspi.configure_format(QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_SINGLE, SPI_NAND_COLUMN_ADDR_SIZE, QSPI_CFG_BUS_SINGLE,
|
||||
0, QSPI_CFG_BUS_SINGLE, 0);
|
||||
if (QSPI_STATUS_OK != format_status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return format_status;
|
||||
}
|
||||
|
||||
// Program execute command
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_PROGRAM_EXEC, addr >> 12, NULL, 0, NULL, 0)) {
|
||||
tr_error("Read page from array failed");
|
||||
}
|
||||
|
||||
status = _qspi.configure_format(_inst_width, _address_width, _address_size, _address_width, // Alt width should be the same as address width
|
||||
_alt_size, _data_width, 0);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
uint8_t status_value = 0;
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_STATUS,
|
||||
NULL, 0,
|
||||
(char *) &status_value, 1)) { // store received value in status_value
|
||||
tr_error("Reading Status Register failed");
|
||||
}
|
||||
return QSPI_STATUS_OK;
|
||||
}
|
||||
|
||||
qspi_status_t SPINANDBlockDevice::_qspi_send_erase_command(qspi_inst_t erase_inst, bd_addr_t addr, bd_size_t size)
|
||||
{
|
||||
tr_debug("Inst: 0x%xh, addr: %llu, size: %llu", erase_inst, addr, size);
|
||||
|
||||
qspi_status_t status = _qspi.configure_format(_inst_width, _address_width, SPI_NAND_COLUMN_ADDR_SIZE,// Alt width should be the same as address width
|
||||
_address_width, _alt_size, _data_width, 0);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
// Send erase command to driver
|
||||
status = _qspi.command_transfer(erase_inst, (int) (addr >> 12), NULL, 0, NULL, 0);
|
||||
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("QSPI Erase failed");
|
||||
return status;
|
||||
}
|
||||
|
||||
status = _qspi.configure_format(_inst_width, _address_width, _address_size, _address_width, // Alt width should be the same as address width
|
||||
_alt_size, _data_width, 0);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("_qspi_configure_format failed");
|
||||
return status;
|
||||
}
|
||||
uint8_t status_value = 0;
|
||||
if (QSPI_STATUS_OK != _qspi_send_general_command(SPINAND_INST_GET_FEATURE, FEATURES_ADDR_STATUS,
|
||||
NULL, 0,
|
||||
(char *) &status_value, 1)) { // store received value in status_value
|
||||
tr_error("Reading Status Register failed");
|
||||
}
|
||||
return QSPI_STATUS_OK;
|
||||
}
|
||||
|
||||
qspi_status_t SPINANDBlockDevice::_qspi_send_general_command(qspi_inst_t instruction, bd_addr_t addr,
|
||||
const char *tx_buffer, bd_size_t tx_length,
|
||||
const char *rx_buffer, bd_size_t rx_length)
|
||||
{
|
||||
tr_debug("Inst: 0x%xh, addr: %llu, tx length: %llu, rx length: %llu", instruction, addr, tx_length, rx_length);
|
||||
|
||||
// Send a general command instruction to driver
|
||||
qspi_status_t status = _qspi.command_transfer(instruction, (int)addr, tx_buffer, tx_length, rx_buffer, rx_length);
|
||||
if (QSPI_STATUS_OK != status) {
|
||||
tr_error("Sending Generic command: %x", instruction);
|
||||
return status;
|
||||
}
|
||||
|
||||
return QSPI_STATUS_OK;
|
||||
}
|
||||
|
||||
|
|
@ -53,6 +53,10 @@
|
|||
#include "FlashIAPBlockDevice.h"
|
||||
#endif
|
||||
|
||||
#if COMPONENT_SPINAND
|
||||
#include "SPINANDBlockDevice.h"
|
||||
#endif
|
||||
|
||||
// Debug available
|
||||
#ifndef MODE_DEBUG
|
||||
#define MODE_DEBUG 0
|
||||
|
|
@ -92,6 +96,7 @@ enum bd_type {
|
|||
sd,
|
||||
flashiap,
|
||||
ospif,
|
||||
spinand,
|
||||
default_bd
|
||||
};
|
||||
|
||||
|
|
@ -163,6 +168,23 @@ static BlockDevice *get_bd_instance(uint8_t bd_type)
|
|||
#endif
|
||||
break;
|
||||
}
|
||||
case spinand: {
|
||||
#if COMPONENT_SPINAND
|
||||
static SPINANDBlockDevice default_bd(
|
||||
MBED_CONF_SPINAND_SPINAND_IO0,
|
||||
MBED_CONF_SPINAND_SPINAND_IO1,
|
||||
MBED_CONF_SPINAND_SPINAND_IO2,
|
||||
MBED_CONF_SPINAND_SPINAND_IO3,
|
||||
MBED_CONF_SPINAND_SPINAND_SCK,
|
||||
MBED_CONF_SPINAND_SPINAND_CSN,
|
||||
MBED_CONF_SPINAND_SPINAND_POLARITY_MODE,
|
||||
MBED_CONF_SPINAND_SPINAND_FREQ
|
||||
);
|
||||
return &default_bd;
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
case dataflash: {
|
||||
#if COMPONENT_DATAFLASH
|
||||
static DataFlashBlockDevice default_bd(
|
||||
|
|
@ -298,7 +320,11 @@ void test_init_bd()
|
|||
if (curr_sector_size > max_sector_size) {
|
||||
max_sector_size = curr_sector_size;
|
||||
}
|
||||
#if COMPONENT_SPINAND
|
||||
start_address += 0x40000;
|
||||
#else
|
||||
start_address += curr_sector_size;
|
||||
#endif
|
||||
}
|
||||
num_of_sectors = i;
|
||||
}
|
||||
|
|
@ -555,11 +581,19 @@ void test_contiguous_erase_write_read()
|
|||
// helping to avoid test timeouts. Try 256-byte chunks if contiguous_erase_size
|
||||
// (which should be a power of 2) is greater than that. If it's less than
|
||||
// that, the test finishes quickly anyway...
|
||||
#if COMPONENT_SPINAND
|
||||
if ((program_size < 2048) && (2048 % program_size == 0)
|
||||
&& (contiguous_erase_size >= 2048) && (contiguous_erase_size % 2048 == 0)) {
|
||||
utest_printf("using 2048-byte write/read buffer\n");
|
||||
write_read_buf_size = 2048;
|
||||
}
|
||||
#else
|
||||
if ((program_size < 256) && (256 % program_size == 0)
|
||||
&& (contiguous_erase_size >= 256) && (contiguous_erase_size % 256 == 0)) {
|
||||
utest_printf("using 256-byte write/read buffer\n");
|
||||
write_read_buf_size = 256;
|
||||
}
|
||||
#endif
|
||||
|
||||
// Allocate write/read buffer
|
||||
uint8_t *write_read_buf = new (std::nothrow) uint8_t[write_read_buf_size];
|
||||
|
|
@ -572,7 +606,11 @@ void test_contiguous_erase_write_read()
|
|||
|
||||
// Pre-fill the to-be-erased region. By pre-filling the region,
|
||||
// we can be sure the test will not pass if the erase doesn't work.
|
||||
#if COMPONENT_SPINAND
|
||||
for (bd_size_t offset = 0; start_address + offset < stop_address; offset += 0x40000) {
|
||||
#else
|
||||
for (bd_size_t offset = 0; start_address + offset < stop_address; offset += write_read_buf_size) {
|
||||
#endif
|
||||
for (size_t i = 0; i < write_read_buf_size; i++) {
|
||||
write_read_buf[i] = (uint8_t)rand();
|
||||
}
|
||||
|
|
@ -589,8 +627,11 @@ void test_contiguous_erase_write_read()
|
|||
|
||||
// Loop through all write/read regions
|
||||
int region = 0;
|
||||
#if COMPONENT_SPINAND
|
||||
for (; start_address < stop_address; start_address += 0x40000) {
|
||||
#else
|
||||
for (; start_address < stop_address; start_address += write_read_buf_size) {
|
||||
|
||||
#endif
|
||||
// Generate test data
|
||||
unsigned int seed = rand();
|
||||
srand(seed);
|
||||
|
|
@ -790,6 +831,8 @@ void test_get_type_functionality()
|
|||
TEST_ASSERT_EQUAL(0, strcmp(bd_type, "SD"));
|
||||
#elif COMPONENT_FLASHIAP
|
||||
TEST_ASSERT_EQUAL(0, strcmp(bd_type, "FLASHIAP"));
|
||||
#elif COMPONENT_SPINAND
|
||||
TEST_ASSERT_EQUAL(0, strcmp(bd_type, "SPINAND"));
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -848,11 +891,14 @@ int get_bd_count()
|
|||
#if COMPONENT_OSPIF
|
||||
bd_arr[count++] = ospif; //5
|
||||
#endif
|
||||
#if COMPONENT_SPINAND
|
||||
bd_arr[count++] = spinand; //6
|
||||
#endif
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static const char *prefix[] = {"SPIF ", "QSPIF ", "DATAFLASH ", "SD ", "FLASHIAP ", "OSPIF ", "DEFAULT "};
|
||||
static const char *prefix[] = {"SPIF ", "QSPIF ", "DATAFLASH ", "SD ", "FLASHIAP ", "OSPIF ","SPINAND ", "DEFAULT "};
|
||||
|
||||
int main()
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue