mirror of https://github.com/ARMmbed/mbed-os.git
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/* mbed Microcontroller Library
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*******************************************************************************
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* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2014, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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||||||
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ADC_1 = (int)ADC1_BASE,
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ADC_2 = (int)ADC2_BASE,
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ADC_3 = (int)ADC3_BASE
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} ADCName;
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typedef enum {
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DAC_1 = (int)DAC_BASE
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} DACName;
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typedef enum {
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UART_1 = (int)USART1_BASE,
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UART_2 = (int)USART2_BASE,
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UART_3 = (int)USART3_BASE,
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UART_4 = (int)UART4_BASE,
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UART_5 = (int)UART5_BASE,
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UART_6 = (int)USART6_BASE,
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UART_7 = (int)UART7_BASE,
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UART_8 = (int)UART8_BASE
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} UARTName;
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE,
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SPI_3 = (int)SPI3_BASE,
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SPI_4 = (int)SPI4_BASE,
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SPI_5 = (int)SPI5_BASE,
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SPI_6 = (int)SPI6_BASE
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} SPIName;
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typedef enum {
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I2C_1 = (int)I2C1_BASE,
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I2C_2 = (int)I2C2_BASE,
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I2C_3 = (int)I2C3_BASE
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} I2CName;
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typedef enum {
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PWM_1 = (int)TIM1_BASE,
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_4 = (int)TIM4_BASE,
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PWM_5 = (int)TIM5_BASE,
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PWM_8 = (int)TIM8_BASE,
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PWM_9 = (int)TIM9_BASE,
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PWM_10 = (int)TIM10_BASE,
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PWM_11 = (int)TIM11_BASE,
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PWM_12 = (int)TIM12_BASE,
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PWM_13 = (int)TIM13_BASE,
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PWM_14 = (int)TIM14_BASE
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} PWMName;
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typedef enum {
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CAN_1 = (int)CAN1_BASE,
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CAN_2 = (int)CAN2_BASE
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} CANName;
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typedef enum {
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QSPI_1 = (int)QSPI_R_BASE,
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} QSPIName;
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,432 @@
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/* mbed Microcontroller Library
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*******************************************************************************
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* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2018, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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||||||
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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||||||
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#include "PeripheralPins.h"
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#include "mbed_toolchain.h"
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//==============================================================================
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// Notes
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//
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// - The pins mentioned Px_y_ALTz are alternative possibilities which use other
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// HW peripheral instances. You can use them the same way as any other "normal"
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// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board
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// pinout image on mbed.org.
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//
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// - The pins which are connected to other components present on the board have
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// the comment "Connected to xxx". The pin function may not work properly in this
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// case. These pins may not be displayed on the board pinout image on mbed.org.
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// Please read the board reference manual and schematic for more information.
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//
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// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented
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// See https://os.mbed.com/teams/ST/wiki/STDIO for more information.
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//
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//==============================================================================
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//*** ADC ***
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MBED_WEAK const PinMap PinMap_ADC[] = {
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{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 // Connected to WAKEUP [B2]
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{PA_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 // Connected to WAKEUP [B2]
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{PA_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 // Connected to WAKEUP [B2]
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{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
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{PA_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
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{PA_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
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{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
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{PA_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
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{PA_2_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
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{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
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{PA_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
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{PA_3_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
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{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
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{PA_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
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{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
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{PA_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
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{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
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{PA_6_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
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{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
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{PA_7_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
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{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 // Connected to EXT_RESET
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{PB_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 // Connected to EXT_RESET
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{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
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{PB_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
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{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 // Connected to SDNWE [MT48LC4M32B2B5-6A_WE]
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{PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 // Connected to SDNWE [MT48LC4M32B2B5-6A_WE]
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{PC_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 // Connected to SDNWE [MT48LC4M32B2B5-6A_WE]
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{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
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{PC_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
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{PC_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
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{PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
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{PC_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
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{PC_2_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
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{PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
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{PC_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
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{PC_3_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
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{PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
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{PC_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
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{PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
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{PC_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
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{PF_3, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 // Connected to A3
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{PF_4, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 // Connected to A4
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{PF_5, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 // Connected to A5
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{PF_6, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
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{PF_7, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 // Connected to QSPI_BK1_IO2 [N25Q128A13EF840F_DQ2]
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{PF_8, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 // Connected to QSPI_BK1_IO0 [N25Q128A13EF840F_DQ0]
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{PF_9, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 // Connected to QSPI_BK1_IO1 [N25Q128A13EF840F_DQ1]
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{PF_10, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 // Connected to QSPI_CLK [N25Q128A13EF840F_C]
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_ADC_Internal[] = {
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{ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)},
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{ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)},
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{ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)},
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{NC, NC, 0}
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};
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//*** DAC ***
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MBED_WEAK const PinMap PinMap_DAC[] = {
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{PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
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{PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
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{NC, NC, 0}
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};
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//*** I2C ***
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MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
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{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to OTG_FS1_OverCurrent [STMPS2151STR_FAULT]
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{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to I2C1_SDA
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// {PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to STDIO_UART_RX
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{PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to uSD_D1
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{PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to A0
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{PH_5, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to I2C2_SDA [CS43L22_SDA]
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{PH_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to D16
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
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{PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S]
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{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to I2C1_SCL
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// {PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to STDIO_UART_TX
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{PF_1, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to A1
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{PH_4, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to I2C2_SCL [CS43L22_SCL]
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{PH_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to GPIO_Output
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||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** PWM ***
|
||||||
|
|
||||||
|
// TIM5 cannot be used because already used by the us_ticker
|
||||||
|
MBED_WEAK const PinMap PinMap_PWM[] = {
|
||||||
|
{PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to WAKEUP [B2]
|
||||||
|
// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 // Connected to WAKEUP [B2]
|
||||||
|
{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||||
|
// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
||||||
|
{PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||||
|
// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
||||||
|
{PA_2_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
|
||||||
|
{PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
|
||||||
|
// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
|
||||||
|
{PA_3_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
|
||||||
|
{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||||
|
{PA_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||||
|
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||||
|
{PA_6_ALT0, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||||
|
{PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||||
|
{PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||||
|
{PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||||
|
{PA_7_ALT2, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||||
|
{PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||||
|
{PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 // Connected to VBUS_FS1
|
||||||
|
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 // Connected to USB_FS1_ID
|
||||||
|
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 // Connected to USB_FS1_N
|
||||||
|
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||||
|
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to EXT_RESET
|
||||||
|
{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to EXT_RESET
|
||||||
|
{PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to EXT_RESET
|
||||||
|
{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||||
|
{PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||||
|
{PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||||
|
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to I2S3_CK
|
||||||
|
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||||
|
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||||
|
{PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S]
|
||||||
|
{PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 // Connected to OTG_FS1_OverCurrent [STMPS2151STR_FAULT]
|
||||||
|
{PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 // Connected to I2C1_SCL
|
||||||
|
{PB_8_ALT0, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 // Connected to I2C1_SCL
|
||||||
|
{PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 // Connected to I2C1_SDA
|
||||||
|
{PB_9_ALT0, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 // Connected to I2C1_SDA
|
||||||
|
// {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_TX
|
||||||
|
// {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX
|
||||||
|
{PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||||
|
{PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||||
|
{PB_14_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||||
|
{PB_14_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
|
||||||
|
{PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||||
|
{PB_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||||
|
{PB_15_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
|
||||||
|
{PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||||
|
{PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
||||||
|
{PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||||
|
{PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
||||||
|
{PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to uSD_D0
|
||||||
|
{PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 // Connected to uSD_D0
|
||||||
|
{PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 // Connected to uSD_D1
|
||||||
|
{PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 // Connected to uSD_D1
|
||||||
|
{PD_12, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||||
|
{PD_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 // Connected to MIC_CK [MP34DT01TR_CLK]
|
||||||
|
{PD_14, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 // Connected to D0
|
||||||
|
{PD_15, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 // Connected to D1
|
||||||
|
{PE_5, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 // Connected to SAI1_SCKA [CS43L22_CLK]
|
||||||
|
{PE_6, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
|
||||||
|
{PE_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N // Connected to D5
|
||||||
|
{PE_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 // Connected to D6
|
||||||
|
{PE_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to D7
|
||||||
|
{PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 // Connected to D8
|
||||||
|
{PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to D9
|
||||||
|
{PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 // Connected to D10
|
||||||
|
{PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 // Connected to D11
|
||||||
|
{PF_6, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
|
||||||
|
{PF_7, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 // Connected to QSPI_BK1_IO2 [N25Q128A13EF840F_DQ2]
|
||||||
|
{PF_8, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 // Connected to QSPI_BK1_IO0 [N25Q128A13EF840F_DQ0]
|
||||||
|
{PF_9, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 // Connected to QSPI_BK1_IO1 [N25Q128A13EF840F_DQ1]
|
||||||
|
{PH_6, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
|
||||||
|
{PH_9, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 // Connected to D17
|
||||||
|
// {PH_10, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 // Connected to D18
|
||||||
|
// {PH_11, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 // Connected to D19
|
||||||
|
// {PH_12, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 // Connected to D20
|
||||||
|
{PH_13, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N // Connected to D21
|
||||||
|
{PH_14, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to D22
|
||||||
|
{PH_15, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N // Connected to D23
|
||||||
|
// {PI_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 // Connected to D24
|
||||||
|
{PI_2, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 // Connected to D26
|
||||||
|
{PI_5, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 // Connected to FMC_NBL3 [MT48LC4M32B2B5-6A_DQM3]
|
||||||
|
{PI_6, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 // Connected to D28
|
||||||
|
{PI_7, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 // Connected to D29
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** SERIAL ***
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_UART_TX[] = {
|
||||||
|
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to WAKEUP [B2]
|
||||||
|
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to VBUS_FS1
|
||||||
|
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S]
|
||||||
|
{PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_TX
|
||||||
|
{PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
// {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to uSD_D2 // STDIO UART
|
||||||
|
{PC_10, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to uSD_D2
|
||||||
|
{PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, // Connected to uSD_CLK
|
||||||
|
{PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to LED3 [Red]
|
||||||
|
// {PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to D13 // STDIO UART
|
||||||
|
{PE_1, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, // Connected to FMC_NBL1 [ MT48LC4M32B2B5-6A_DQM1]
|
||||||
|
{PE_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, // Connected to D5
|
||||||
|
{PF_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, // Connected to QSPI_BK1_IO2 [N25Q128A13EF840F_DQ2]
|
||||||
|
{PG_14, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, // Connected to ARDUINO USART6_TX
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_UART_RX[] = {
|
||||||
|
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to LCD_BL_CTRL [STLD40DPUR_EN]
|
||||||
|
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS1_ID
|
||||||
|
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to OTG_FS1_OverCurrent [STMPS2151STR_FAULT]
|
||||||
|
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_RX
|
||||||
|
{PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
// {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to uSD_D3 // STDIO UART
|
||||||
|
{PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to uSD_D3
|
||||||
|
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, // Connected to uSD_CMD
|
||||||
|
{PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to MIC_DATA [MP34DT01TR_DOUT]
|
||||||
|
// {PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to D14 // STDIO UART
|
||||||
|
{PE_0, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, // Connected to FMC_NBL0 [ MT48LC4M32B2B5-6A_DQM0]
|
||||||
|
{PE_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, // Connected to D4
|
||||||
|
{PF_6, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
|
||||||
|
{PG_9, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, // Connected to USART6_RX
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_UART_RTS[] = {
|
||||||
|
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS1_P
|
||||||
|
{PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to LED2 [Orange]
|
||||||
|
{PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, // Connected to SDCLK [MT48LC4M32B2B5-6A_CLK]
|
||||||
|
{PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_UART_CTS[] = {
|
||||||
|
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to WAKEUP [B2]
|
||||||
|
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS1_N
|
||||||
|
{PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, // Connected to SDNCAS [MT48LC4M32B2B5-6A_CAS]
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** SPI ***
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||||
|
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||||
|
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to uSD_CLK
|
||||||
|
{PD_6, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI3)}, // Connected to MIC_DATA [MP34DT01TR_DOUT]
|
||||||
|
{PE_6, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||||
|
{PE_14, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to D11
|
||||||
|
{PF_9, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to QSPI_BK1_IO1 [N25Q128A13EF840F_DQ1]
|
||||||
|
{PF_11, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to SDNMT48LC4M32B2B5-6A_RAS]RAS [
|
||||||
|
{PG_14, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, // Connected to ARDUINO USART6_TX
|
||||||
|
{PI_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to D27
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||||
|
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||||
|
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to uSD_D3
|
||||||
|
{PE_5, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to SAI1_SCKA [CS43L22_CLK]
|
||||||
|
{PE_13, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to D10
|
||||||
|
{PF_8, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to QSPI_BK1_IO0 [N25Q128A13EF840F_DQ0]
|
||||||
|
{PG_12, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||||
|
{PH_7, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to GPIO_Output
|
||||||
|
{PI_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to D26
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||||
|
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to VBUS_FS1
|
||||||
|
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to I2S3_CK
|
||||||
|
{PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to I2S3_CK
|
||||||
|
// {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to STDIO_UART_TX
|
||||||
|
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to uSD_D2
|
||||||
|
{PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PE_2, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to AUDIO_RST [CS43L22_RESET]
|
||||||
|
{PE_12, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to D9
|
||||||
|
{PF_7, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to QSPI_BK1_IO2 [N25Q128A13EF840F_DQ2]
|
||||||
|
{PG_13, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||||
|
{PH_6, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)},
|
||||||
|
{PI_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to D25
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||||
|
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||||
|
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
{PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||||
|
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to I2C1_SDA
|
||||||
|
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PE_4, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to SAI1_FSA [CS43L22_LRCK]
|
||||||
|
{PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to D8
|
||||||
|
{PF_6, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
|
||||||
|
{PG_8, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, // Connected to SDCLK [MT48LC4M32B2B5-6A_CLK]
|
||||||
|
{PH_5, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to I2C2_SDA [CS43L22_SDA]
|
||||||
|
{PI_0, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to D24
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** CAN ***
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_CAN_RD[] = {
|
||||||
|
{PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to USB_FS1_N
|
||||||
|
{PB_5, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to I2C1_SCL
|
||||||
|
{PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to D2
|
||||||
|
{PI_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to D30
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_CAN_TD[] = {
|
||||||
|
{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to USB_FS1_P
|
||||||
|
{PB_6, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S]
|
||||||
|
{PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to I2C1_SDA
|
||||||
|
{PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to D3
|
||||||
|
{PH_13, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to D21
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** QUADSPI ***
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
|
||||||
|
{PC_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0 // Connected to uSD_D1
|
||||||
|
{PD_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
|
||||||
|
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0 // Connected to QSPI_BK1_IO0 [N25Q128A13EF840F_DQ0]
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
|
||||||
|
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1 // Connected to uSD_D2
|
||||||
|
{PD_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
|
||||||
|
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1 // Connected to QSPI_BK1_IO1 [N25Q128A13EF840F_DQ1]
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
|
||||||
|
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2 // Connected to AUDIO_RST [CS43L22_RESET]
|
||||||
|
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2 // Connected to QSPI_BK1_IO2 [N25Q128A13EF840F_DQ2]
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
|
||||||
|
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
|
||||||
|
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to MIC_CK [MP34DT01TR_CLK]
|
||||||
|
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
|
||||||
|
{PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_CLK
|
||||||
|
{PF_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_CLK // Connected to QSPI_CLK [N25Q128A13EF840F_C]
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
|
||||||
|
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S]
|
||||||
|
// {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_NCS // Connected to STDIO_UART_TX
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
|
@ -0,0 +1,387 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
* Copyright (c) 2018, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_PINNAMES_H
|
||||||
|
#define MBED_PINNAMES_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "PinNamesTypes.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
ALT0 = 0x100,
|
||||||
|
ALT1 = 0x200,
|
||||||
|
ALT2 = 0x300,
|
||||||
|
ALT3 = 0x400
|
||||||
|
} ALTx;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PA_0 = 0x00,
|
||||||
|
PA_0_ALT0 = PA_0 | ALT0,
|
||||||
|
PA_0_ALT1 = PA_0 | ALT1,
|
||||||
|
PA_1 = 0x01,
|
||||||
|
PA_1_ALT0 = PA_1 | ALT0,
|
||||||
|
PA_1_ALT1 = PA_1 | ALT1,
|
||||||
|
PA_2 = 0x02,
|
||||||
|
PA_2_ALT0 = PA_2 | ALT0,
|
||||||
|
PA_2_ALT1 = PA_2 | ALT1,
|
||||||
|
PA_3 = 0x03,
|
||||||
|
PA_3_ALT0 = PA_3 | ALT0,
|
||||||
|
PA_3_ALT1 = PA_3 | ALT1,
|
||||||
|
PA_4 = 0x04,
|
||||||
|
PA_4_ALT0 = PA_4 | ALT0,
|
||||||
|
PA_5 = 0x05,
|
||||||
|
PA_5_ALT0 = PA_5 | ALT0,
|
||||||
|
PA_6 = 0x06,
|
||||||
|
PA_6_ALT0 = PA_6 | ALT0,
|
||||||
|
PA_7 = 0x07,
|
||||||
|
PA_7_ALT0 = PA_7 | ALT0,
|
||||||
|
PA_7_ALT1 = PA_7 | ALT1,
|
||||||
|
PA_7_ALT2 = PA_7 | ALT2,
|
||||||
|
PA_8 = 0x08,
|
||||||
|
PA_9 = 0x09,
|
||||||
|
PA_10 = 0x0A,
|
||||||
|
PA_11 = 0x0B,
|
||||||
|
PA_12 = 0x0C,
|
||||||
|
PA_13 = 0x0D,
|
||||||
|
PA_14 = 0x0E,
|
||||||
|
PA_15 = 0x0F,
|
||||||
|
PA_15_ALT0 = PA_15 | ALT0,
|
||||||
|
|
||||||
|
PB_0 = 0x10,
|
||||||
|
PB_0_ALT0 = PB_0 | ALT0,
|
||||||
|
PB_0_ALT1 = PB_0 | ALT1,
|
||||||
|
PB_1 = 0x11,
|
||||||
|
PB_1_ALT0 = PB_1 | ALT0,
|
||||||
|
PB_1_ALT1 = PB_1 | ALT1,
|
||||||
|
PB_2 = 0x12,
|
||||||
|
PB_3 = 0x13,
|
||||||
|
PB_3_ALT0 = PB_3 | ALT0,
|
||||||
|
PB_4 = 0x14,
|
||||||
|
PB_4_ALT0 = PB_4 | ALT0,
|
||||||
|
PB_4_ALT1 = PB_4 | ALT1,
|
||||||
|
PB_5 = 0x15,
|
||||||
|
PB_5_ALT0 = PB_5 | ALT0,
|
||||||
|
PB_5_ALT1 = PB_5 | ALT1,
|
||||||
|
PB_6 = 0x16,
|
||||||
|
PB_7 = 0x17,
|
||||||
|
PB_8 = 0x18,
|
||||||
|
PB_8_ALT0 = PB_8 | ALT0,
|
||||||
|
PB_9 = 0x19,
|
||||||
|
PB_9_ALT0 = PB_9 | ALT0,
|
||||||
|
PB_10 = 0x1A,
|
||||||
|
PB_11 = 0x1B,
|
||||||
|
PB_12 = 0x1C,
|
||||||
|
PB_13 = 0x1D,
|
||||||
|
PB_14 = 0x1E,
|
||||||
|
PB_14_ALT0 = PB_14 | ALT0,
|
||||||
|
PB_14_ALT1 = PB_14 | ALT1,
|
||||||
|
PB_15 = 0x1F,
|
||||||
|
PB_15_ALT0 = PB_15 | ALT0,
|
||||||
|
PB_15_ALT1 = PB_15 | ALT1,
|
||||||
|
|
||||||
|
PC_0 = 0x20,
|
||||||
|
PC_0_ALT0 = PC_0 | ALT0,
|
||||||
|
PC_0_ALT1 = PC_0 | ALT1,
|
||||||
|
PC_1 = 0x21,
|
||||||
|
PC_1_ALT0 = PC_1 | ALT0,
|
||||||
|
PC_1_ALT1 = PC_1 | ALT1,
|
||||||
|
PC_2 = 0x22,
|
||||||
|
PC_2_ALT0 = PC_2 | ALT0,
|
||||||
|
PC_2_ALT1 = PC_2 | ALT1,
|
||||||
|
PC_3 = 0x23,
|
||||||
|
PC_3_ALT0 = PC_3 | ALT0,
|
||||||
|
PC_3_ALT1 = PC_3 | ALT1,
|
||||||
|
PC_4 = 0x24,
|
||||||
|
PC_4_ALT0 = PC_4 | ALT0,
|
||||||
|
PC_5 = 0x25,
|
||||||
|
PC_5_ALT0 = PC_5 | ALT0,
|
||||||
|
PC_6 = 0x26,
|
||||||
|
PC_6_ALT0 = PC_6 | ALT0,
|
||||||
|
PC_7 = 0x27,
|
||||||
|
PC_7_ALT0 = PC_7 | ALT0,
|
||||||
|
PC_8 = 0x28,
|
||||||
|
PC_8_ALT0 = PC_8 | ALT0,
|
||||||
|
PC_9 = 0x29,
|
||||||
|
PC_9_ALT0 = PC_9 | ALT0,
|
||||||
|
PC_10 = 0x2A,
|
||||||
|
PC_11 = 0x2B,
|
||||||
|
PC_12 = 0x2C,
|
||||||
|
PC_13 = 0x2D,
|
||||||
|
PC_14 = 0x2E,
|
||||||
|
PC_15 = 0x2F,
|
||||||
|
|
||||||
|
PD_0 = 0x30,
|
||||||
|
PD_1 = 0x31,
|
||||||
|
PD_2 = 0x32,
|
||||||
|
PD_3 = 0x33,
|
||||||
|
PD_4 = 0x34,
|
||||||
|
PD_5 = 0x35,
|
||||||
|
PD_6 = 0x36,
|
||||||
|
PD_7 = 0x37,
|
||||||
|
PD_8 = 0x38,
|
||||||
|
PD_9 = 0x39,
|
||||||
|
PD_10 = 0x3A,
|
||||||
|
PD_11 = 0x3B,
|
||||||
|
PD_12 = 0x3C,
|
||||||
|
PD_13 = 0x3D,
|
||||||
|
PD_14 = 0x3E,
|
||||||
|
PD_15 = 0x3F,
|
||||||
|
|
||||||
|
PE_0 = 0x40,
|
||||||
|
PE_1 = 0x41,
|
||||||
|
PE_2 = 0x42,
|
||||||
|
PE_3 = 0x43,
|
||||||
|
PE_4 = 0x44,
|
||||||
|
PE_5 = 0x45,
|
||||||
|
PE_6 = 0x46,
|
||||||
|
PE_7 = 0x47,
|
||||||
|
PE_8 = 0x48,
|
||||||
|
PE_9 = 0x49,
|
||||||
|
PE_10 = 0x4A,
|
||||||
|
PE_11 = 0x4B,
|
||||||
|
PE_12 = 0x4C,
|
||||||
|
PE_13 = 0x4D,
|
||||||
|
PE_14 = 0x4E,
|
||||||
|
PE_15 = 0x4F,
|
||||||
|
|
||||||
|
PF_0 = 0x50,
|
||||||
|
PF_1 = 0x51,
|
||||||
|
PF_2 = 0x52,
|
||||||
|
PF_3 = 0x53,
|
||||||
|
PF_4 = 0x54,
|
||||||
|
PF_5 = 0x55,
|
||||||
|
PF_6 = 0x56,
|
||||||
|
PF_7 = 0x57,
|
||||||
|
PF_8 = 0x58,
|
||||||
|
PF_9 = 0x59,
|
||||||
|
PF_10 = 0x5A,
|
||||||
|
PF_11 = 0x5B,
|
||||||
|
PF_12 = 0x5C,
|
||||||
|
PF_13 = 0x5D,
|
||||||
|
PF_14 = 0x5E,
|
||||||
|
PF_15 = 0x5F,
|
||||||
|
|
||||||
|
PG_0 = 0x60,
|
||||||
|
PG_1 = 0x61,
|
||||||
|
PG_2 = 0x62,
|
||||||
|
PG_3 = 0x63,
|
||||||
|
PG_4 = 0x64,
|
||||||
|
PG_5 = 0x65,
|
||||||
|
PG_6 = 0x66,
|
||||||
|
PG_7 = 0x67,
|
||||||
|
PG_8 = 0x68,
|
||||||
|
PG_9 = 0x69,
|
||||||
|
PG_10 = 0x6A,
|
||||||
|
PG_11 = 0x6B,
|
||||||
|
PG_12 = 0x6C,
|
||||||
|
PG_13 = 0x6D,
|
||||||
|
PG_14 = 0x6E,
|
||||||
|
PG_15 = 0x6F,
|
||||||
|
|
||||||
|
PH_0 = 0x70,
|
||||||
|
PH_1 = 0x71,
|
||||||
|
PH_2 = 0x72,
|
||||||
|
PH_3 = 0x73,
|
||||||
|
PH_4 = 0x74,
|
||||||
|
PH_5 = 0x75,
|
||||||
|
PH_6 = 0x76,
|
||||||
|
PH_7 = 0x77,
|
||||||
|
PH_8 = 0x78,
|
||||||
|
PH_9 = 0x79,
|
||||||
|
PH_10 = 0x7A,
|
||||||
|
PH_11 = 0x7B,
|
||||||
|
PH_12 = 0x7C,
|
||||||
|
PH_13 = 0x7D,
|
||||||
|
PH_14 = 0x7E,
|
||||||
|
PH_15 = 0x7F,
|
||||||
|
|
||||||
|
PI_0 = 0x80,
|
||||||
|
PI_1 = 0x81,
|
||||||
|
PI_2 = 0x82,
|
||||||
|
PI_3 = 0x83,
|
||||||
|
PI_4 = 0x84,
|
||||||
|
PI_5 = 0x85,
|
||||||
|
PI_6 = 0x86,
|
||||||
|
PI_7 = 0x87,
|
||||||
|
PI_8 = 0x88,
|
||||||
|
PI_9 = 0x89,
|
||||||
|
PI_10 = 0x8A,
|
||||||
|
PI_11 = 0x8B,
|
||||||
|
PI_12 = 0x8C,
|
||||||
|
PI_13 = 0x8D,
|
||||||
|
PI_14 = 0x8E,
|
||||||
|
PI_15 = 0x8F,
|
||||||
|
|
||||||
|
PJ_0 = 0x90,
|
||||||
|
PJ_1 = 0x91,
|
||||||
|
PJ_2 = 0x92,
|
||||||
|
PJ_3 = 0x93,
|
||||||
|
PJ_4 = 0x94,
|
||||||
|
PJ_5 = 0x95,
|
||||||
|
PJ_12 = 0x9C,
|
||||||
|
PJ_13 = 0x9D,
|
||||||
|
PJ_14 = 0x9E,
|
||||||
|
PJ_15 = 0x9F,
|
||||||
|
|
||||||
|
PK_3 = 0xA3,
|
||||||
|
PK_4 = 0xA4,
|
||||||
|
PK_5 = 0xA5,
|
||||||
|
PK_6 = 0xA6,
|
||||||
|
PK_7 = 0xA7,
|
||||||
|
|
||||||
|
// ADC internal channels
|
||||||
|
ADC_TEMP = 0xF0,
|
||||||
|
ADC_VREF = 0xF1,
|
||||||
|
ADC_VBAT = 0xF2,
|
||||||
|
|
||||||
|
// Arduino connector namings
|
||||||
|
A0 = PA_2,
|
||||||
|
A1 = PA_4,
|
||||||
|
A2 = PA_6,
|
||||||
|
A3 = PC_1,
|
||||||
|
A4 = PC_4,
|
||||||
|
A5 = PC_5,
|
||||||
|
|
||||||
|
D0 = PA_1,
|
||||||
|
D1 = PA_0,
|
||||||
|
D2 = PG_7,
|
||||||
|
D3 = PD_12,
|
||||||
|
D4 = PG_9,
|
||||||
|
D5 = PA_11,
|
||||||
|
D6 = PA_10,
|
||||||
|
D7 = PG_10,
|
||||||
|
D8 = PG_11,
|
||||||
|
D9 = PB_15,
|
||||||
|
D10 = PA_15,
|
||||||
|
D11 = PA_7,
|
||||||
|
D12 = PB_4,
|
||||||
|
D13 = PB_3,
|
||||||
|
D14 = PB_7,
|
||||||
|
D15 = PB_8,
|
||||||
|
|
||||||
|
// STDIO for console print
|
||||||
|
#ifdef MBED_CONF_TARGET_STDIO_UART_TX
|
||||||
|
STDIO_UART_TX = MBED_CONF_TARGET_STDIO_UART_TX,
|
||||||
|
#else
|
||||||
|
STDIO_UART_TX = PC_12,
|
||||||
|
#endif
|
||||||
|
#ifdef MBED_CONF_TARGET_STDIO_UART_RX
|
||||||
|
STDIO_UART_RX = MBED_CONF_TARGET_STDIO_UART_RX,
|
||||||
|
#else
|
||||||
|
STDIO_UART_RX = PD_2,
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Debug pins
|
||||||
|
DEBUG_GPIO0 = PG_6,
|
||||||
|
// Generic signals namings
|
||||||
|
LED1 = PK_4, // Status LED
|
||||||
|
LED2 = PK_7, // Red LED
|
||||||
|
LED3 = PK_6, // Orange LED
|
||||||
|
LED4 = PK_5, // Green LED
|
||||||
|
AWAKE = PK_3,
|
||||||
|
SERIAL_TX = STDIO_UART_TX,
|
||||||
|
SERIAL_RX = STDIO_UART_RX,
|
||||||
|
USBTX = STDIO_UART_TX,
|
||||||
|
USBRX = STDIO_UART_RX,
|
||||||
|
I2C_SCL = PB_8,
|
||||||
|
I2C_SDA = PB_7,
|
||||||
|
SPI_MOSI = PA_7,
|
||||||
|
SPI_MISO = PB_4,
|
||||||
|
SPI_SCK = PB_3,
|
||||||
|
SPI_CS = PA_15, // SPI pins to Arduino connector
|
||||||
|
|
||||||
|
// Adding these signals for the SDP connector
|
||||||
|
SDP_SPI_MOSI = PF_9, // SDP Connector for SPI lines
|
||||||
|
SDP_SPI_MISO = PF_8,
|
||||||
|
SDP_SPI_SCK = PH_6,
|
||||||
|
SDP_SPI_CS_A = PB_9,
|
||||||
|
SDP_SPI_CS_B = PC_6,
|
||||||
|
SDP_SPI_CS_C = PC_7,
|
||||||
|
SDP_I2C_SDA = PC_9, // SDP Connector I2C lines
|
||||||
|
SDP_I2C_SCL = PH_7,
|
||||||
|
SDP_GPIO_0 = PJ_0, // SDP connector GPIO 0-7
|
||||||
|
SDP_GPIO_1 = PJ_1,
|
||||||
|
SDP_GPIO_2 = PJ_3,
|
||||||
|
SDP_GPIO_3 = PJ_4,
|
||||||
|
SDP_GPIO_4 = PJ_5,
|
||||||
|
SDP_GPIO_5 = PJ_12,
|
||||||
|
SDP_GPIO_6 = PJ_13,
|
||||||
|
SDP_GPIO_7 = PJ_14,
|
||||||
|
SDP_UART_TX = PD_5, // SDP connector UART
|
||||||
|
SDP_UART_RX = PD_6,
|
||||||
|
SDP_TMR_A = PB_14, // SDP connector TMR A, B & D
|
||||||
|
SDP_TMR_B = PE_6,
|
||||||
|
SDP_TMR_D = PC_8,
|
||||||
|
|
||||||
|
PWM_OUT = PA_1,
|
||||||
|
|
||||||
|
/**** USB pins ****/
|
||||||
|
USB_OTG_HS_DM = PB_14,
|
||||||
|
USB_OTG_HS_DP = PB_15,
|
||||||
|
USB_OTG_HS_ID = PB_12,
|
||||||
|
USB_OTG_HS_SOF = PA_4,
|
||||||
|
USB_OTG_HS_ULPI_CK = PA_5,
|
||||||
|
USB_OTG_HS_ULPI_D0 = PA_3,
|
||||||
|
USB_OTG_HS_ULPI_D1 = PB_0,
|
||||||
|
USB_OTG_HS_ULPI_D2 = PB_1,
|
||||||
|
USB_OTG_HS_ULPI_D3 = PB_10,
|
||||||
|
USB_OTG_HS_ULPI_D4 = PB_11,
|
||||||
|
USB_OTG_HS_ULPI_D5 = PB_12,
|
||||||
|
USB_OTG_HS_ULPI_D6 = PB_13,
|
||||||
|
USB_OTG_HS_ULPI_D7 = PB_5,
|
||||||
|
USB_OTG_HS_ULPI_DIR = PI_11,
|
||||||
|
USB_OTG_HS_ULPI_DIR_ALT0 = PC_2,
|
||||||
|
USB_OTG_HS_ULPI_NXT = PH_4,
|
||||||
|
USB_OTG_HS_ULPI_NXT_ALT0 = PC_3,
|
||||||
|
USB_OTG_HS_ULPI_STP = PC_0,
|
||||||
|
USB_OTG_HS_VBUS = PB_13,
|
||||||
|
|
||||||
|
/**** OSCILLATOR pins ****/
|
||||||
|
RCC_OSC32_IN = PC_14,
|
||||||
|
RCC_OSC32_OUT = PC_15,
|
||||||
|
|
||||||
|
/**** DEBUG pins ****/
|
||||||
|
SYS_JTCK_SWCLK = PA_14,
|
||||||
|
SYS_JTMS_SWDIO = PA_13,
|
||||||
|
|
||||||
|
// Not connected
|
||||||
|
NC = (int)0xFFFFFFFF
|
||||||
|
} PinName;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,276 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2006-2019 ARM Limited
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This file configures the system clock as follows:
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
|
||||||
|
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
|
||||||
|
* | 3- USE_PLL_HSI (internal 16 MHz)
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(MHz) | 180
|
||||||
|
* AHBCLK (MHz) | 180
|
||||||
|
* APB1CLK (MHz) | 45
|
||||||
|
* APB2CLK (MHz) | 90
|
||||||
|
* USB capable | YES
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
**/
|
||||||
|
|
||||||
|
#include "stm32f4xx.h"
|
||||||
|
#include "nvic_addr.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
|
||||||
|
|
||||||
|
// clock source is selected with CLOCK_SOURCE in json config
|
||||||
|
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
|
||||||
|
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
|
||||||
|
#define USE_PLL_HSI 0x2 // Use HSI internal clock
|
||||||
|
|
||||||
|
//#define DEBUG_MCO (1) // Output the MCO1/MCO2 on PA8/PC9 for debugging (0=OFF, 1=ON)
|
||||||
|
|
||||||
|
|
||||||
|
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
|
||||||
|
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void);
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system
|
||||||
|
* Initialize the FPU setting, vector table location and External memory
|
||||||
|
* configuration.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
/* Set HSION bit */
|
||||||
|
RCC->CR |= (uint32_t)0x00000001;
|
||||||
|
|
||||||
|
/* Reset CFGR register */
|
||||||
|
RCC->CFGR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||||
|
|
||||||
|
/* Reset PLLCFGR register */
|
||||||
|
RCC->PLLCFGR = 0x24003010;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIR = 0x00000000;
|
||||||
|
|
||||||
|
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||||
|
SystemInit_ExtMemCtl();
|
||||||
|
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
* @note This function should be called only once the RCC clock configuration
|
||||||
|
* is reset to the default reset state (done in SystemInit() function).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SetSysClock(void)
|
||||||
|
{
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
|
||||||
|
/* 1- Try to start with HSE and external clock */
|
||||||
|
if (SetSysClock_PLL_HSE(1) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
|
||||||
|
/* 2- If fail try to start with HSE and external xtal */
|
||||||
|
if (SetSysClock_PLL_HSE(0) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||||
|
/* 3- If fail start with HSI clock */
|
||||||
|
if (SetSysClock_PLL_HSI() == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
{
|
||||||
|
error("SetSysClock failed\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Output clock on MCO2 pin(PC9) for debugging purpose
|
||||||
|
#if DEBUG_MCO == 1
|
||||||
|
HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSE) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||||
|
|
||||||
|
/* Enable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
if (bypass == 0) {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
|
}
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2; //
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// Activate the OverDrive to reach the 180 MHz Frequency
|
||||||
|
if (HAL_PWREx_EnableOverDrive() != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// Select PLLSAI output as USB clock source
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
|
||||||
|
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
|
||||||
|
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 180 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 45 MHz
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 90 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// Output clock on MCO1 pin(PA8) for debugging purpose
|
||||||
|
#if DEBUG_MCO == 1
|
||||||
|
if (bypass == 0) {
|
||||||
|
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz with xtal
|
||||||
|
} else {
|
||||||
|
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz with external clock (MCO)
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
|
||||||
|
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSI) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||||
|
|
||||||
|
/* Enable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/* Enable HSI oscillator and activate PLL with HSI as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 6; //
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select PLLSAI output as USB clock source */
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
|
||||||
|
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
|
||||||
|
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 180 MHz
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 180 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 45 MHz
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 90 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// Output clock on MCO1 pin(PA8) for debugging purpose
|
||||||
|
#if DEBUG_MCO == 1
|
||||||
|
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
|
@ -3843,6 +3843,42 @@
|
||||||
"device_name": "STM32F469NI",
|
"device_name": "STM32F469NI",
|
||||||
"bootloader_supported": true
|
"bootloader_supported": true
|
||||||
},
|
},
|
||||||
|
"SDP_K1": {
|
||||||
|
"inherits": ["FAMILY_STM32"],
|
||||||
|
"core": "Cortex-M4",
|
||||||
|
"supported_form_factors": ["ARDUINO"],
|
||||||
|
"extra_labels_add": [
|
||||||
|
"STM32F4",
|
||||||
|
"STM32F469",
|
||||||
|
"STM32F469NI",
|
||||||
|
"STM32F469xI",
|
||||||
|
"STM32F469xx"
|
||||||
|
],
|
||||||
|
"config": {
|
||||||
|
"clock_source": {
|
||||||
|
"help": "Clock source to use, can be XTAL or RC",
|
||||||
|
"value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
|
||||||
|
"macro_name": "CLOCK_SOURCE"
|
||||||
|
},
|
||||||
|
"clock_freq": {
|
||||||
|
"help": "Clock frequency in Mhz",
|
||||||
|
"value": "8",
|
||||||
|
"macro_name": "CLOCK_FREQUENCY_MHZ"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"overrides": {
|
||||||
|
"lse_available": 0
|
||||||
|
},
|
||||||
|
"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
|
||||||
|
"device_has_add": [
|
||||||
|
"ANALOGOUT",
|
||||||
|
"MPU"
|
||||||
|
],
|
||||||
|
"device_has_remove": ["LPTICKER"],
|
||||||
|
"device_name": "STM32F469NI",
|
||||||
|
"release_versions": ["5"],
|
||||||
|
"detect_code": ["0604"]
|
||||||
|
},
|
||||||
"DISCO_L053C8": {
|
"DISCO_L053C8": {
|
||||||
"inherits": ["FAMILY_STM32"],
|
"inherits": ["FAMILY_STM32"],
|
||||||
"core": "Cortex-M0+",
|
"core": "Cortex-M0+",
|
||||||
|
|
Loading…
Reference in New Issue