Merge pull request #2699 from bulislaw/feature_wifi_rebase

Feature wifi rebase

.github/issue_template.md

@@ -0,0 +1,48 @@
+Note: This is just a template, so feel free to use/remove the unnecessary things
+
+### Description
+- Type: Bug | Enhancement | Question
+- Related issue: `#abc`
+- Priority: Blocker | Major | Minor
+
+---------------------------------------------------------------
+## Bug
+
+**Target**
+K64F|??
+
+**Toolchain:**
+GCC_ARM|ARM|IAR
+
+**Toolchain version:**
+
+**mbed-cli version:** 
+(`mbed --version`)
+
+**meed-os sha:**
+(`git log -n1 --oneline`)
+
+**DAPLink version:**
+
+**Expected behavior**
+
+**Actual behavior**
+
+**Steps to reproduce**
+
+----------------------------------------------------------------
+## Enhancement
+
+**Reason to enhance or problem with existing solution**
+
+**Suggested enhancement**
+
+**Pros**
+
+**Cons**
+
+-----------------------------------------------------------------
+
+## Question
+
+**How to?**

.github/pull_request_template.md

@@ -0,0 +1,39 @@
+Notes:
+* Pull requests will not be accepted until the submitter has agreed to the [contributer agreement](https://github.com/ARMmbed/mbed-os/blob/master/CONTRIBUTING.md).
+* This is just a template, so feel free to use/remove the unnecessary things
+
+## Description
+A few sentences describing the overall goals of the pull request's commits.
+
+
+## Status
+**READY/IN DEVELOPMENT/HOLD**
+
+
+## Migrations
+If this PR changes any APIs or behaviors, give a short description of what *API users* should do when this PR is merged.
+
+YES | NO
+
+
+## Related PRs
+List related PRs against other branches:
+
+branch | PR
+------ | ------
+other_pr_production | [link]()
+other_pr_master | [link]()
+
+
+## Todos
+- [ ] Tests
+- [ ] Documentation
+
+
+## Deploy notes
+Notes regarding the deployment of this PR. These should note any
+required changes in the build environment, tools, compilers, etc.
+
+
+## Steps to test or reproduce
+Outline the steps to test or reproduce the PR here.

Jenkinsfile

@@ -0,0 +1,26 @@
+// List of targets to compile
+def targets = [
+  //"LPC1768",
+  //"NUCLEO_F401RE",
+  //"NRF51822",
+  "K64F"
+  ]
+
+// Map toolchains to compiler labels on Jenkins
+def toolchains = [
+  //ARM: "armcc",
+  //IAR: "iar_arm",
+  GCC_ARM: "arm-none-eabi-gcc"
+  ]
+
+// Create a map of predefined build steps 
+stage "generate build steps for parallel execution"
+def parallelSteps = mbed.createParalleSteps("mbed-os", targets, toolchains)
+
+// Run build steps parallel, map as paramater
+stage "build all targets"
+mbed.compile(parallelSteps)
+
+// Run testapps, mbed-os commit hash or master as parameter
+stage "run mbed-os testapps"
+mbed.runTestApps("${env.GIT_REVISION}")

TESTS/host_tests/timing_drift_auto.py

@@ -0,0 +1,106 @@
+"""
+mbed SDK
+Copyright (c) 2011-2013 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+
+from mbed_host_tests import BaseHostTest
+
+
+class TimingDriftTest(BaseHostTest):
+    """ This test is reading single characters from stdio
+        and measures time between their occurrences.
+    """
+    __result = None
+    
+    # This is calculated later: average_drift_max * number of tick events
+    total_drift_max = None
+    
+    average_drift_max = 0.05
+    ticks = []
+    start_time = None
+    finish_time = None
+    dut_seconds_passed = None
+    total_time = None
+    total_drift = None
+    average_drift = None
+    
+    def _callback_result(self, key, value, timestamp):
+        # We should not see result data in this test
+        self.__result = False
+
+    def _callback_end(self, key, value, timestamp):
+        """ {{end;%s}}} """
+        self.log("Received end event, timestamp: %f" % timestamp)
+        self.notify_complete(result=self.result(print_stats=True))
+
+
+    def _callback_tick(self, key, value, timestamp):
+        """ {{tick;%d}}} """
+        self.log("tick! %f" % timestamp)
+        self.ticks.append((key, value, timestamp))
+
+
+    def setup(self):
+        self.register_callback("end", self._callback_end)
+        self.register_callback('tick', self._callback_tick)
+
+
+    def result(self, print_stats=True):        
+        self.dut_seconds_passed = len(self.ticks) - 1
+        
+        if self.dut_seconds_passed < 1:
+            if print_stats:
+                self.log("FAIL: failed to receive at least two tick events")
+            self.__result = False
+            return self.__result
+
+        self.total_drift_max = self.dut_seconds_passed * self.average_drift_max
+
+        self.start_time = self.ticks[0][2]
+        self.finish_time = self.ticks[-1][2]
+        self.total_time = self.finish_time - self.start_time
+        self.total_drift = self.total_time - self.dut_seconds_passed
+        self.average_drift = self.total_drift / self.dut_seconds_passed
+        
+        if print_stats:
+            self.log("Start: %f" % self.start_time)
+            self.log("Finish: %f" % self.finish_time)
+            self.log("Total time taken: %f" % self.total_time)
+        
+            total_drift_ratio_string = "Total drift/Max total drift: %f/%f"
+            self.log(total_drift_ratio_string % (self.total_drift,
+                                                 self.total_drift_max))
+                                                 
+            average_drift_ratio_string = "Average drift/Max average drift: %f/%f"
+            self.log(average_drift_ratio_string % (self.average_drift,
+                                                   self.average_drift_max))
+        
+
+        if abs(self.total_drift) > self.total_drift_max:
+            if print_stats:
+                self.log("FAIL: Total drift exceeded max total drift")
+            self.__result = False
+        elif self.average_drift > self.average_drift_max:
+            if print_stats:
+                self.log("FAIL: Average drift exceeded max average drift")
+            self.__result = False
+        else:
+            self.__result = True
+        
+        return self.__result
+
+
+    def teardown(self):
+        pass

TESTS/integration/threaded_blinky/main.cpp

@@ -1,29 +0,0 @@
-#include "test_env.h"
-#include "mbed.h"
-#include "rtos.h"
-
-#if defined(MBED_RTOS_SINGLE_THREAD)
-  #error [NOT_SUPPORTED] test not supported
-#endif
-
-DigitalOut led1(LED1);
-
-  
-void led1_thread(void const *args) {
-    int count = 0;
-    while (true) {
-        Thread::wait(1000);
-        greentea_send_kv("tick", count);
-        count++;
-        led1 = !led1;
-    }
-}
- 
-int main() {
-    GREENTEA_SETUP(20, "wait_us_auto");
-    
-    Thread thread(led1_thread);
-    
-    while (true) {
-    }
-}

TESTS/mbed_drivers/lp_timeout/main.cpp

@@ -43,11 +43,15 @@ void lp_timeout_1s_deepsleep(void)
 {
     complete = false;
 
-    timestamp_t start = us_ticker_read();
+    /* 
+     * We use here lp_ticker_read() instead of us_ticker_read() for start and 
+     * end because the microseconds timer might be disable during deepsleep.
+     */
+    timestamp_t start = lp_ticker_read();
     lpt.attach(&cb_done, 1);
     deepsleep();
     while (!complete);
-    timestamp_t end = us_ticker_read();
+    timestamp_t end = lp_ticker_read();
 
     /* It takes longer to wake up from deep sleep */
     TEST_ASSERT_UINT32_WITHIN(LONG_TIMEOUT, 1000000, end - start);

TESTS/mbed_drivers/race_test/main.cpp

@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2016-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "mbed.h"
+#include "rtos.h"
+#include "greentea-client/test_env.h"
+#include "unity/unity.h"
+#include "utest/utest.h"
+#include "SingletonPtr.h"
+#include <stdio.h>
+
+using namespace utest::v1;
+
+#define TEST_STACK_SIZE     1024
+static uint32_t instance_count = 0;
+
+class TestClass {
+public:
+    TestClass() {
+        printf("TestClass ctor start\r\n");
+        Thread::wait(500);
+        instance_count++;
+        printf("TestClass ctor end\r\n");
+    }
+
+    void do_something() {
+        printf("Do something called\r\n");
+    }
+
+    ~TestClass() {
+        instance_count--;
+    }
+};
+
+static TestClass* get_test_class()
+{
+    static TestClass tc;
+    return &tc;
+}
+
+static SingletonPtr<TestClass> test_class;
+
+static void main_func_race()
+{
+    get_test_class();
+}
+
+static void main_class_race()
+{
+    test_class->do_something();
+}
+
+void test_case_func_race()
+{
+    printf("Running function race test\r\n");
+    Callback<void()> cb(main_func_race);
+    Thread *t1 = new Thread(osPriorityNormal, TEST_STACK_SIZE);
+    Thread *t2 = new Thread(osPriorityNormal, TEST_STACK_SIZE);
+
+    // Start start first thread
+    t1->start(cb);
+    // Start second thread while the first is inside the constructor
+    Thread::wait(250);
+    t2->start(cb);
+
+    // Wait for the threads to finish
+    t1->join();
+    t2->join();
+
+    delete t1;
+    delete t2;
+
+    TEST_ASSERT_EQUAL_UINT32(1, instance_count);
+
+    // Reset instance count
+    instance_count = 0;
+}
+
+void test_case_class_race()
+{
+    printf("Running class race test\r\n");
+    Callback<void()> cb(main_class_race);
+    Thread *t1 = new Thread(osPriorityNormal, TEST_STACK_SIZE);
+    Thread *t2 = new Thread(osPriorityNormal, TEST_STACK_SIZE);
+
+    // Start start first thread
+    t1->start(cb);
+    // Start second thread while the first is inside the constructor
+    Thread::wait(250);
+    t2->start(cb);
+
+    // Wait for the threads to finish
+    t1->join();
+    t2->join();
+
+    delete t1;
+    delete t2;
+
+    TEST_ASSERT_EQUAL_UINT32(1, instance_count);
+
+    // Reset instance count
+    instance_count = 0;
+}
+
+Case cases[] = {
+    Case("function init race", test_case_func_race),
+    Case("class init race", test_case_class_race),
+};
+
+utest::v1::status_t greentea_test_setup(const size_t number_of_cases)
+{
+    GREENTEA_SETUP(20, "default_auto");
+    return greentea_test_setup_handler(number_of_cases);
+}
+
+Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler);
+
+int main()
+{
+    Harness::run(specification);
+}

TESTS/mbed_drivers/ticker/main.cpp

@@ -21,6 +21,7 @@
 using namespace utest::v1;
 
 static const int ONE_SECOND_MS = 1000;
+static const int total_ticks = 10;
 
 DigitalOut led1(LED1);
 DigitalOut led2(LED2);
@@ -28,25 +29,23 @@ DigitalOut led2(LED2);
 Ticker *ticker1;
 Ticker *ticker2;
 
+volatile int ticker_count = 0;
+volatile bool print_tick = false;
+
 void send_kv_tick() {
-    static int count = 0;
-    if (count < 10) {
-        greentea_send_kv("tick", count);
-    } else if (count == 10) {
-        count = 0;
-        Harness::validate_callback();
+    if (ticker_count <= total_ticks) {
+        print_tick = true;
     }
-    count++;
 }
 
 void ticker_callback_0(void) {
-    static int ticker_count = 0;
-    if (ticker_count >= ONE_SECOND_MS) {
+    static int fast_ticker_count = 0;
+    if (fast_ticker_count >= ONE_SECOND_MS) {
         send_kv_tick();
-        ticker_count = 0;
+        fast_ticker_count = 0;
         led1 = !led1;
     }
-    ticker_count++;
+    fast_ticker_count++;
 }
 
 void ticker_callback_1(void) {
@@ -78,26 +77,38 @@ void ticker_callback_2_switch_to_1(void) {
     ticker_callback_2();
 }
 
-utest::v1::control_t test_case_1x_ticker() {
-    led1 = 0;
-    led2 = 0;
-    ticker1->attach_us(ticker_callback_0, ONE_SECOND_MS);
-    return CaseTimeout(15 * ONE_SECOND_MS);
+void wait_and_print() {
+    while(ticker_count <= total_ticks) {
+        if (print_tick) {
+            print_tick = false;
+            greentea_send_kv("tick", ticker_count++);
+        }
+    }
 }
 
-control_t test_case_2x_ticker() {
+void test_case_1x_ticker() {
     led1 = 0;
     led2 = 0;
+    ticker_count = 0;
+    ticker1->attach_us(ticker_callback_0, ONE_SECOND_MS);
+    wait_and_print();
+}
+
+void test_case_2x_ticker() {
+    led1 = 0;
+    led2 = 0;
+    ticker_count = 0;
     ticker1->attach(&ticker_callback_1, 1.0);
     ticker2->attach(&ticker_callback_2_led, 2.0);
-    return CaseTimeout(15 * ONE_SECOND_MS);
+    wait_and_print();
 }
 
-utest::v1::control_t test_case_2x_callbacks() {
+void test_case_2x_callbacks() {
     led1 = 0;
     led2 = 0;
+    ticker_count = 0;
     ticker1->attach(ticker_callback_1_switch_to_2, 1.0);
-    return CaseTimeout(15 * ONE_SECOND_MS);
+    wait_and_print();
 }
 
 utest::v1::status_t one_ticker_case_setup_handler_t(const Case *const source, const size_t index_of_case) {
@@ -130,7 +141,7 @@ Case cases[] = {
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases) {
-    GREENTEA_SETUP(60, "wait_us_auto");
+    GREENTEA_SETUP((total_ticks + 5) * 3, "timing_drift_auto");
     return greentea_test_setup_handler(number_of_cases);
 }
 

TESTS/mbed_drivers/timeout/main.cpp

@@ -20,43 +20,33 @@
 
 using namespace utest::v1;
 
-Timeout timer;
+Timeout timeout;
 DigitalOut led(LED1);
-
-namespace {
-    const int MS_INTERVALS = 1000;
-}
+volatile int ticker_count = 0;
+volatile bool print_tick = false;
+static const int total_ticks = 10;
+const int ONE_SECOND_US = 1000000;
 
 void send_kv_tick() {
-    static int count = 0;
-    if (count < 10) {
-        greentea_send_kv("tick", count);
-    } else if (count == 10) {
-        Harness::validate_callback();
+    if (ticker_count <= total_ticks) {
+        timeout.attach_us(send_kv_tick, ONE_SECOND_US);
+        print_tick = true;
     }
-    count++;
 }
 
-void toggleOff(void);
-
-void toggleOn(void) {
-    static int toggle_counter = 0;
-    if (toggle_counter == MS_INTERVALS) {
-        led = !led;
-        send_kv_tick();
-        toggle_counter = 0;
+void wait_and_print() {
+    while(ticker_count <= total_ticks) {
+        if (print_tick) {
+            print_tick = false;
+            greentea_send_kv("tick", ticker_count++);
+            led = !led;
+        }
     }
-    toggle_counter++;
-    timer.attach_us(toggleOff, 500);
 }
 
-void toggleOff(void) {
-    timer.attach_us(toggleOn, 500);
-}
-
-control_t test_case_ticker() {
-    toggleOn();
-    return CaseTimeout(15 * 1000);
+void test_case_ticker() {
+    timeout.attach_us(send_kv_tick, ONE_SECOND_US);
+    wait_and_print();
 }
 
 // Test cases
@@ -65,7 +55,7 @@ Case cases[] = {
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases) {
-    GREENTEA_SETUP(20, "wait_us_auto");
+    GREENTEA_SETUP(total_ticks + 5, "timing_drift_auto");
     return greentea_test_setup_handler(number_of_cases);
 }
 

TESTS/mbed_drivers/wait_us/main.cpp

@@ -18,18 +18,23 @@
 #include "greentea-client/test_env.h"
 #include "utest/utest.h"
 
+/**
+  NOTE: This test will have a bit of inherent drift due to it being
+  single-threaded, so having a drift that is non-zero should be ok. However,
+  it should still be well under the limit.
+**/
+
+
 using namespace utest::v1;
 
 DigitalOut led(LED1);
+volatile bool print_tick = false;
+const int ONE_SECOND_US = 1000000;
+const int total_ticks = 10;
 
 void test_case_ticker() {  
-    for (int i=0; i < 10; ++i) {
-        // 10 secs...
-        for (int j = 0; j < 1000; ++j) {
-            // 1000 * 1000us = 1 sec
-            wait_us(1000);
-        }
-        led = !led; // Blink
+    for (int i = 0; i <= total_ticks; i++) {
+        wait_us(ONE_SECOND_US);
         greentea_send_kv("tick", i);
     }
 }
@@ -40,7 +45,7 @@ Case cases[] = {
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases) {
-    GREENTEA_SETUP(20, "wait_us_auto");
+    GREENTEA_SETUP(total_ticks + 5, "timing_drift_auto");
     return greentea_test_setup_handler(number_of_cases);
 }
 

TESTS/mbed_functional/callback/main.cpp

@@ -0,0 +1,497 @@
+#include "mbed.h"
+#include "greentea-client/test_env.h"
+#include "unity.h"
+#include "utest.h"
+
+using namespace utest::v1;
+
+
+// static functions
+template <typename T>
+T static_func0()
+    { return 0; }
+template <typename T>
+T static_func1(T a0)
+    { return 0 | a0; }
+template <typename T>
+T static_func2(T a0, T a1)
+    { return 0 | a0 | a1; }
+template <typename T>
+T static_func3(T a0, T a1, T a2)
+    { return 0 | a0 | a1 | a2; }
+template <typename T>
+T static_func4(T a0, T a1, T a2, T a3)
+    { return 0 | a0 | a1 | a2 | a3; }
+template <typename T>
+T static_func5(T a0, T a1, T a2, T a3, T a4)
+    { return 0 | a0 | a1 | a2 | a3 | a4; }
+
+// class functions
+template <typename T>
+struct Thing {
+    T t;
+    Thing() : t(0x80) {}
+
+    T member_func0()
+        { return t; }
+    T member_func1(T a0)
+        { return t | a0; }
+    T member_func2(T a0, T a1)
+        { return t | a0 | a1; }
+    T member_func3(T a0, T a1, T a2)
+        { return t | a0 | a1 | a2; }
+    T member_func4(T a0, T a1, T a2, T a3)
+        { return t | a0 | a1 | a2 | a3; }
+    T member_func5(T a0, T a1, T a2, T a3, T a4)
+        { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_member_func0() const
+        { return t; }
+    T const_member_func1(T a0) const
+        { return t | a0; }
+    T const_member_func2(T a0, T a1) const
+        { return t | a0 | a1; }
+    T const_member_func3(T a0, T a1, T a2) const
+        { return t | a0 | a1 | a2; }
+    T const_member_func4(T a0, T a1, T a2, T a3) const
+        { return t | a0 | a1 | a2 | a3; }
+    T const_member_func5(T a0, T a1, T a2, T a3, T a4) const
+        { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T volatile_member_func0() volatile
+        { return t; }
+    T volatile_member_func1(T a0) volatile
+        { return t | a0; }
+    T volatile_member_func2(T a0, T a1) volatile
+        { return t | a0 | a1; }
+    T volatile_member_func3(T a0, T a1, T a2) volatile
+        { return t | a0 | a1 | a2; }
+    T volatile_member_func4(T a0, T a1, T a2, T a3) volatile
+        { return t | a0 | a1 | a2 | a3; }
+    T volatile_member_func5(T a0, T a1, T a2, T a3, T a4) volatile
+        { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_volatile_member_func0() const volatile
+        { return t; }
+    T const_volatile_member_func1(T a0) const volatile
+        { return t | a0; }
+    T const_volatile_member_func2(T a0, T a1) const volatile
+        { return t | a0 | a1; }
+    T const_volatile_member_func3(T a0, T a1, T a2) const volatile
+        { return t | a0 | a1 | a2; }
+    T const_volatile_member_func4(T a0, T a1, T a2, T a3) const volatile
+        { return t | a0 | a1 | a2 | a3; }
+    T const_volatile_member_func5(T a0, T a1, T a2, T a3, T a4) const volatile
+        { return t | a0 | a1 | a2 | a3 | a4; }
+};
+
+// bound functions
+template <typename T>
+T bound_func0(Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T bound_func1(Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T bound_func2(Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T bound_func3(Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T bound_func4(Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T bound_func5(Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_bound_func0(const Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T const_bound_func1(const Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T const_bound_func2(const Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T const_bound_func3(const Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_bound_func4(const Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_bound_func5(const Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T volatile_bound_func0(volatile Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T volatile_bound_func1(volatile Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T volatile_bound_func2(volatile Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T volatile_bound_func3(volatile Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T volatile_bound_func4(volatile Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T volatile_bound_func5(volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_volatile_bound_func0(const volatile Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T const_volatile_bound_func1(const volatile Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T const_volatile_bound_func2(const volatile Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T const_volatile_bound_func3(const volatile Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_volatile_bound_func4(const volatile Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_volatile_bound_func5(const volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+
+// void functions
+template <typename T>
+T void_func0(void *t)
+    { return static_cast<Thing<T>*>(t)->t; }
+template <typename T>
+T void_func1(void *t, T a0)
+    { return static_cast<Thing<T>*>(t)->t | a0; }
+template <typename T>
+T void_func2(void *t, T a0, T a1)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T void_func3(void *t, T a0, T a1, T a2)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T void_func4(void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T void_func5(void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_void_func0(const void *t)
+    { return static_cast<const Thing<T>*>(t)->t; }
+template <typename T>
+T const_void_func1(const void *t, T a0)
+    { return static_cast<const Thing<T>*>(t)->t | a0; }
+template <typename T>
+T const_void_func2(const void *t, T a0, T a1)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T const_void_func3(const void *t, T a0, T a1, T a2)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T const_void_func4(const void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_void_func5(const void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T volatile_void_func0(volatile void *t)
+    { return static_cast<volatile Thing<T>*>(t)->t; }
+template <typename T>
+T volatile_void_func1(volatile void *t, T a0)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0; }
+template <typename T>
+T volatile_void_func2(volatile void *t, T a0, T a1)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T volatile_void_func3(volatile void *t, T a0, T a1, T a2)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T volatile_void_func4(volatile void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T volatile_void_func5(volatile void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_volatile_void_func0(const volatile void *t)
+    { return static_cast<const volatile Thing<T>*>(t)->t; }
+template <typename T>
+T const_volatile_void_func1(const volatile void *t, T a0)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0; }
+template <typename T>
+T const_volatile_void_func2(const volatile void *t, T a0, T a1)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T const_volatile_void_func3(const volatile void *t, T a0, T a1, T a2)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T const_volatile_void_func4(const volatile void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_volatile_void_func5(const volatile void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+
+
+// function call and result verification
+template <typename T>
+struct Verifier {
+    static void verify0(Callback<T()> func) {
+        T result = func();
+        TEST_ASSERT_EQUAL(result, 0x00);
+    }
+
+    template <typename O, typename M>
+    static void verify0(O *obj, M method) {
+        Callback<T()> func(obj, method);
+        T result = func();
+        TEST_ASSERT_EQUAL(result, 0x80);
+    }
+
+    static void verify1(Callback<T(T)> func) {
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0));
+    }
+
+    template <typename O, typename M>
+    static void verify1(O *obj, M method) {
+        Callback<T(T)> func(obj, method);
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0));
+    }
+
+    static void verify2(Callback<T(T, T)> func) {
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1));
+    }
+
+    template <typename O, typename M>
+    static void verify2(O *obj, M method) {
+        Callback<T(T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1));
+    }
+
+    static void verify3(Callback<T(T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    template <typename O, typename M>
+    static void verify3(O *obj, M method) {
+        Callback<T(T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    static void verify4(Callback<T(T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    template <typename O, typename M>
+    static void verify4(O *obj, M method) {
+        Callback<T(T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    static void verify5(Callback<T(T, T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+
+    template <typename O, typename M>
+    static void verify5(O *obj, M method) {
+        Callback<T(T, T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+};
+
+
+// test dispatch
+template <typename T>
+void test_dispatch0() {
+    Thing<T> thing;
+    Verifier<T>::verify0(static_func0<T>);
+    Verifier<T>::verify0(&thing, &Thing<T>::member_func0);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &Thing<T>::const_member_func0);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func0);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func0);
+    Verifier<T>::verify0(&thing, &bound_func0<T>);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &const_bound_func0<T>);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &volatile_bound_func0<T>);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &const_volatile_bound_func0<T>);
+    Verifier<T>::verify0(&thing, &void_func0<T>);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &const_void_func0<T>);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &volatile_void_func0<T>);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &const_volatile_void_func0<T>);
+    Verifier<T>::verify0(callback(static_func0<T>));
+
+    Callback<T()> cb(static_func0);
+    Verifier<T>::verify0(cb);
+    cb = static_func0;
+    Verifier<T>::verify0(cb);
+    cb.attach(&thing, &bound_func0<T>);
+    Verifier<T>::verify0(&cb, &Callback<T()>::call);
+    Verifier<T>::verify0((void*)&cb, &Callback<T()>::thunk);
+}
+
+template <typename T>
+void test_dispatch1() {
+    Thing<T> thing;
+    Verifier<T>::verify1(static_func1<T>);
+    Verifier<T>::verify1(&thing, &Thing<T>::member_func1);
+    Verifier<T>::verify1((const Thing<T>*)&thing, &Thing<T>::const_member_func1);
+    Verifier<T>::verify1((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func1);
+    Verifier<T>::verify1((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func1);
+    Verifier<T>::verify1(&thing, &bound_func1<T>);
+    Verifier<T>::verify1((const Thing<T>*)&thing, &const_bound_func1<T>);
+    Verifier<T>::verify1((volatile Thing<T>*)&thing, &volatile_bound_func1<T>);
+    Verifier<T>::verify1((const volatile Thing<T>*)&thing, &const_volatile_bound_func1<T>);
+    Verifier<T>::verify1(&thing, &void_func1<T>);
+    Verifier<T>::verify1((const Thing<T>*)&thing, &const_void_func1<T>);
+    Verifier<T>::verify1((volatile Thing<T>*)&thing, &volatile_void_func1<T>);
+    Verifier<T>::verify1((const volatile Thing<T>*)&thing, &const_volatile_void_func1<T>);
+    Verifier<T>::verify1(callback(static_func1<T>));
+
+    Callback<T(T)> cb(static_func1);
+    Verifier<T>::verify1(cb);
+    cb = static_func1;
+    Verifier<T>::verify1(cb);
+    cb.attach(&thing, &bound_func1<T>);
+    Verifier<T>::verify1(&cb, &Callback<T(T)>::call);
+    Verifier<T>::verify1((void*)&cb, &Callback<T(T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch2() {
+    Thing<T> thing;
+    Verifier<T>::verify2(static_func2<T>);
+    Verifier<T>::verify2(&thing, &Thing<T>::member_func2);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &Thing<T>::const_member_func2);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func2);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func2);
+    Verifier<T>::verify2(&thing, &bound_func2<T>);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &const_bound_func2<T>);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &volatile_bound_func2<T>);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &const_volatile_bound_func2<T>);
+    Verifier<T>::verify2(&thing, &void_func2<T>);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &const_void_func2<T>);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &volatile_void_func2<T>);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &const_volatile_void_func2<T>);
+    Verifier<T>::verify2(callback(static_func2<T>));
+
+    Callback<T(T, T)> cb(static_func2);
+    Verifier<T>::verify2(cb);
+    cb = static_func2;
+    Verifier<T>::verify2(cb);
+    cb.attach(&thing, &bound_func2<T>);
+    Verifier<T>::verify2(&cb, &Callback<T(T, T)>::call);
+    Verifier<T>::verify2((void*)&cb, &Callback<T(T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch3() {
+    Thing<T> thing;
+    Verifier<T>::verify3(static_func3<T>);
+    Verifier<T>::verify3(&thing, &Thing<T>::member_func3);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &Thing<T>::const_member_func3);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func3);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func3);
+    Verifier<T>::verify3(&thing, &bound_func3<T>);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &const_bound_func3<T>);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &volatile_bound_func3<T>);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &const_volatile_bound_func3<T>);
+    Verifier<T>::verify3(&thing, &void_func3<T>);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &const_void_func3<T>);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &volatile_void_func3<T>);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &const_volatile_void_func3<T>);
+    Verifier<T>::verify3(callback(static_func3<T>));
+
+    Callback<T(T, T, T)> cb(static_func3);
+    Verifier<T>::verify3(cb);
+    cb = static_func3;
+    Verifier<T>::verify3(cb);
+    cb.attach(&thing, &bound_func3<T>);
+    Verifier<T>::verify3(&cb, &Callback<T(T, T, T)>::call);
+    Verifier<T>::verify3((void*)&cb, &Callback<T(T, T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch4() {
+    Thing<T> thing;
+    Verifier<T>::verify4(static_func4<T>);
+    Verifier<T>::verify4(&thing, &Thing<T>::member_func4);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &Thing<T>::const_member_func4);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func4);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func4);
+    Verifier<T>::verify4(&thing, &bound_func4<T>);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &const_bound_func4<T>);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &volatile_bound_func4<T>);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &const_volatile_bound_func4<T>);
+    Verifier<T>::verify4(&thing, &void_func4<T>);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &const_void_func4<T>);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &volatile_void_func4<T>);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &const_volatile_void_func4<T>);
+    Verifier<T>::verify4(callback(static_func4<T>));
+
+    Callback<T(T, T, T, T)> cb(static_func4);
+    Verifier<T>::verify4(cb);
+    cb = static_func4;
+    Verifier<T>::verify4(cb);
+    cb.attach(&thing, &bound_func4<T>);
+    Verifier<T>::verify4(&cb, &Callback<T(T, T, T, T)>::call);
+    Verifier<T>::verify4((void*)&cb, &Callback<T(T, T, T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch5() {
+    Thing<T> thing;
+    Verifier<T>::verify5(static_func5<T>);
+    Verifier<T>::verify5(&thing, &Thing<T>::member_func5);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &Thing<T>::const_member_func5);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func5);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func5);
+    Verifier<T>::verify5(&thing, &bound_func5<T>);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &const_bound_func5<T>);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &volatile_bound_func5<T>);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &const_volatile_bound_func5<T>);
+    Verifier<T>::verify5(&thing, &void_func5<T>);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &const_void_func5<T>);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &volatile_void_func5<T>);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &const_volatile_void_func5<T>);
+    Verifier<T>::verify5(callback(static_func5<T>));
+
+    Callback<T(T, T, T, T, T)> cb(static_func5);
+    Verifier<T>::verify5(cb);
+    cb = static_func5;
+    Verifier<T>::verify5(cb);
+    cb.attach(&thing, &bound_func5<T>);
+    Verifier<T>::verify5(&cb, &Callback<T(T, T, T, T, T)>::call);
+    Verifier<T>::verify5((void*)&cb, &Callback<T(T, T, T, T, T)>::thunk);
+}
+
+
+// Test setup
+utest::v1::status_t test_setup(const size_t number_of_cases) {
+    GREENTEA_SETUP(10, "default_auto");
+    return verbose_test_setup_handler(number_of_cases);
+}
+
+Case cases[] = {
+    Case("Testing callbacks with 0 ints", test_dispatch0<int>),
+    Case("Testing callbacks with 1 ints", test_dispatch1<int>),
+    Case("Testing callbacks with 2 ints", test_dispatch2<int>),
+    Case("Testing callbacks with 3 ints", test_dispatch3<int>),
+    Case("Testing callbacks with 4 ints", test_dispatch4<int>),
+    Case("Testing callbacks with 5 ints", test_dispatch5<int>),
+};
+
+Specification specification(test_setup, cases);
+
+int main() {
+    return !Harness::run(specification);
+}

TESTS/mbed_functional/callback_big/main.cpp

@@ -0,0 +1,351 @@
+#include "mbed.h"
+#include "greentea-client/test_env.h"
+#include "unity.h"
+#include "utest.h"
+
+using namespace utest::v1;
+
+
+// static functions
+template <typename T>
+T static_func0() { return 0; }
+template <typename T>
+T static_func1(T a0) { return 0 | a0; }
+template <typename T>
+T static_func2(T a0, T a1) { return 0 | a0 | a1; }
+template <typename T>
+T static_func3(T a0, T a1, T a2) { return 0 | a0 | a1 | a2; }
+template <typename T>
+T static_func4(T a0, T a1, T a2, T a3) { return 0 | a0 | a1 | a2 | a3; }
+template <typename T>
+T static_func5(T a0, T a1, T a2, T a3, T a4) { return 0 | a0 | a1 | a2 | a3 | a4; }
+
+// class functions
+template <typename T>
+struct Thing {
+    T t;
+    Thing() : t(0x80) {}
+
+    T member_func0() { return t; }
+    T member_func1(T a0) { return t | a0; }
+    T member_func2(T a0, T a1) { return t | a0 | a1; }
+    T member_func3(T a0, T a1, T a2) { return t | a0 | a1 | a2; }
+    T member_func4(T a0, T a1, T a2, T a3) { return t | a0 | a1 | a2 | a3; }
+    T member_func5(T a0, T a1, T a2, T a3, T a4) { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_member_func0() const { return t; }
+    T const_member_func1(T a0) const { return t | a0; }
+    T const_member_func2(T a0, T a1) const { return t | a0 | a1; }
+    T const_member_func3(T a0, T a1, T a2) const { return t | a0 | a1 | a2; }
+    T const_member_func4(T a0, T a1, T a2, T a3) const { return t | a0 | a1 | a2 | a3; }
+    T const_member_func5(T a0, T a1, T a2, T a3, T a4) const { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T volatile_member_func0() volatile { return t; }
+    T volatile_member_func1(T a0) volatile { return t | a0; }
+    T volatile_member_func2(T a0, T a1) volatile { return t | a0 | a1; }
+    T volatile_member_func3(T a0, T a1, T a2) volatile { return t | a0 | a1 | a2; }
+    T volatile_member_func4(T a0, T a1, T a2, T a3) volatile { return t | a0 | a1 | a2 | a3; }
+    T volatile_member_func5(T a0, T a1, T a2, T a3, T a4) volatile { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_volatile_member_func0() const volatile { return t; }
+    T const_volatile_member_func1(T a0) const volatile { return t | a0; }
+    T const_volatile_member_func2(T a0, T a1) const volatile { return t | a0 | a1; }
+    T const_volatile_member_func3(T a0, T a1, T a2) const volatile { return t | a0 | a1 | a2; }
+    T const_volatile_member_func4(T a0, T a1, T a2, T a3) const volatile { return t | a0 | a1 | a2 | a3; }
+    T const_volatile_member_func5(T a0, T a1, T a2, T a3, T a4) const volatile { return t | a0 | a1 | a2 | a3 | a4; }
+};
+
+// bound functions
+template <typename T>
+T bound_func0(Thing<T> *t) { return t->t; }
+template <typename T>
+T bound_func1(Thing<T> *t, T a0) { return t->t | a0; }
+template <typename T>
+T bound_func2(Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T bound_func3(Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T bound_func4(Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T bound_func5(Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
+
+// const bound functions
+template <typename T>
+T const_func0(const Thing<T> *t) { return t->t; }
+template <typename T>
+T const_func1(const Thing<T> *t, T a0) { return t->t | a0; }
+template <typename T>
+T const_func2(const Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T const_func3(const Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_func4(const Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_func5(const Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
+
+// volatile bound functions
+template <typename T>
+T volatile_func0(volatile Thing<T> *t) { return t->t; }
+template <typename T>
+T volatile_func1(volatile Thing<T> *t, T a0) { return t->t | a0; }
+template <typename T>
+T volatile_func2(volatile Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T volatile_func3(volatile Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T volatile_func4(volatile Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T volatile_func5(volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
+
+// const volatile bound functions
+template <typename T>
+T const_volatile_func0(const volatile Thing<T> *t) { return t->t; }
+template <typename T>
+T const_volatile_func1(const volatile Thing<T> *t, T a0) { return t->t | a0; }
+template <typename T>
+T const_volatile_func2(const volatile Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T const_volatile_func3(const volatile Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_volatile_func4(const volatile Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_volatile_func5(const volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
+
+
+// function call and result verification
+template <typename T>
+struct Verifier {
+    static void verify0(Callback<T()> func) {
+        T result = func();
+        TEST_ASSERT_EQUAL(result, 0x00);
+    }
+
+    template <typename O, typename M>
+    static void verify0(O *obj, M method) {
+        Callback<T()> func(obj, method);
+        T result = func();
+        TEST_ASSERT_EQUAL(result, 0x80);
+    }
+
+    static void verify1(Callback<T(T)> func) {
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0));
+    }
+
+    template <typename O, typename M>
+    static void verify1(O *obj, M method) {
+        Callback<T(T)> func(obj, method);
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0));
+    }
+
+    static void verify2(Callback<T(T, T)> func) {
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1));
+    }
+
+    template <typename O, typename M>
+    static void verify2(O *obj, M method) {
+        Callback<T(T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1));
+    }
+
+    static void verify3(Callback<T(T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    template <typename O, typename M>
+    static void verify3(O *obj, M method) {
+        Callback<T(T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    static void verify4(Callback<T(T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    template <typename O, typename M>
+    static void verify4(O *obj, M method) {
+        Callback<T(T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    static void verify5(Callback<T(T, T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+
+    template <typename O, typename M>
+    static void verify5(O *obj, M method) {
+        Callback<T(T, T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+};
+
+
+// test dispatch
+template <typename T>
+void test_dispatch0() {
+    Thing<T> thing;
+    Verifier<T>::verify0(static_func0<T>);
+    Verifier<T>::verify0(&thing, &Thing<T>::member_func0);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &Thing<T>::const_member_func0);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func0);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func0);
+    Verifier<T>::verify0(&thing, &bound_func0<T>);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &const_func0<T>);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &volatile_func0<T>);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &const_volatile_func0<T>);
+    Verifier<T>::verify0(callback(static_func0<T>));
+
+    Callback<T()> cb(static_func0);
+    Verifier<T>::verify0(cb);
+    cb = static_func0;
+    Verifier<T>::verify0(cb);
+    cb.attach(&thing, &bound_func0<T>);
+    Verifier<T>::verify0(&cb, &Callback<T()>::call);
+    Verifier<T>::verify0((void*)&cb, &Callback<T()>::thunk);
+}
+
+template <typename T>
+void test_dispatch1() {
+    Thing<T> thing;
+    Verifier<T>::verify1(static_func1<T>);
+    Verifier<T>::verify1(&thing, &Thing<T>::member_func1);
+    Verifier<T>::verify1((const Thing<T>*)&thing, &Thing<T>::const_member_func1);
+    Verifier<T>::verify1((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func1);
+    Verifier<T>::verify1((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func1);
+    Verifier<T>::verify1(&thing, &bound_func1<T>);
+    Verifier<T>::verify1((const Thing<T>*)&thing, &const_func1<T>);
+    Verifier<T>::verify1((volatile Thing<T>*)&thing, &volatile_func1<T>);
+    Verifier<T>::verify1((const volatile Thing<T>*)&thing, &const_volatile_func1<T>);
+    Verifier<T>::verify1(callback(static_func1<T>));
+
+    Callback<T(T)> cb(static_func1);
+    Verifier<T>::verify1(cb);
+    cb = static_func1;
+    Verifier<T>::verify1(cb);
+    cb.attach(&thing, &bound_func1<T>);
+    Verifier<T>::verify1(&cb, &Callback<T(T)>::call);
+    Verifier<T>::verify1((void*)&cb, &Callback<T(T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch2() {
+    Thing<T> thing;
+    Verifier<T>::verify2(static_func2<T>);
+    Verifier<T>::verify2(&thing, &Thing<T>::member_func2);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &Thing<T>::const_member_func2);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func2);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func2);
+    Verifier<T>::verify2(&thing, &bound_func2<T>);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &const_func2<T>);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &volatile_func2<T>);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &const_volatile_func2<T>);
+    Verifier<T>::verify2(callback(static_func2<T>));
+
+    Callback<T(T, T)> cb(static_func2);
+    Verifier<T>::verify2(cb);
+    cb = static_func2;
+    Verifier<T>::verify2(cb);
+    cb.attach(&thing, &bound_func2<T>);
+    Verifier<T>::verify2(&cb, &Callback<T(T, T)>::call);
+    Verifier<T>::verify2((void*)&cb, &Callback<T(T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch3() {
+    Thing<T> thing;
+    Verifier<T>::verify3(static_func3<T>);
+    Verifier<T>::verify3(&thing, &Thing<T>::member_func3);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &Thing<T>::const_member_func3);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func3);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func3);
+    Verifier<T>::verify3(&thing, &bound_func3<T>);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &const_func3<T>);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &volatile_func3<T>);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &const_volatile_func3<T>);
+    Verifier<T>::verify3(callback(static_func3<T>));
+
+    Callback<T(T, T, T)> cb(static_func3);
+    Verifier<T>::verify3(cb);
+    cb = static_func3;
+    Verifier<T>::verify3(cb);
+    cb.attach(&thing, &bound_func3<T>);
+    Verifier<T>::verify3(&cb, &Callback<T(T, T, T)>::call);
+    Verifier<T>::verify3((void*)&cb, &Callback<T(T, T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch4() {
+    Thing<T> thing;
+    Verifier<T>::verify4(static_func4<T>);
+    Verifier<T>::verify4(&thing, &Thing<T>::member_func4);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &Thing<T>::const_member_func4);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func4);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func4);
+    Verifier<T>::verify4(&thing, &bound_func4<T>);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &const_func4<T>);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &volatile_func4<T>);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &const_volatile_func4<T>);
+    Verifier<T>::verify4(callback(static_func4<T>));
+
+    Callback<T(T, T, T, T)> cb(static_func4);
+    Verifier<T>::verify4(cb);
+    cb = static_func4;
+    Verifier<T>::verify4(cb);
+    cb.attach(&thing, &bound_func4<T>);
+    Verifier<T>::verify4(&cb, &Callback<T(T, T, T, T)>::call);
+    Verifier<T>::verify4((void*)&cb, &Callback<T(T, T, T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch5() {
+    Thing<T> thing;
+    Verifier<T>::verify5(static_func5<T>);
+    Verifier<T>::verify5(&thing, &Thing<T>::member_func5);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &Thing<T>::const_member_func5);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func5);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func5);
+    Verifier<T>::verify5(&thing, &bound_func5<T>);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &const_func5<T>);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &volatile_func5<T>);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &const_volatile_func5<T>);
+    Verifier<T>::verify5(callback(static_func5<T>));
+
+    Callback<T(T, T, T, T, T)> cb(static_func5);
+    Verifier<T>::verify5(cb);
+    cb = static_func5;
+    Verifier<T>::verify5(cb);
+    cb.attach(&thing, &bound_func5<T>);
+    Verifier<T>::verify5(&cb, &Callback<T(T, T, T, T, T)>::call);
+    Verifier<T>::verify5((void*)&cb, &Callback<T(T, T, T, T, T)>::thunk);
+}
+
+
+// Test setup
+utest::v1::status_t test_setup(const size_t number_of_cases) {
+    GREENTEA_SETUP(10, "default_auto");
+    return verbose_test_setup_handler(number_of_cases);
+}
+
+Case cases[] = {
+    Case("Testing callbacks with 0 uint64s", test_dispatch0<uint64_t>),
+    Case("Testing callbacks with 1 uint64s", test_dispatch1<uint64_t>),
+    Case("Testing callbacks with 2 uint64s", test_dispatch2<uint64_t>),
+    Case("Testing callbacks with 3 uint64s", test_dispatch3<uint64_t>),
+    Case("Testing callbacks with 4 uint64s", test_dispatch4<uint64_t>),
+    Case("Testing callbacks with 5 uint64s", test_dispatch5<uint64_t>),
+};
+
+Specification specification(test_setup, cases);
+
+int main() {
+    return !Harness::run(specification);
+}

TESTS/mbed_functional/callback_small/main.cpp

@@ -8,17 +8,17 @@ using namespace utest::v1;
 
 // static functions
 template <typename T>
-T static_func5(T a0, T a1, T a2, T a3, T a4) { return a0 | a1 | a2 | a3 | a4; }
-template <typename T>
-T static_func4(T a0, T a1, T a2, T a3) { return a0 | a1 | a2 | a3; }
-template <typename T>
-T static_func3(T a0, T a1, T a2) { return a0 | a1 | a2; }
-template <typename T>
-T static_func2(T a0, T a1) { return a0 | a1; }
-template <typename T>
-T static_func1(T a0) { return a0; }
-template <typename T>
 T static_func0() { return 0; }
+template <typename T>
+T static_func1(T a0) { return 0 | a0; }
+template <typename T>
+T static_func2(T a0, T a1) { return 0 | a0 | a1; }
+template <typename T>
+T static_func3(T a0, T a1, T a2) { return 0 | a0 | a1 | a2; }
+template <typename T>
+T static_func4(T a0, T a1, T a2, T a3) { return 0 | a0 | a1 | a2 | a3; }
+template <typename T>
+T static_func5(T a0, T a1, T a2, T a3, T a4) { return 0 | a0 | a1 | a2 | a3 | a4; }
 
 // class functions
 template <typename T>
@@ -26,134 +26,95 @@ struct Thing {
     T t;
     Thing() : t(0x80) {}
 
-    T member_func5(T a0, T a1, T a2, T a3, T a4) { return t | a0 | a1 | a2 | a3 | a4; }
-    T member_func4(T a0, T a1, T a2, T a3) { return t | a0 | a1 | a2 | a3; }
-    T member_func3(T a0, T a1, T a2) { return t | a0 | a1 | a2; }
-    T member_func2(T a0, T a1) { return t | a0 | a1; }
-    T member_func1(T a0) { return t | a0; }
     T member_func0() { return t; }
+    T member_func1(T a0) { return t | a0; }
+    T member_func2(T a0, T a1) { return t | a0 | a1; }
+    T member_func3(T a0, T a1, T a2) { return t | a0 | a1 | a2; }
+    T member_func4(T a0, T a1, T a2, T a3) { return t | a0 | a1 | a2 | a3; }
+    T member_func5(T a0, T a1, T a2, T a3, T a4) { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_member_func0() const { return t; }
+    T const_member_func1(T a0) const { return t | a0; }
+    T const_member_func2(T a0, T a1) const { return t | a0 | a1; }
+    T const_member_func3(T a0, T a1, T a2) const { return t | a0 | a1 | a2; }
+    T const_member_func4(T a0, T a1, T a2, T a3) const { return t | a0 | a1 | a2 | a3; }
+    T const_member_func5(T a0, T a1, T a2, T a3, T a4) const { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T volatile_member_func0() volatile { return t; }
+    T volatile_member_func1(T a0) volatile { return t | a0; }
+    T volatile_member_func2(T a0, T a1) volatile { return t | a0 | a1; }
+    T volatile_member_func3(T a0, T a1, T a2) volatile { return t | a0 | a1 | a2; }
+    T volatile_member_func4(T a0, T a1, T a2, T a3) volatile { return t | a0 | a1 | a2 | a3; }
+    T volatile_member_func5(T a0, T a1, T a2, T a3, T a4) volatile { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_volatile_member_func0() const volatile { return t; }
+    T const_volatile_member_func1(T a0) const volatile { return t | a0; }
+    T const_volatile_member_func2(T a0, T a1) const volatile { return t | a0 | a1; }
+    T const_volatile_member_func3(T a0, T a1, T a2) const volatile { return t | a0 | a1 | a2; }
+    T const_volatile_member_func4(T a0, T a1, T a2, T a3) const volatile { return t | a0 | a1 | a2 | a3; }
+    T const_volatile_member_func5(T a0, T a1, T a2, T a3, T a4) const volatile { return t | a0 | a1 | a2 | a3 | a4; }
 };
 
 // bound functions
 template <typename T>
-T bound_func5(Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
-template <typename T>
-T bound_func4(Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
-template <typename T>
-T bound_func3(Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
-template <typename T>
-T bound_func2(Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+T bound_func0(Thing<T> *t) { return t->t; }
 template <typename T>
 T bound_func1(Thing<T> *t, T a0) { return t->t | a0; }
 template <typename T>
-T bound_func0(Thing<T> *t) { return t->t; }
+T bound_func2(Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T bound_func3(Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T bound_func4(Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T bound_func5(Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
 
 // const bound functions
 template <typename T>
-T const_func5(const Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
-template <typename T>
-T const_func4(const Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
-template <typename T>
-T const_func3(const Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
-template <typename T>
-T const_func2(const Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+T const_func0(const Thing<T> *t) { return t->t; }
 template <typename T>
 T const_func1(const Thing<T> *t, T a0) { return t->t | a0; }
 template <typename T>
-T const_func0(const Thing<T> *t) { return t->t; }
+T const_func2(const Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T const_func3(const Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_func4(const Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_func5(const Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
 
 // volatile bound functions
 template <typename T>
-T volatile_func5(volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
-template <typename T>
-T volatile_func4(volatile Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
-template <typename T>
-T volatile_func3(volatile Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
-template <typename T>
-T volatile_func2(volatile Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+T volatile_func0(volatile Thing<T> *t) { return t->t; }
 template <typename T>
 T volatile_func1(volatile Thing<T> *t, T a0) { return t->t | a0; }
 template <typename T>
-T volatile_func0(volatile Thing<T> *t) { return t->t; }
+T volatile_func2(volatile Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T volatile_func3(volatile Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T volatile_func4(volatile Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T volatile_func5(volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
 
-// const volatil bound functions
+// const volatile bound functions
 template <typename T>
-T const_volatile_func5(const volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
-template <typename T>
-T const_volatile_func4(const volatile Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
-template <typename T>
-T const_volatile_func3(const volatile Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
-template <typename T>
-T const_volatile_func2(const volatile Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+T const_volatile_func0(const volatile Thing<T> *t) { return t->t; }
 template <typename T>
 T const_volatile_func1(const volatile Thing<T> *t, T a0) { return t->t | a0; }
 template <typename T>
-T const_volatile_func0(const volatile Thing<T> *t) { return t->t; }
+T const_volatile_func2(const volatile Thing<T> *t, T a0, T a1) { return t->t | a0 | a1; }
+template <typename T>
+T const_volatile_func3(const volatile Thing<T> *t, T a0, T a1, T a2) { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_volatile_func4(const volatile Thing<T> *t, T a0, T a1, T a2, T a3) { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_volatile_func5(const volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4) { return t->t | a0 | a1 | a2 | a3 | a4; }
 
 
 // function call and result verification
 template <typename T>
 struct Verifier {
-    static void verify5(Callback<T(T,T,T,T,T)> func) {
-        T result = func(0x01, 0x02, 0x04, 0x08, 0x10);
-        TEST_ASSERT_EQUAL(result, 0x1f);
-    }
-
-    template <typename O, typename M>
-    static void verify5(O *obj, M method) {
-        Callback<T(T,T,T,T,T)> func(obj, method);
-        T result = func(0x01, 0x02, 0x04, 0x08, 0x10);
-        TEST_ASSERT_EQUAL(result, 0x9f);
-    }
-
-    static void verify4(Callback<T(T,T,T,T)> func) {
-        T result = func(0x01, 0x02, 0x04, 0x08);
-        TEST_ASSERT_EQUAL(result, 0x0f);
-    }
-
-    template <typename O, typename M>
-    static void verify4(O *obj, M method) {
-        Callback<T(T,T,T,T)> func(obj, method);
-        T result = func(0x01, 0x02, 0x04, 0x08);
-        TEST_ASSERT_EQUAL(result, 0x8f);
-    }
-
-    static void verify3(Callback<T(T,T,T)> func) {
-        T result = func(0x01, 0x02, 0x04);
-        TEST_ASSERT_EQUAL(result, 0x07);
-    }
-
-    template <typename O, typename M>
-    static void verify3(O *obj, M method) {
-        Callback<T(T,T,T)> func(obj, method);
-        T result = func(0x01, 0x02, 0x04);
-        TEST_ASSERT_EQUAL(result, 0x87);
-    }
-
-    static void verify2(Callback<T(T,T)> func) {
-        T result = func(0x01, 0x02);
-        TEST_ASSERT_EQUAL(result, 0x03);
-    }
-
-    template <typename O, typename M>
-    static void verify2(O *obj, M method) {
-        Callback<T(T,T)> func(obj, method);
-        T result = func(0x01, 0x02);
-        TEST_ASSERT_EQUAL(result, 0x83);
-    }
-
-    static void verify1(Callback<T(T)> func) {
-        T result = func(0x01);
-        TEST_ASSERT_EQUAL(result, 0x01);
-    }
-
-    template <typename O, typename M>
-    static void verify1(O *obj, M method) {
-        Callback<T(T)> func(obj, method);
-        T result = func(0x01);
-        TEST_ASSERT_EQUAL(result, 0x81);
-    }
-
     static void verify0(Callback<T()> func) {
         T result = func();
         TEST_ASSERT_EQUAL(result, 0x00);
@@ -165,76 +126,91 @@ struct Verifier {
         T result = func();
         TEST_ASSERT_EQUAL(result, 0x80);
     }
+
+    static void verify1(Callback<T(T)> func) {
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0));
+    }
+
+    template <typename O, typename M>
+    static void verify1(O *obj, M method) {
+        Callback<T(T)> func(obj, method);
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0));
+    }
+
+    static void verify2(Callback<T(T, T)> func) {
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1));
+    }
+
+    template <typename O, typename M>
+    static void verify2(O *obj, M method) {
+        Callback<T(T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1));
+    }
+
+    static void verify3(Callback<T(T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    template <typename O, typename M>
+    static void verify3(O *obj, M method) {
+        Callback<T(T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    static void verify4(Callback<T(T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    template <typename O, typename M>
+    static void verify4(O *obj, M method) {
+        Callback<T(T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    static void verify5(Callback<T(T, T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+
+    template <typename O, typename M>
+    static void verify5(O *obj, M method) {
+        Callback<T(T, T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
 };
 
 
 // test dispatch
 template <typename T>
-void test_dispatch5() {
+void test_dispatch0() {
     Thing<T> thing;
-    Verifier<T>::verify5(static_func5<T>);
-    Verifier<T>::verify5(&thing, &Thing<T>::member_func5);
-    Verifier<T>::verify5(&thing, &bound_func5<T>);
-    Verifier<T>::verify5((const Thing<T>*)&thing, &const_func5<T>);
-    Verifier<T>::verify5((volatile Thing<T>*)&thing, &volatile_func5<T>);
-    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &const_volatile_func5<T>);
+    Verifier<T>::verify0(static_func0<T>);
+    Verifier<T>::verify0(&thing, &Thing<T>::member_func0);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &Thing<T>::const_member_func0);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func0);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func0);
+    Verifier<T>::verify0(&thing, &bound_func0<T>);
+    Verifier<T>::verify0((const Thing<T>*)&thing, &const_func0<T>);
+    Verifier<T>::verify0((volatile Thing<T>*)&thing, &volatile_func0<T>);
+    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &const_volatile_func0<T>);
+    Verifier<T>::verify0(callback(static_func0<T>));
 
-    Callback<T(T,T,T,T,T)> callback(static_func5);
-    Verifier<T>::verify5(callback);
-    callback.attach(&thing, &bound_func5<T>);
-    Verifier<T>::verify5(&callback, &Callback<T(T,T,T,T,T)>::call);
-    Verifier<T>::verify5((void*)&callback, &Callback<T(T,T,T,T,T)>::thunk);
-}
-
-template <typename T>
-void test_dispatch4() {
-    Thing<T> thing;
-    Verifier<T>::verify4(static_func4<T>);
-    Verifier<T>::verify4(&thing, &Thing<T>::member_func4);
-    Verifier<T>::verify4(&thing, &bound_func4<T>);
-    Verifier<T>::verify4((const Thing<T>*)&thing, &const_func4<T>);
-    Verifier<T>::verify4((volatile Thing<T>*)&thing, &volatile_func4<T>);
-    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &const_volatile_func4<T>);
-
-    Callback<T(T,T,T,T)> callback(static_func4);
-    Verifier<T>::verify4(callback);
-    callback.attach(&thing, &bound_func4<T>);
-    Verifier<T>::verify4(&callback, &Callback<T(T,T,T,T)>::call);
-    Verifier<T>::verify4((void*)&callback, &Callback<T(T,T,T,T)>::thunk);
-}
-
-template <typename T>
-void test_dispatch3() {
-    Thing<T> thing;
-    Verifier<T>::verify3(static_func3<T>);
-    Verifier<T>::verify3(&thing, &Thing<T>::member_func3);
-    Verifier<T>::verify3(&thing, &bound_func3<T>);
-    Verifier<T>::verify3((const Thing<T>*)&thing, &const_func3<T>);
-    Verifier<T>::verify3((volatile Thing<T>*)&thing, &volatile_func3<T>);
-    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &const_volatile_func3<T>);
-
-    Callback<T(T,T,T)> callback(static_func3);
-    Verifier<T>::verify3(callback);
-    callback.attach(&thing, &bound_func3<T>);
-    Verifier<T>::verify3(&callback, &Callback<T(T,T,T)>::call);
-    Verifier<T>::verify3((void*)&callback, &Callback<T(T,T,T)>::thunk);
-}
-
-template <typename T>
-void test_dispatch2() {
-    Thing<T> thing;
-    Verifier<T>::verify2(static_func2<T>);
-    Verifier<T>::verify2(&thing, &Thing<T>::member_func2);
-    Verifier<T>::verify2(&thing, &bound_func2<T>);
-    Verifier<T>::verify2((const Thing<T>*)&thing, &const_func2<T>);
-    Verifier<T>::verify2((volatile Thing<T>*)&thing, &volatile_func2<T>);
-    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &const_volatile_func2<T>);
-
-    Callback<T(T,T)> callback(static_func2);
-    Verifier<T>::verify2(callback);
-    callback.attach(&thing, &bound_func2<T>);
-    Verifier<T>::verify2(&callback, &Callback<T(T,T)>::call);
-    Verifier<T>::verify2((void*)&callback, &Callback<T(T,T)>::thunk);
+    Callback<T()> cb(static_func0);
+    Verifier<T>::verify0(cb);
+    cb = static_func0;
+    Verifier<T>::verify0(cb);
+    cb.attach(&thing, &bound_func0<T>);
+    Verifier<T>::verify0(&cb, &Callback<T()>::call);
+    Verifier<T>::verify0((void*)&cb, &Callback<T()>::thunk);
 }
 
 template <typename T>
@@ -242,49 +218,114 @@ void test_dispatch1() {
     Thing<T> thing;
     Verifier<T>::verify1(static_func1<T>);
     Verifier<T>::verify1(&thing, &Thing<T>::member_func1);
+    Verifier<T>::verify1((const Thing<T>*)&thing, &Thing<T>::const_member_func1);
+    Verifier<T>::verify1((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func1);
+    Verifier<T>::verify1((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func1);
     Verifier<T>::verify1(&thing, &bound_func1<T>);
     Verifier<T>::verify1((const Thing<T>*)&thing, &const_func1<T>);
     Verifier<T>::verify1((volatile Thing<T>*)&thing, &volatile_func1<T>);
     Verifier<T>::verify1((const volatile Thing<T>*)&thing, &const_volatile_func1<T>);
+    Verifier<T>::verify1(callback(static_func1<T>));
 
-    Callback<T(T)> callback(static_func1);
-    Verifier<T>::verify1(callback);
-    callback.attach(&thing, &bound_func1<T>);
-    Verifier<T>::verify1(&callback, &Callback<T(T)>::call);
-    Verifier<T>::verify1((void*)&callback, &Callback<T(T)>::thunk);
+    Callback<T(T)> cb(static_func1);
+    Verifier<T>::verify1(cb);
+    cb = static_func1;
+    Verifier<T>::verify1(cb);
+    cb.attach(&thing, &bound_func1<T>);
+    Verifier<T>::verify1(&cb, &Callback<T(T)>::call);
+    Verifier<T>::verify1((void*)&cb, &Callback<T(T)>::thunk);
 }
 
 template <typename T>
-void test_dispatch0() {
+void test_dispatch2() {
     Thing<T> thing;
-    Verifier<T>::verify0(static_func0<T>);
-    Verifier<T>::verify0(&thing, &Thing<T>::member_func0);
-    Verifier<T>::verify0(&thing, &bound_func0<T>);
-    Verifier<T>::verify0((const Thing<T>*)&thing, &const_func0<T>);
-    Verifier<T>::verify0((volatile Thing<T>*)&thing, &volatile_func0<T>);
-    Verifier<T>::verify0((const volatile Thing<T>*)&thing, &const_volatile_func0<T>);
+    Verifier<T>::verify2(static_func2<T>);
+    Verifier<T>::verify2(&thing, &Thing<T>::member_func2);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &Thing<T>::const_member_func2);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func2);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func2);
+    Verifier<T>::verify2(&thing, &bound_func2<T>);
+    Verifier<T>::verify2((const Thing<T>*)&thing, &const_func2<T>);
+    Verifier<T>::verify2((volatile Thing<T>*)&thing, &volatile_func2<T>);
+    Verifier<T>::verify2((const volatile Thing<T>*)&thing, &const_volatile_func2<T>);
+    Verifier<T>::verify2(callback(static_func2<T>));
 
-    Callback<T()> callback(static_func0);
-    Verifier<T>::verify0(callback);
-    callback.attach(&thing, &bound_func0<T>);
-    Verifier<T>::verify0(&callback, &Callback<T()>::call);
-    Verifier<T>::verify0((void*)&callback, &Callback<T()>::thunk);
+    Callback<T(T, T)> cb(static_func2);
+    Verifier<T>::verify2(cb);
+    cb = static_func2;
+    Verifier<T>::verify2(cb);
+    cb.attach(&thing, &bound_func2<T>);
+    Verifier<T>::verify2(&cb, &Callback<T(T, T)>::call);
+    Verifier<T>::verify2((void*)&cb, &Callback<T(T, T)>::thunk);
 }
 
 template <typename T>
-void test_fparg1() {
+void test_dispatch3() {
     Thing<T> thing;
-    FunctionPointerArg1<T,T> fp(static_func1<T>);
-    Verifier<T>::verify1(fp);
-    Verifier<T>::verify1(fp.get_function());
+    Verifier<T>::verify3(static_func3<T>);
+    Verifier<T>::verify3(&thing, &Thing<T>::member_func3);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &Thing<T>::const_member_func3);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func3);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func3);
+    Verifier<T>::verify3(&thing, &bound_func3<T>);
+    Verifier<T>::verify3((const Thing<T>*)&thing, &const_func3<T>);
+    Verifier<T>::verify3((volatile Thing<T>*)&thing, &volatile_func3<T>);
+    Verifier<T>::verify3((const volatile Thing<T>*)&thing, &const_volatile_func3<T>);
+    Verifier<T>::verify3(callback(static_func3<T>));
+
+    Callback<T(T, T, T)> cb(static_func3);
+    Verifier<T>::verify3(cb);
+    cb = static_func3;
+    Verifier<T>::verify3(cb);
+    cb.attach(&thing, &bound_func3<T>);
+    Verifier<T>::verify3(&cb, &Callback<T(T, T, T)>::call);
+    Verifier<T>::verify3((void*)&cb, &Callback<T(T, T, T)>::thunk);
 }
 
 template <typename T>
-void test_fparg0() {
+void test_dispatch4() {
     Thing<T> thing;
-    FunctionPointerArg1<T,void> fp(static_func0<T>);
-    Verifier<T>::verify0(fp);
-    Verifier<T>::verify0(fp.get_function());
+    Verifier<T>::verify4(static_func4<T>);
+    Verifier<T>::verify4(&thing, &Thing<T>::member_func4);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &Thing<T>::const_member_func4);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func4);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func4);
+    Verifier<T>::verify4(&thing, &bound_func4<T>);
+    Verifier<T>::verify4((const Thing<T>*)&thing, &const_func4<T>);
+    Verifier<T>::verify4((volatile Thing<T>*)&thing, &volatile_func4<T>);
+    Verifier<T>::verify4((const volatile Thing<T>*)&thing, &const_volatile_func4<T>);
+    Verifier<T>::verify4(callback(static_func4<T>));
+
+    Callback<T(T, T, T, T)> cb(static_func4);
+    Verifier<T>::verify4(cb);
+    cb = static_func4;
+    Verifier<T>::verify4(cb);
+    cb.attach(&thing, &bound_func4<T>);
+    Verifier<T>::verify4(&cb, &Callback<T(T, T, T, T)>::call);
+    Verifier<T>::verify4((void*)&cb, &Callback<T(T, T, T, T)>::thunk);
+}
+
+template <typename T>
+void test_dispatch5() {
+    Thing<T> thing;
+    Verifier<T>::verify5(static_func5<T>);
+    Verifier<T>::verify5(&thing, &Thing<T>::member_func5);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &Thing<T>::const_member_func5);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &Thing<T>::volatile_member_func5);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &Thing<T>::const_volatile_member_func5);
+    Verifier<T>::verify5(&thing, &bound_func5<T>);
+    Verifier<T>::verify5((const Thing<T>*)&thing, &const_func5<T>);
+    Verifier<T>::verify5((volatile Thing<T>*)&thing, &volatile_func5<T>);
+    Verifier<T>::verify5((const volatile Thing<T>*)&thing, &const_volatile_func5<T>);
+    Verifier<T>::verify5(callback(static_func5<T>));
+
+    Callback<T(T, T, T, T, T)> cb(static_func5);
+    Verifier<T>::verify5(cb);
+    cb = static_func5;
+    Verifier<T>::verify5(cb);
+    cb.attach(&thing, &bound_func5<T>);
+    Verifier<T>::verify5(&cb, &Callback<T(T, T, T, T, T)>::call);
+    Verifier<T>::verify5((void*)&cb, &Callback<T(T, T, T, T, T)>::thunk);
 }
 
 
@@ -295,29 +336,12 @@ utest::v1::status_t test_setup(const size_t number_of_cases) {
 }
 
 Case cases[] = {
-    Case("Testing callbacks with 5 ints", test_dispatch5<int>),
-    Case("Testing callbacks with 4 ints", test_dispatch4<int>),
-    Case("Testing callbacks with 3 ints", test_dispatch3<int>),
-    Case("Testing callbacks with 2 ints", test_dispatch2<int>),
-    Case("Testing callbacks with 1 ints", test_dispatch1<int>),
-    Case("Testing callbacks with 0 ints", test_dispatch0<int>),
-
-    Case("Testing callbacks with 5 uchars", test_dispatch5<unsigned char>),
-    Case("Testing callbacks with 4 uchars", test_dispatch4<unsigned char>),
-    Case("Testing callbacks with 3 uchars", test_dispatch3<unsigned char>),
-    Case("Testing callbacks with 2 uchars", test_dispatch2<unsigned char>),
-    Case("Testing callbacks with 1 uchars", test_dispatch1<unsigned char>),
     Case("Testing callbacks with 0 uchars", test_dispatch0<unsigned char>),
-
-    Case("Testing callbacks with 5 uint64s", test_dispatch5<uint64_t>),
-    Case("Testing callbacks with 4 uint64s", test_dispatch4<uint64_t>),
-    Case("Testing callbacks with 3 uint64s", test_dispatch3<uint64_t>),
-    Case("Testing callbacks with 2 uint64s", test_dispatch2<uint64_t>),
-    Case("Testing callbacks with 1 uint64s", test_dispatch1<uint64_t>),
-    Case("Testing callbacks with 0 uint64s", test_dispatch0<uint64_t>),
-
-    Case("Testing FunctionPointerArg1 compatibility", test_fparg1<int>),
-    Case("Testing FunctionPointer compatibility", test_fparg0<int>),
+    Case("Testing callbacks with 1 uchars", test_dispatch1<unsigned char>),
+    Case("Testing callbacks with 2 uchars", test_dispatch2<unsigned char>),
+    Case("Testing callbacks with 3 uchars", test_dispatch3<unsigned char>),
+    Case("Testing callbacks with 4 uchars", test_dispatch4<unsigned char>),
+    Case("Testing callbacks with 5 uchars", test_dispatch5<unsigned char>),
 };
 
 Specification specification(test_setup, cases);

TESTS/mbed_functional/functionpointer/main.cpp

@@ -0,0 +1,347 @@
+#include "mbed.h"
+#include "greentea-client/test_env.h"
+#include "unity.h"
+#include "utest.h"
+
+using namespace utest::v1;
+
+
+// static functions
+template <typename T>
+T static_func0()
+    { return 0; }
+template <typename T>
+T static_func1(T a0)
+    { return 0 | a0; }
+template <typename T>
+T static_func2(T a0, T a1)
+    { return 0 | a0 | a1; }
+template <typename T>
+T static_func3(T a0, T a1, T a2)
+    { return 0 | a0 | a1 | a2; }
+template <typename T>
+T static_func4(T a0, T a1, T a2, T a3)
+    { return 0 | a0 | a1 | a2 | a3; }
+template <typename T>
+T static_func5(T a0, T a1, T a2, T a3, T a4)
+    { return 0 | a0 | a1 | a2 | a3 | a4; }
+
+// class functions
+template <typename T>
+struct Thing {
+    T t;
+    Thing() : t(0x80) {}
+
+    T member_func0()
+        { return t; }
+    T member_func1(T a0)
+        { return t | a0; }
+    T member_func2(T a0, T a1)
+        { return t | a0 | a1; }
+    T member_func3(T a0, T a1, T a2)
+        { return t | a0 | a1 | a2; }
+    T member_func4(T a0, T a1, T a2, T a3)
+        { return t | a0 | a1 | a2 | a3; }
+    T member_func5(T a0, T a1, T a2, T a3, T a4)
+        { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_member_func0() const
+        { return t; }
+    T const_member_func1(T a0) const
+        { return t | a0; }
+    T const_member_func2(T a0, T a1) const
+        { return t | a0 | a1; }
+    T const_member_func3(T a0, T a1, T a2) const
+        { return t | a0 | a1 | a2; }
+    T const_member_func4(T a0, T a1, T a2, T a3) const
+        { return t | a0 | a1 | a2 | a3; }
+    T const_member_func5(T a0, T a1, T a2, T a3, T a4) const
+        { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T volatile_member_func0() volatile
+        { return t; }
+    T volatile_member_func1(T a0) volatile
+        { return t | a0; }
+    T volatile_member_func2(T a0, T a1) volatile
+        { return t | a0 | a1; }
+    T volatile_member_func3(T a0, T a1, T a2) volatile
+        { return t | a0 | a1 | a2; }
+    T volatile_member_func4(T a0, T a1, T a2, T a3) volatile
+        { return t | a0 | a1 | a2 | a3; }
+    T volatile_member_func5(T a0, T a1, T a2, T a3, T a4) volatile
+        { return t | a0 | a1 | a2 | a3 | a4; }
+
+    T const_volatile_member_func0() const volatile
+        { return t; }
+    T const_volatile_member_func1(T a0) const volatile
+        { return t | a0; }
+    T const_volatile_member_func2(T a0, T a1) const volatile
+        { return t | a0 | a1; }
+    T const_volatile_member_func3(T a0, T a1, T a2) const volatile
+        { return t | a0 | a1 | a2; }
+    T const_volatile_member_func4(T a0, T a1, T a2, T a3) const volatile
+        { return t | a0 | a1 | a2 | a3; }
+    T const_volatile_member_func5(T a0, T a1, T a2, T a3, T a4) const volatile
+        { return t | a0 | a1 | a2 | a3 | a4; }
+};
+
+// bound functions
+template <typename T>
+T bound_func0(Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T bound_func1(Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T bound_func2(Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T bound_func3(Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T bound_func4(Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T bound_func5(Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_bound_func0(const Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T const_bound_func1(const Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T const_bound_func2(const Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T const_bound_func3(const Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_bound_func4(const Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_bound_func5(const Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T volatile_bound_func0(volatile Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T volatile_bound_func1(volatile Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T volatile_bound_func2(volatile Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T volatile_bound_func3(volatile Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T volatile_bound_func4(volatile Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T volatile_bound_func5(volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_volatile_bound_func0(const volatile Thing<T> *t)
+    { return t->t; }
+template <typename T>
+T const_volatile_bound_func1(const volatile Thing<T> *t, T a0)
+    { return t->t | a0; }
+template <typename T>
+T const_volatile_bound_func2(const volatile Thing<T> *t, T a0, T a1)
+    { return t->t | a0 | a1; }
+template <typename T>
+T const_volatile_bound_func3(const volatile Thing<T> *t, T a0, T a1, T a2)
+    { return t->t | a0 | a1 | a2; }
+template <typename T>
+T const_volatile_bound_func4(const volatile Thing<T> *t, T a0, T a1, T a2, T a3)
+    { return t->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_volatile_bound_func5(const volatile Thing<T> *t, T a0, T a1, T a2, T a3, T a4)
+    { return t->t | a0 | a1 | a2 | a3 | a4; }
+
+// void functions
+template <typename T>
+T void_func0(void *t)
+    { return static_cast<Thing<T>*>(t)->t; }
+template <typename T>
+T void_func1(void *t, T a0)
+    { return static_cast<Thing<T>*>(t)->t | a0; }
+template <typename T>
+T void_func2(void *t, T a0, T a1)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T void_func3(void *t, T a0, T a1, T a2)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T void_func4(void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T void_func5(void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_void_func0(const void *t)
+    { return static_cast<const Thing<T>*>(t)->t; }
+template <typename T>
+T const_void_func1(const void *t, T a0)
+    { return static_cast<const Thing<T>*>(t)->t | a0; }
+template <typename T>
+T const_void_func2(const void *t, T a0, T a1)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T const_void_func3(const void *t, T a0, T a1, T a2)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T const_void_func4(const void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_void_func5(const void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<const Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T volatile_void_func0(volatile void *t)
+    { return static_cast<volatile Thing<T>*>(t)->t; }
+template <typename T>
+T volatile_void_func1(volatile void *t, T a0)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0; }
+template <typename T>
+T volatile_void_func2(volatile void *t, T a0, T a1)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T volatile_void_func3(volatile void *t, T a0, T a1, T a2)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T volatile_void_func4(volatile void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T volatile_void_func5(volatile void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+template <typename T>
+T const_volatile_void_func0(const volatile void *t)
+    { return static_cast<const volatile Thing<T>*>(t)->t; }
+template <typename T>
+T const_volatile_void_func1(const volatile void *t, T a0)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0; }
+template <typename T>
+T const_volatile_void_func2(const volatile void *t, T a0, T a1)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1; }
+template <typename T>
+T const_volatile_void_func3(const volatile void *t, T a0, T a1, T a2)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1 | a2; }
+template <typename T>
+T const_volatile_void_func4(const volatile void *t, T a0, T a1, T a2, T a3)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3; }
+template <typename T>
+T const_volatile_void_func5(const volatile void *t, T a0, T a1, T a2, T a3, T a4)
+    { return static_cast<const volatile Thing<T>*>(t)->t | a0 | a1 | a2 | a3 | a4; }
+
+
+// function call and result verification
+template <typename T>
+struct Verifier {
+    static void verify0(Callback<T()> func) {
+        T result = func();
+        TEST_ASSERT_EQUAL(result, 0x00);
+    }
+
+    template <typename O, typename M>
+    static void verify0(O *obj, M method) {
+        Callback<T()> func(obj, method);
+        T result = func();
+        TEST_ASSERT_EQUAL(result, 0x80);
+    }
+
+    static void verify1(Callback<T(T)> func) {
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0));
+    }
+
+    template <typename O, typename M>
+    static void verify1(O *obj, M method) {
+        Callback<T(T)> func(obj, method);
+        T result = func((1 << 0));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0));
+    }
+
+    static void verify2(Callback<T(T, T)> func) {
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1));
+    }
+
+    template <typename O, typename M>
+    static void verify2(O *obj, M method) {
+        Callback<T(T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1));
+    }
+
+    static void verify3(Callback<T(T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    template <typename O, typename M>
+    static void verify3(O *obj, M method) {
+        Callback<T(T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2));
+    }
+
+    static void verify4(Callback<T(T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    template <typename O, typename M>
+    static void verify4(O *obj, M method) {
+        Callback<T(T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3));
+    }
+
+    static void verify5(Callback<T(T, T, T, T, T)> func) {
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x00 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+
+    template <typename O, typename M>
+    static void verify5(O *obj, M method) {
+        Callback<T(T, T, T, T, T)> func(obj, method);
+        T result = func((1 << 0), (1 << 1), (1 << 2), (1 << 3), (1 << 4));
+        TEST_ASSERT_EQUAL(result, 0x80 | (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4));
+    }
+};
+
+
+// test dispatch
+template <typename T>
+void test_fparg1() {
+    Thing<T> thing;
+    FunctionPointerArg1<T,T> fp(static_func1<T>);
+    Verifier<T>::verify1(fp);
+    Verifier<T>::verify1(fp.get_function());
+}
+
+template <typename T>
+void test_fparg0() {
+    Thing<T> thing;
+    FunctionPointerArg1<T,void> fp(static_func0<T>);
+    Verifier<T>::verify0(fp);
+    Verifier<T>::verify0(fp.get_function());
+}
+
+
+// Test setup
+utest::v1::status_t test_setup(const size_t number_of_cases) {
+    GREENTEA_SETUP(10, "default_auto");
+    return verbose_test_setup_handler(number_of_cases);
+}
+
+Case cases[] = {
+    Case("Testing FunctionPointerArg1 compatibility", test_fparg1<int>),
+    Case("Testing FunctionPointer compatibility", test_fparg0<int>),
+};
+
+Specification specification(test_setup, cases);
+
+int main() {
+    return !Harness::run(specification);
+}

TESTS/mbed_hal/lp_ticker/main.cpp

@@ -69,11 +69,15 @@ void lp_ticker_1s_deepsleep()
     ticker_remove_event(lp_ticker_data, &delay_event);
     delay_ts = lp_ticker_read() + 1000000;
 
-    timestamp_t start = us_ticker_read();
+    /* 
+     * We use here lp_ticker_read() instead of us_ticker_read() for start and 
+     * end because the microseconds timer might be disable during deepsleep.
+     */
+    timestamp_t start = lp_ticker_read();
     ticker_insert_event(lp_ticker_data, &delay_event, delay_ts, (uint32_t)&delay_event);
     deepsleep();
     while (!complete);
-    timestamp_t end = us_ticker_read();
+    timestamp_t end = lp_ticker_read();
 
     TEST_ASSERT_UINT32_WITHIN(LONG_TIMEOUT, 1000000, end - start);
     TEST_ASSERT_TRUE(complete);

TESTS/mbedmicro-rtos-mbed/basic/main.cpp

@@ -29,25 +29,31 @@
 #define STACK_SIZE DEFAULT_STACK_SIZE
 #endif
 
-DigitalOut led1(LED1);
-DigitalOut led2(LED2);
+#define SIGNAL_PRINT_TICK 0x01
 
-void led2_thread(void const *argument) {
-    static int count = 0;
-    while (true) {
-        led2 = !led2;
-        Thread::wait(1000);
-        greentea_send_kv("tick", count++);
+DigitalOut led1(LED1);
+
+const int total_ticks = 10;
+
+void print_tick_thread() {
+    for (int i = 0; i <= total_ticks; i++) {
+      Thread::signal_wait(SIGNAL_PRINT_TICK);
+      greentea_send_kv("tick", i);
+      led1 = !led1;
     }
 }
 
 int main() {
-    GREENTEA_SETUP(15, "wait_us_auto");
+    GREENTEA_SETUP(total_ticks + 5, "timing_drift_auto");
     
-    Thread thread(led2_thread, NULL, osPriorityNormal, STACK_SIZE);
+    Thread tick_thread(osPriorityNormal, STACK_SIZE);
+    tick_thread.start(print_tick_thread);
     
-    while (true) {
-        led1 = !led1;
-        Thread::wait(500);
+    for (int i = 0; i <= total_ticks; i++) {
+        Thread::wait(1000);
+        tick_thread.signal_set(SIGNAL_PRINT_TICK);
     }
+    
+    tick_thread.join();
+    GREENTEA_TESTSUITE_RESULT(1);
 }

TESTS/mbedmicro-rtos-mbed/threads/main.cpp

@@ -59,6 +59,12 @@ void increment_with_murder(counter_t* counter) {
     (*counter)++;
 }
 
+void self_terminate(Thread *self) {
+    self->terminate();
+    // Code should not get here
+    TEST_ASSERT(0);
+}
+
 // Tests that spawn tasks in different configurations
 template <void (*F)(counter_t *)>
 void test_single_thread() {
@@ -97,6 +103,13 @@ void test_serial_threads() {
     TEST_ASSERT_EQUAL(counter, N);
 }
 
+void test_self_terminate() {
+    Thread *thread = new Thread(osPriorityNormal, STACK_SIZE);
+    thread->start(thread, self_terminate);
+    thread->join();
+    delete thread;
+}
+
 utest::v1::status_t test_setup(const size_t number_of_cases) {
     GREENTEA_SETUP(40, "default_auto");
     return verbose_test_setup_handler(number_of_cases);
@@ -123,6 +136,8 @@ Case cases[] = {
     Case("Testing single thread with murder", test_single_thread<increment_with_murder>),
     Case("Testing parallel threads with murder", test_parallel_threads<3, increment_with_murder>),
     Case("Testing serial threads with murder", test_serial_threads<10, increment_with_murder>),
+
+    Case("Testing thread self terminate", test_self_terminate),
 };
 
 Specification specification(test_setup, cases);

TESTS/mbedmicro-rtos-mbed/timer/main.cpp

@@ -6,23 +6,25 @@
   #error [NOT_SUPPORTED] test not supported
 #endif
 
+int total_ticks = 10;
+volatile int current_tick = 0;
+
 DigitalOut LEDs[4] = {
     DigitalOut(LED1), DigitalOut(LED2), DigitalOut(LED3), DigitalOut(LED4)
 };
 
 void blink(void const *n) {
     static int blink_counter = 0;
-    static int count = 0;
     const int led_id = int(n);
     LEDs[led_id] = !LEDs[led_id];
-    if (++blink_counter == 75) {
-        greentea_send_kv("tick", count++);
+    if (++blink_counter == 75 && current_tick <= total_ticks) {
+        greentea_send_kv("tick", current_tick++);
         blink_counter = 0;
     }
 }
 
 int main(void) {
-    GREENTEA_SETUP(15, "wait_us_auto");
+    GREENTEA_SETUP(total_ticks + 5, "timing_drift_auto");
 
     RtosTimer led_1_timer(blink, osTimerPeriodic, (void *)0);
     RtosTimer led_2_timer(blink, osTimerPeriodic, (void *)1);
@@ -34,5 +36,16 @@ int main(void) {
     led_3_timer.start(50);
     led_4_timer.start(25);
     
+    while(current_tick <= total_ticks) {
+        Thread::wait(10);
+    }
+    
+    led_4_timer.stop();
+    led_3_timer.stop();
+    led_2_timer.stop();
+    led_1_timer.stop();
+    
+    GREENTEA_TESTSUITE_RESULT(1);
+
     Thread::wait(osWaitForever);
 }

TESTS/storage_abstraction/basicAPI/basicAPI.cpp

@@ -135,7 +135,7 @@ control_t test_initialize(const size_t call_count)
     TEST_ASSERT(rc >= ARM_DRIVER_OK);
     if (rc == ARM_DRIVER_OK) {
         TEST_ASSERT_EQUAL(1, capabilities.asynchronous_ops);
-        return (call_count < REPEAT_INSTANCES) ? (CaseTimeout(200) + CaseRepeatAll) : CaseNext;
+        return (call_count < REPEAT_INSTANCES) ? (CaseTimeout(200) + CaseRepeatAll) : (control_t) CaseNext;
     }
 
     TEST_ASSERT(rc == 1);

features/frameworks/utest/source/utest_default_handlers.cpp

@@ -34,6 +34,7 @@ const handlers_t utest::v1::verbose_continue_handlers = {
     verbose_case_failure_handler
 };
 
+const handlers_t& utest::v1::default_handlers = greentea_abort_handlers;
 
 // --- SPECIAL HANDLERS ---
 static void test_failure_handler(const failure_t failure) {

features/frameworks/utest/source/utest_harness.cpp

@@ -36,7 +36,7 @@ namespace
 
     const Case *case_current = NULL;
     size_t case_index = 0;
-    control_t case_control = control_t(REPEAT_SETUP_TEARDOWN);
+    base_control_t case_control =  { REPEAT_SETUP_TEARDOWN, TIMEOUT_UNDECLR };
     size_t case_repeat_count = 1;
 
     void *case_timeout_handle = NULL;
@@ -47,8 +47,13 @@ namespace
     size_t case_failed = 0;
     size_t case_failed_before = 0;
 
-    handlers_t defaults = default_handlers;
-    handlers_t handlers = defaults;
+    struct DefaultHandlers : public handlers_t { 
+        DefaultHandlers() : handlers_t(default_handlers) { }
+        DefaultHandlers(const handlers_t& other) : handlers_t(other) { }
+    };
+
+    SingletonPtr<DefaultHandlers> defaults;
+    SingletonPtr<DefaultHandlers> handlers;
 
     location_t location = LOCATION_UNKNOWN;
 
@@ -110,10 +115,10 @@ bool Harness::run(const Specification& specification)
         return false;
     test_cases  = specification.cases;
     test_length = specification.length;
-    defaults    = specification.defaults;
-    handlers.test_setup    = defaults.get_handler(specification.setup_handler);
-    handlers.test_teardown = defaults.get_handler(specification.teardown_handler);
-    handlers.test_failure  = defaults.get_handler(specification.failure_handler);
+    *defaults.get()    = specification.defaults;
+    handlers->test_setup    = defaults->get_handler(specification.setup_handler);
+    handlers->test_teardown = defaults->get_handler(specification.teardown_handler);
+    handlers->test_failure  = defaults->get_handler(specification.failure_handler);
 
     test_index_of_case = 0;
     test_passed = 0;
@@ -127,16 +132,16 @@ bool Harness::run(const Specification& specification)
     int setup_status = 0;
     failure_t failure(REASON_NONE, location);
 
-    if (handlers.test_setup) {
-        setup_status = handlers.test_setup(test_length);
+    if (handlers->test_setup) {
+        setup_status = handlers->test_setup(test_length);
         if (setup_status == STATUS_CONTINUE) setup_status = 0;
         else if (setup_status < STATUS_CONTINUE)     failure.reason = REASON_TEST_SETUP;
         else if (setup_status > signed(test_length)) failure.reason = REASON_CASE_INDEX;
     }
 
     if (failure.reason != REASON_NONE) {
-        if (handlers.test_failure) handlers.test_failure(failure);
-        if (handlers.test_teardown) handlers.test_teardown(0, 0, failure);
+        if (handlers->test_failure) handlers->test_failure(failure);
+        if (handlers->test_teardown) handlers->test_teardown(0, 0, failure);
         test_cases = NULL;
         exit(1);
         return true;
@@ -150,8 +155,8 @@ bool Harness::run(const Specification& specification)
     scheduler.post(run_next_case, 0);
     if (scheduler.run() != 0) {
         failure.reason = REASON_SCHEDULER;
-        if (handlers.test_failure) handlers.test_failure(failure);
-        if (handlers.test_teardown) handlers.test_teardown(0, 0, failure);
+        if (handlers->test_failure) handlers->test_failure(failure);
+        if (handlers->test_teardown) handlers->test_teardown(0, 0, failure);
         test_cases = NULL;
         exit(1);
         return true;
@@ -167,8 +172,8 @@ void Harness::raise_failure(const failure_reason_t reason)
     if (test_cases == NULL) return;
 
     utest::v1::status_t fail_status = STATUS_ABORT;
-    if (handlers.test_failure) handlers.test_failure(failure_t(reason, location));
-    if (handlers.case_failure) fail_status = handlers.case_failure(case_current, failure_t(reason, location));
+    if (handlers->test_failure) handlers->test_failure(failure_t(reason, location));
+    if (handlers->case_failure) fail_status = handlers->case_failure(case_current, failure_t(reason, location));
 
     {
         UTEST_ENTER_CRITICAL_SECTION;
@@ -184,25 +189,25 @@ void Harness::raise_failure(const failure_reason_t reason)
     }
 
     if (fail_status == STATUS_ABORT || reason & REASON_CASE_SETUP) {
-        if (handlers.case_teardown && location != LOCATION_CASE_TEARDOWN) {
+        if (handlers->case_teardown && location != LOCATION_CASE_TEARDOWN) {
             location_t fail_loc(location);
             location = LOCATION_CASE_TEARDOWN;
 
-            utest::v1::status_t teardown_status = handlers.case_teardown(case_current, case_passed, case_failed, failure_t(reason, fail_loc));
+            utest::v1::status_t teardown_status = handlers->case_teardown(case_current, case_passed, case_failed, failure_t(reason, fail_loc));
             if (teardown_status < STATUS_CONTINUE) raise_failure(REASON_CASE_TEARDOWN);
             else if (teardown_status > signed(test_length)) raise_failure(REASON_CASE_INDEX);
             else if (teardown_status >= 0) case_index = teardown_status - 1;
 
             // Restore case failure location once we have dealt with case teardown
             location = fail_loc;
-            handlers.case_teardown = NULL;
+            handlers->case_teardown = NULL;
         }
     }
     if (fail_status == STATUS_ABORT) {
         test_failed++;
         failure_t fail(reason, location);
         location = LOCATION_TEST_TEARDOWN;
-        if (handlers.test_teardown) handlers.test_teardown(test_passed, test_failed, fail);
+        if (handlers->test_teardown) handlers->test_teardown(test_passed, test_failed, fail);
         exit(test_failed);
         die();
     }
@@ -218,8 +223,8 @@ void Harness::schedule_next_case()
     if (case_control.repeat & REPEAT_SETUP_TEARDOWN || !(case_control.repeat & (REPEAT_ON_TIMEOUT | REPEAT_ON_VALIDATE))) {
         location = LOCATION_CASE_TEARDOWN;
 
-        if (handlers.case_teardown) {
-            utest::v1::status_t status = handlers.case_teardown(case_current, case_passed, case_failed,
+        if (handlers->case_teardown) {
+            utest::v1::status_t status = handlers->case_teardown(case_current, case_passed, case_failed,
                                                      case_failed ? failure_t(REASON_CASES, LOCATION_UNKNOWN) : failure_t(REASON_NONE));
             if (status < STATUS_CONTINUE)          raise_failure(REASON_CASE_TEARDOWN);
             else if (status > signed(test_length)) raise_failure(REASON_CASE_INDEX);
@@ -298,9 +303,9 @@ void Harness::run_next_case()
     UTEST_LOG_FUNCTION();
     if(case_current < (test_cases + test_length))
     {
-        handlers.case_setup    = defaults.get_handler(case_current->setup_handler);
-        handlers.case_teardown = defaults.get_handler(case_current->teardown_handler);
-        handlers.case_failure  = defaults.get_handler(case_current->failure_handler);
+        handlers->case_setup    = defaults->get_handler(case_current->setup_handler);
+        handlers->case_teardown = defaults->get_handler(case_current->teardown_handler);
+        handlers->case_failure  = defaults->get_handler(case_current->failure_handler);
 
         if (case_current->is_empty()) {
             location = LOCATION_UNKNOWN;
@@ -321,7 +326,7 @@ void Harness::run_next_case()
 
         if (setup_repeat & REPEAT_SETUP_TEARDOWN) {
             location = LOCATION_CASE_SETUP;
-            if (handlers.case_setup && (handlers.case_setup(case_current, test_index_of_case) != STATUS_CONTINUE)) {
+            if (handlers->case_setup && (handlers->case_setup(case_current, test_index_of_case) != STATUS_CONTINUE)) {
                 raise_failure(REASON_CASE_SETUP);
                 schedule_next_case();
                 return;
@@ -361,9 +366,9 @@ void Harness::run_next_case()
             UTEST_LEAVE_CRITICAL_SECTION;
         }
     }
-    else if (handlers.test_teardown) {
+    else if (handlers->test_teardown) {
         location = LOCATION_TEST_TEARDOWN;
-        handlers.test_teardown(test_passed, test_failed, test_failed ? failure_t(REASON_CASES, LOCATION_UNKNOWN) : failure_t(REASON_NONE));
+        handlers->test_teardown(test_passed, test_failed, test_failed ? failure_t(REASON_CASES, LOCATION_UNKNOWN) : failure_t(REASON_NONE));
         test_cases = NULL;
         exit(test_failed);
     } else {

features/frameworks/utest/source/utest_shim.cpp

@@ -66,7 +66,7 @@ static volatile utest_v1_harness_callback_t minimal_callback;
 static volatile utest_v1_harness_callback_t ticker_callback;
 
 // Timeout object used to control the scheduling of test case callbacks
-Timeout utest_timeout_object;
+SingletonPtr<Timeout> utest_timeout_object;
 
 static void ticker_handler()
 {
@@ -77,7 +77,9 @@ static void ticker_handler()
 static int32_t utest_us_ticker_init()
 {
     UTEST_LOG_FUNCTION();
-    // Ticker scheduler does not require any initialisation so return immediately
+    // initialize the Timeout object to makes sure it is not initialized in 
+    // interrupt context.
+    utest_timeout_object.get();
     return 0;
 }
 static void *utest_us_ticker_post(const utest_v1_harness_callback_t callback, timestamp_t delay_ms)
@@ -88,7 +90,7 @@ static void *utest_us_ticker_post(const utest_v1_harness_callback_t callback, ti
     if (delay_ms) {
         ticker_callback = callback;
         // fire the interrupt in 1000us * delay_ms
-        utest_timeout_object.attach_us(ticker_handler, delay_us);
+        utest_timeout_object->attach_us(ticker_handler, delay_us);
         
     } 
     else {
@@ -102,7 +104,7 @@ static int32_t utest_us_ticker_cancel(void *handle)
 {
     UTEST_LOG_FUNCTION();
     (void) handle;
-    utest_timeout_object.detach();
+    utest_timeout_object->detach();
     return 0;
 }
 static int32_t utest_us_ticker_run()

features/frameworks/utest/source/utest_types.cpp

@@ -114,3 +114,22 @@ const char* utest::v1::stringify(utest::v1::status_t status)
     }
     return "Unknown Status";
 }
+
+
+const utest::v1::base_control_t utest::v1::CaseNext = { REPEAT_NONE, TIMEOUT_NONE };
+
+const utest::v1::base_control_t utest::v1::CaseNoRepeat = { REPEAT_NONE, TIMEOUT_UNDECLR };
+
+const utest::v1::base_control_t utest::v1::CaseRepeatAll = { REPEAT_ALL, TIMEOUT_UNDECLR };
+
+const utest::v1::base_control_t utest::v1::CaseRepeatHandler = { REPEAT_HANDLER, TIMEOUT_UNDECLR };
+
+const utest::v1::base_control_t utest::v1::CaseNoTimeout = { REPEAT_UNDECLR, TIMEOUT_NONE };
+
+const utest::v1::base_control_t utest::v1::CaseAwait = { REPEAT_UNDECLR, TIMEOUT_FOREVER };
+
+// equal to CaeReapeatAll
+const utest::v1::base_control_t utest::v1::CaseRepeat = { REPEAT_ALL, TIMEOUT_UNDECLR };
+
+// equal to CaseRepeatHandler
+const utest::v1::base_control_t utest::v1::CaseRepeatHandlerOnly = { REPEAT_HANDLER, TIMEOUT_UNDECLR };

features/frameworks/utest/utest/utest_default_handlers.h

@@ -185,7 +185,7 @@ namespace v1 {
     extern const handlers_t selftest_handlers;
 
     /// The greentea aborting handlers are the default
-    const handlers_t default_handlers = greentea_abort_handlers;
+    extern const handlers_t& default_handlers;
 
 }   // namespace v1
 }   // namespace utest

features/frameworks/utest/utest/utest_types.h

@@ -120,6 +120,23 @@ namespace v1 {
     /// Stringifies a status.
     const char* stringify(utest::v1::status_t status);
 
+    /** POD version of the class control_t.
+     * It is used to instantiate const control_t objects as PODs
+     * and prevent them to be included in the final binary.
+     * @note: control_pod_t can be converted to control_t by copy construction.
+     */
+    struct base_control_t {
+        repeat_t repeat;
+        uint32_t timeout;
+
+        repeat_t inline get_repeat() const {
+            return repeat;
+        }
+        uint32_t inline get_timeout() const {
+            return timeout;
+        }
+    };
+
     /** Control class for specifying test case attributes
      *
      * This class encapsulated control information about test cases which, when returned from
@@ -148,24 +165,26 @@ namespace v1 {
      *
      * In the future, more control information may be added transparently and backwards compatible.
      */
-    struct control_t
+    struct control_t : private base_control_t
     {
-        control_t() : repeat(REPEAT_UNDECLR), timeout(TIMEOUT_UNDECLR) {}
+        control_t() : base_control_t(make_base_control_t(REPEAT_UNDECLR, TIMEOUT_UNDECLR)) {}
 
         control_t(repeat_t repeat, uint32_t timeout_ms) :
-            repeat(repeat), timeout(timeout_ms) {}
+            base_control_t(make_base_control_t(repeat, timeout_ms)) {}
 
         control_t(repeat_t repeat) :
-            repeat(repeat), timeout(TIMEOUT_UNDECLR) {}
+            base_control_t(make_base_control_t(repeat, TIMEOUT_UNDECLR)) {}
 
         control_t(uint32_t timeout_ms) :
-            repeat(REPEAT_UNDECLR), timeout(timeout_ms) {}
+            base_control_t(make_base_control_t(REPEAT_UNDECLR, timeout_ms)) {}
 
-        control_t
-        inline operator+(const control_t& rhs) const {
+        control_t(const base_control_t& other) :
+            base_control_t(other) {}
+
+        friend control_t operator+(const control_t& lhs, const control_t& rhs) {
             control_t result(
-                repeat_t(this->repeat | rhs.repeat),
-                (rhs.timeout == TIMEOUT_NONE) ? rhs.timeout : this->timeout);
+                repeat_t(lhs.repeat | rhs.repeat),
+                (rhs.timeout == TIMEOUT_NONE) ? rhs.timeout : lhs.timeout);
 
             if (result.timeout != TIMEOUT_NONE && result.timeout > rhs.timeout) {
                 result.timeout = rhs.timeout;
@@ -196,25 +215,46 @@ namespace v1 {
         }
 
     private:
-        repeat_t repeat;
-        uint32_t timeout;
+        static base_control_t make_base_control_t(repeat_t repeat, uint32_t timeout) {
+            base_control_t result = {
+                repeat,
+                timeout
+            };
+            return result;
+        }
+
         friend class Harness;
     };
 
+    /// @see operator+ in control_t
+    inline control_t operator+(const base_control_t& lhs, const base_control_t& rhs) {
+        return control_t(lhs) + control_t(rhs);
+    }
+
+    /// @see operator+ in control_t
+    inline control_t operator+(const base_control_t& lhs, const control_t& rhs) {
+        return control_t(lhs) + rhs;
+    }
+
+    /// @see operator+ in control_t
+    inline control_t operator+(const control_t& lhs, const base_control_t& rhs) {
+        return lhs + control_t(rhs);
+    }
+
     /// does not repeat this test case and immediately moves on to the next one without timeout
-    const  control_t CaseNext(REPEAT_NONE, TIMEOUT_NONE);
+    extern const  base_control_t CaseNext;
 
     /// does not repeat this test case, moves on to the next one
-    const  control_t CaseNoRepeat(REPEAT_NONE);
+    extern const  base_control_t CaseNoRepeat;
     /// repeats the test case handler with calling teardown and setup handlers
-    const  control_t CaseRepeatAll(REPEAT_ALL);
+    extern const  base_control_t CaseRepeatAll;
     /// repeats only the test case handler without calling teardown and setup handlers
-    const  control_t CaseRepeatHandler(REPEAT_HANDLER);
+    extern const  base_control_t CaseRepeatHandler;
 
     /// No timeout, immediately moves on to the next case, but allows repeats
-    const  control_t CaseNoTimeout(TIMEOUT_NONE);
+    extern const  base_control_t CaseNoTimeout;
     /// Awaits until the callback is validated and never times out. Use with caution!
-    const  control_t CaseAwait(TIMEOUT_FOREVER);
+    extern const  base_control_t CaseAwait;
     /// Alias class for asynchronous timeout control in milliseconds
     inline control_t CaseTimeout(uint32_t ms) { return ms; }
 
@@ -341,8 +381,11 @@ namespace v1 {
 
 
     // deprecations
-    __deprecated_message("Use CaseRepeatAll instead.")     const control_t CaseRepeat            = CaseRepeatAll;
-    __deprecated_message("Use CaseRepeatHandler instead.") const control_t CaseRepeatHandlerOnly = CaseRepeatHandler;
+    __deprecated_message("Use CaseRepeatAll instead.")
+    extern const base_control_t CaseRepeat;
+
+    __deprecated_message("Use CaseRepeatHandler instead.")
+    extern const base_control_t CaseRepeatHandlerOnly;
 
     __deprecated_message("Use REASON_NONE instead.")          const failure_reason_t FAILURE_NONE       = REASON_NONE;
     __deprecated_message("Use REASON_UNKNOWN instead.")       const failure_reason_t FAILURE_UNKNOWN    = REASON_UNKNOWN;

features/net/FEATURE_IPV4/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/stm32f7_eth_init.c

@@ -0,0 +1,87 @@
+#include "stm32f7xx_hal.h"
+
+/**
+ * Override HAL Eth Init function
+ */
+void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
+{
+    GPIO_InitTypeDef GPIO_InitStructure;
+    if (heth->Instance == ETH) {
+
+        /* Enable GPIOs clocks */
+        __HAL_RCC_GPIOA_CLK_ENABLE();
+        __HAL_RCC_GPIOC_CLK_ENABLE();
+        __HAL_RCC_GPIOD_CLK_ENABLE();
+        __HAL_RCC_GPIOG_CLK_ENABLE();
+
+        /** ETH GPIO Configuration
+          RMII_REF_CLK ----------------------> PA1
+          RMII_MDIO -------------------------> PA2
+          RMII_MDC --------------------------> PC1
+          RMII_MII_CRS_DV -------------------> PA7
+          RMII_MII_RXD0 ---------------------> PC4
+          RMII_MII_RXD1 ---------------------> PC5
+          RMII_MII_RXER ---------------------> PD5
+          RMII_MII_TX_EN --------------------> PG11
+          RMII_MII_TXD0 ---------------------> PG13
+          RMII_MII_TXD1 ---------------------> PG14
+         */
+        /* Configure PA1, PA2 and PA7 */
+        GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
+        GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStructure.Pull = GPIO_NOPULL; 
+        GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
+        GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
+        HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+        /* Configure PC1, PC4 and PC5 */
+        GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
+        HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+        /* Configure PD5 */
+        GPIO_InitStructure.Pin =  GPIO_PIN_5;
+        HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+        /* Configure PG11, PG13 and PG14 */
+        GPIO_InitStructure.Pin =  GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
+        HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
+
+        /* Enable the Ethernet global Interrupt */
+        HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
+        HAL_NVIC_EnableIRQ(ETH_IRQn);
+        
+        /* Enable ETHERNET clock  */
+        __HAL_RCC_ETH_CLK_ENABLE();
+    }
+}
+
+/**
+ * Override HAL Eth DeInit function
+ */
+void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
+{
+    if (heth->Instance == ETH) {
+        /* Peripheral clock disable */
+        __HAL_RCC_ETH_CLK_DISABLE();
+
+        /** ETH GPIO Configuration
+          RMII_REF_CLK ----------------------> PA1
+          RMII_MDIO -------------------------> PA2
+          RMII_MDC --------------------------> PC1
+          RMII_MII_CRS_DV -------------------> PA7
+          RMII_MII_RXD0 ---------------------> PC4
+          RMII_MII_RXD1 ---------------------> PC5
+          RMII_MII_RXER ---------------------> PD5
+          RMII_MII_TX_EN --------------------> PG11
+          RMII_MII_TXD0 ---------------------> PG13
+          RMII_MII_TXD1 ---------------------> PG14
+         */
+        HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
+        HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
+        HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5);
+        HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14);
+
+        /* Disable the Ethernet global Interrupt */
+        NVIC_DisableIRQ(ETH_IRQn);
+    }
+}

features/net/FEATURE_IPV4/lwip-interface/lwip_stack.c

@@ -278,6 +278,11 @@ static int lwip_socket_bind(nsapi_stack_t *stack, nsapi_socket_t handle, nsapi_a
         return NSAPI_ERROR_PARAMETER;
     }
 
+    if ((s->conn->type == NETCONN_TCP && s->conn->pcb.tcp->local_port != 0) ||
+        (s->conn->type == NETCONN_UDP && s->conn->pcb.udp->local_port != 0)) {
+        return NSAPI_ERROR_PARAMETER;
+    }
+
     err_t err = netconn_bind(s->conn, (ip_addr_t *)addr.bytes, port);
     return lwip_err_remap(err);
 }
@@ -308,6 +313,9 @@ static int lwip_socket_accept(nsapi_stack_t *stack, nsapi_socket_t server, nsapi
 {
     struct lwip_socket *s = (struct lwip_socket *)server;
     struct lwip_socket *ns = lwip_arena_alloc();
+    if (!ns) {
+        return NSAPI_ERROR_NO_SOCKET;
+    }
 
     err_t err = netconn_accept(s->conn, &ns->conn);
     if (err != ERR_OK) {

features/net/FEATURE_IPV6/nanostack-interface/NanostackInterface.cpp

@@ -368,6 +368,7 @@ void NanostackSocket::data_free_all(void)
     // No mode requirement
 
     NanostackBuffer *buffer = rxBufChain;
+    rxBufChain = NULL;
     while (buffer != NULL) {
         NanostackBuffer *next_buffer = buffer->next;
         FREE(buffer);

features/net/network-socket/Socket.h

@@ -21,6 +21,7 @@
 #include "network-socket/NetworkStack.h"
 #include "rtos/Mutex.h"
 #include "Callback.h"
+#include "toolchain.h"
 
 
 /** Abstract socket class
@@ -168,10 +169,17 @@ public:
      *
      *  @param obj      Pointer to object to call method on
      *  @param method   Method to call on state change
+     *
+     *  @deprecated
+     *      The attach function does not support cv-qualifiers. Replaced by
+     *      attach(callback(obj, method)).
      */
     template <typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The attach function does not support cv-qualifiers. Replaced by "
+        "attach(callback(obj, method)).")
     void attach(T *obj, M method) {
-        attach(mbed::Callback<void()>(obj, method));
+        attach(mbed::callback(obj, method));
     }
 
 protected:

features/net/network-socket/TCPServer.cpp

@@ -76,16 +76,19 @@ int TCPServer::accept(TCPSocket *connection, SocketAddress *address)
 
             connection->_lock.unlock();
             break;
-        }
-
-        if (NSAPI_ERROR_WOULD_BLOCK == ret) {
+        } else if (NSAPI_ERROR_WOULD_BLOCK != ret) {
+            break;
+        } else {
             int32_t count;
 
+            // Release lock before blocking so other threads
+            // accessing this object aren't blocked
             _lock.unlock();
             count = _accept_sem.wait(_timeout);
             _lock.lock();
 
             if (count < 1) {
+                // Semaphore wait timed out so break out and return
                 ret = NSAPI_ERROR_WOULD_BLOCK;
                 break;
             }

features/net/network-socket/TCPServer.h

@@ -41,13 +41,11 @@ public:
      *
      *  @param stack    Network stack as target for socket
      */
-    TCPServer(NetworkStack *stack);
-
-    template <typename IF>
-    TCPServer(IF *iface)
+    template <typename S>
+    TCPServer(S *stack)
         : _pending(0), _accept_sem(0)
     {
-        open(iface->get_stack());
+        open(stack);
     }
 
     /** Destroy a socket

features/storage/FEATURE_STORAGE/TESTS/cfstore/add_del/add_del.cpp

@@ -45,6 +45,8 @@
 
 using namespace utest::v1;
 
+#define CFSTORE_ADD_DEL_MALLOC_SIZE            1024
+
 static char cfstore_add_del_utest_msg_g[CFSTORE_UTEST_MSG_BUF_SIZE];
 
 #ifdef YOTTA_CFG_CFSTORE_UVISOR
@@ -277,11 +279,104 @@ control_t cfstore_add_del_test_04(const size_t call_count)
     return CaseNext;
 }
 
+/** @brief  Delete and attribute after an internal realloc of the cfstore memory area
+ *
+ * This test case goes through the following steps:
+ * 1. Creates attribute att_1 of size x, and write some data. This causes an internal
+ *    cfstore realloc to allocate heap memory for the attribute.
+ * 2. Allocates some memory on the heap. Typically, this will be immediately after the
+ *    memory used by cfstore for the KV area. This means that if any cfstore reallocs are
+ *    made to increase size the memory area will have to move.
+ * 3. Creates attribute att_2 of size y. This causes an internal cfstore realloc to move
+ *    the KV memory area to a new location.
+ * 4. Delete att_1. This causes an internal realloc to shrink the area and tests that the
+ *    internal data structures that contain pointers to different parts of the KV area
+ *    are updated correctly.
+ * 5. Allocates some memory on the heap. If the heap has been corrupted, this will likely trigger
+ *    a crash
+ *
+ * @return on success returns CaseNext to continue to next test case, otherwise will assert on errors.
+ */
+control_t cfstore_add_del_test_05_end(const size_t call_count)
+{
+    char data[] = "some test data";
+    char filename[] = "file1";
+    char filename2[] = "file2";
+    int32_t ret = ARM_DRIVER_ERROR;
+    void *test_buf1 = NULL;
+    void *test_buf2 = NULL;
+    ARM_CFSTORE_DRIVER *cfstoreDriver = &cfstore_driver;
+    ARM_CFSTORE_KEYDESC keyDesc1;
+    ARM_CFSTORE_HANDLE_INIT(hkey1);
+    ARM_CFSTORE_KEYDESC keyDesc2;
+    ARM_CFSTORE_HANDLE_INIT(hkey2);
+    ARM_CFSTORE_SIZE count = sizeof(data);
+
+    CFSTORE_FENTRYLOG("%s:entered\n", __func__);
+    (void) call_count;
+
+    /* step 1 */
+    memset(&keyDesc1, 0, sizeof(keyDesc1));
+    keyDesc1.drl = ARM_RETENTION_NVM;
+    keyDesc1.flags.read = true;
+    keyDesc1.flags.write = true;
+    ret = cfstoreDriver->Create(filename, 1024, &keyDesc1, hkey1);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to create attribute 1 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+
+    /* Write data to file */
+    ret = cfstoreDriver->Write(hkey1, (const char *)data, &count);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to write to attribute 1 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+
+    /* step 2 */
+    test_buf1 = malloc(CFSTORE_ADD_DEL_MALLOC_SIZE);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to allocate memory (test_buf1=%p)\n", __func__, test_buf1);
+    TEST_ASSERT_MESSAGE(test_buf1 != NULL, cfstore_add_del_utest_msg_g);
+
+    /* step 3 */
+    memset(&keyDesc2, 0, sizeof(keyDesc2));
+    keyDesc2.drl = ARM_RETENTION_NVM;
+    keyDesc2.flags.read = true;
+    keyDesc2.flags.write = true;
+    ret = cfstoreDriver->Create(filename2, 1024, &keyDesc2, hkey2);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to create attribute 2 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+
+    /* Write data to file */
+    count = sizeof(data);
+    ret = cfstoreDriver->Write(hkey2, (const char *)data, &count);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to write to attribute 2 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+
+    /* step 4 */
+    ret = cfstoreDriver->Delete(hkey1);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to delete to attribute 1 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+
+    ret = cfstoreDriver->Close(hkey1);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to close to attribute 1 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+
+    /* step 5 */
+    test_buf2 = malloc(CFSTORE_ADD_DEL_MALLOC_SIZE);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to allocate memory (test_buf2=%p)\n", __func__, test_buf2);
+    TEST_ASSERT_MESSAGE(test_buf2 != NULL, cfstore_add_del_utest_msg_g);
+
+    /* clean up */
+    ret = cfstoreDriver->Close(hkey2);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_add_del_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to close to attribute 2 (ret=%d)\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_add_del_utest_msg_g);
+    free(test_buf2);
+    free(test_buf1);
+
+    return CaseNext;
+}
 
 /// @cond CFSTORE_DOXYGEN_DISABLE
 utest::v1::status_t greentea_setup(const size_t number_of_cases)
 {
-    GREENTEA_SETUP(100, "default_auto");
+    GREENTEA_SETUP(300, "default_auto");
     return greentea_test_setup_handler(number_of_cases);
 }
 
@@ -296,6 +391,8 @@ Case cases[] = {
         Case("ADD_DEL_test_03_start", cfstore_utest_default_start),
         Case("ADD_DEL_test_03_end", cfstore_add_del_test_03_end),
         Case("ADD_DEL_test_04", cfstore_add_del_test_04),
+        Case("ADD_DEL_test_05_start", cfstore_utest_default_start),
+        Case("ADD_DEL_test_05_end", cfstore_add_del_test_05_end),
 };
 
 

features/storage/FEATURE_STORAGE/TESTS/cfstore/close/close.cpp

@@ -75,14 +75,14 @@ static control_t cfstore_close_test_00(const size_t call_count)
  *
  * The is a basic test case which does the following:
  * - 01. create a key with handle hkey1
- * - 02. write data of hkey
+ * - 02. write data of hkey1
  * - 03. opens KV with 2nd handle, hkey2
  * - 04. read data with hkey2 and make sure its the same as that written with hkey1
  * - 05. write new data with hkey2
  * - 06. delete hkey2
  * - 07. close hkey2
  * - 08. read hkey1 and make sure the data is the newly written data i.e. the key hasnt
- *     been deleted yet
+ *       been deleted yet
  * - 09. try to open KV and make sure unable to do so, as KV is deleting
  * - 10. close hkey1
  * - 11. try to open KV and make sure unable to do so because its now been deleted

features/storage/FEATURE_STORAGE/TESTS/cfstore/create/create.cpp

@@ -51,6 +51,7 @@ using namespace utest::v1;
 #else
 #define CFSTORE_CREATE_GREENTEA_TIMEOUT_S     60
 #endif
+#define CFSTORE_CREATE_MALLOC_SIZE            1024
 
 static char cfstore_create_utest_msg_g[CFSTORE_UTEST_MSG_BUF_SIZE];
 
@@ -272,15 +273,14 @@ static control_t cfstore_create_test_00(const size_t call_count)
 }
 
 
-/** @brief
+/** @brief  Test case to change the value blob size of pre-existing key.
  *
- * Test case to change the value blob size of pre-existing key.
  * The test does the following:
  * - creates a cfstore with ~10 entries.
- * - for a mid-cfstore entry, grow the value blob size
+ * - for a mid-cfstore entry, double the value blob size.
  * - check all the cfstore entries can be read correctly and their
  *   data agrees with the data supplied upon creation.
- * - grow the mid-entry value blob size to be ~double the initial size.
+ * - shrink the mid-entry value blob size to be ~half the initial size.
  * - check all the cfstore entries can be read correctly and their
  *   data agrees with the data supplied upon creation.
  *
@@ -501,14 +501,13 @@ control_t cfstore_create_test_04_end(const size_t call_count)
     return CaseNext;
 }
 
-/**@brief
+
+/**
+ * @brief   Support function for test cases 05
  *
- * Test to create ~500 kvs. The amount of data store in the cfstore is as follows:
- * - total = (220*500)+(256/64)*500*501/2 500*8 = 8236000 = 8.236M
- *
- * @return on success returns CaseNext to continue to next test case, otherwise will assert on errors.
+ * Create enough KV's to consume the whole of available memory
  */
-control_t cfstore_create_test_05_end(const size_t call_count)
+int32_t cfstore_create_test_05_core(const size_t call_count, uint32_t* bytes_stored_ex)
 {
     int32_t ret = ARM_DRIVER_ERROR;
     uint32_t i = 0;
@@ -523,7 +522,10 @@ control_t cfstore_create_test_05_end(const size_t call_count)
     ARM_CFSTORE_DRIVER* drv = &cfstore_driver;
 
     CFSTORE_FENTRYLOG("%s:entered\n", __func__);
-    (void) call_count;
+
+    /* Initialize() */
+    cfstore_utest_default_start(call_count);
+
     value_buf = (char*) malloc(max_value_buf_size);
     CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: out of memory.\n", __func__);
     TEST_ASSERT_MESSAGE(value_buf != NULL, cfstore_create_utest_msg_g);
@@ -549,6 +551,48 @@ control_t cfstore_create_test_05_end(const size_t call_count)
     free(value_buf);
     CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: Uninitialize() call failed.\n", __func__);
     TEST_ASSERT_MESSAGE(drv->Uninitialize() >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+    if(bytes_stored_ex){
+        *bytes_stored_ex = bytes_stored;
+    }
+    return ret;
+}
+
+
+/**
+ * @brief   Test case to check cfstore recovers from out of memory
+ *          errors without leaking memory
+ *
+ * This test case does the following:
+ * 1. Start loop.
+ * 2. Initializes CFSTORE.
+ * 3. Creates as many KVs as required to run out of memory. The number of bytes B
+ *    allocated before running out of memory is recorded.
+ * 4. For loop i, check that B_i =  B_i-1 for i>0 i.e. that no memory has been leaked
+ * 5. Uninitialize(), which should clean up any cfstore internal state including
+ *    freeing the internal memeory area.
+ * 6. Repeat from step 1 N times.
+ */
+control_t cfstore_create_test_05(const size_t call_count)
+{
+    uint32_t i = 0;
+    int32_t ret = ARM_DRIVER_ERROR;
+    uint32_t bytes_stored = 0;
+    uint32_t bytes_stored_prev = 0;
+    const uint32_t max_loops = 50;
+
+    CFSTORE_FENTRYLOG("%s:entered\n", __func__);
+    for(i = 0; i < max_loops; i++) {
+        ret = cfstore_create_test_05_core(call_count, &bytes_stored);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: cfstore_create_test_05_core() failed (ret = %d.\n", __func__, (int) ret);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+
+        if(i > 1) {
+            CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: memory leak: stored %d bytes on loop %d, but %d bytes on loop %d .\n", __func__, (int) bytes_stored, (int) i, (int) bytes_stored_prev, (int) i-1);
+            TEST_ASSERT_MESSAGE(bytes_stored == bytes_stored_prev, cfstore_create_utest_msg_g);
+
+        }
+        bytes_stored_prev = bytes_stored;
+    }
     return CaseNext;
 }
 
@@ -580,9 +624,8 @@ cfstore_create_key_name_validate_t cfstore_create_test_06_data[] = {
 /// @endcond
 
 
-/**@brief
- *
- * Test whether a key name can be created or not.
+/**
+ * @brief   Test whether a key name can be created or not.
  *
  * @param	key_name
  * 			name of the key to create in the store
@@ -663,6 +706,109 @@ control_t cfstore_create_test_06_end(const size_t call_count)
     return CaseNext;
 }
 
+
+/** @brief  Test case to change the value blob size of pre-existing
+ *          key in a way that causes the memory area to realloc-ed,
+ *
+ * The test is a modified version of cfstore_create_test_01_end which
+ *  - creates KVs,
+ *  - mallocs a memory object on the heap
+ *  - increases the size of one of the existing KVs, causing the
+ *    internal memory area to be realloc-ed.
+ *
+ * In detail, the test does the following:
+ * 1. creates a cfstore with ~10 entries. This causes the configuration
+ *    store to realloc() heap memory for KV storage.
+ * 2. mallocs a memory object on heap.
+ * 3. for a mid-cfstore entry, double the value blob size. This will cause the
+ *    cfstore memory area to be realloced.
+ * 4. check all the cfstore entries can be read correctly and their
+ *    data agrees with the data supplied upon creation.
+ * 5. shrink the mid-entry value blob size to be ~half the initial size.
+ *    check all the cfstore entries can be read correctly and their
+ *    data agrees with the data supplied upon creation.
+ *
+ * @return on success returns CaseNext to continue to next test case, otherwise will assert on errors.
+ */
+control_t cfstore_create_test_07_end(const size_t call_count)
+{
+    int32_t ret = ARM_DRIVER_ERROR;
+    void *test_buf1 = NULL;
+    ARM_CFSTORE_FMODE flags;
+    cfstore_kv_data_t* node = NULL;
+    ARM_CFSTORE_DRIVER* drv = &cfstore_driver;
+
+    CFSTORE_FENTRYLOG("%s:entered\n", __func__);
+    (void) call_count;
+    memset(&flags, 0, sizeof(flags));
+
+    /* step 1 */
+    ret = cfstore_test_create_table(cfstore_create_test_01_data_step_01);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Failed to add cfstore_create_test_01_data_head (ret=%d).\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+
+    /* step 2 */
+    test_buf1 = malloc(CFSTORE_CREATE_MALLOC_SIZE);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to allocate memory (test_buf1=%p)\n", __func__, test_buf1);
+    TEST_ASSERT_MESSAGE(test_buf1 != NULL, cfstore_create_utest_msg_g);
+
+    /* step 3. find cfstore_create_test_01_data[0] and grow the KV MID_ENTRY_01 to MID_ENTRY_02 */
+    ret = cfstore_create_test_KV_change(&cfstore_create_test_01_data[0], &cfstore_create_test_01_data[1]);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Failed to increase size of KV (ret=%d).\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+
+    /* step 4. Now check that the KVs are all present and correct */
+    node = cfstore_create_test_01_data_step_02;
+    while(node->key_name != NULL)
+    {
+        ret = cfstore_test_check_node_correct(node);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:node (key_name=\"%s\", value=\"%s\") not correct in cfstore\n", __func__, node->key_name, node->value);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+        node++;
+    }
+    /* revert CFSTORE_LOG for more trace */
+    CFSTORE_DBGLOG("KV successfully increased in size and other KVs remained unchanged.%s", "\n");
+
+    /* Shrink the KV from KV MID_ENTRY_02 to MID_ENTRY_03 */
+    ret = cfstore_create_test_KV_change(&cfstore_create_test_01_data[1], &cfstore_create_test_01_data[2]);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Failed to decrease size of KV (ret=%d).\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+
+    /* Step 5. Now check that the KVs are all present and correct */
+    node = cfstore_create_test_01_data_step_03;
+    while(node->key_name != NULL)
+    {
+        ret = cfstore_test_check_node_correct(node);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:node (key_name=\"%s\", value=\"%s\") not correct in cfstore\n", __func__, node->key_name, node->value);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+        node++;
+    }
+    /* revert CFSTORE_LOG for more trace */
+    CFSTORE_DBGLOG("KV successfully decreased in size and other KVs remained unchanged.%s", "\n");
+
+    /* Delete the KV */
+    ret = cfstore_test_delete(cfstore_create_test_01_data[2].key_name);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:failed to delete node(key_name=\"%s\")\n", __func__, node->key_name);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+
+    /* Now check that the KVs are all present and correct */
+    node = cfstore_create_test_01_data_step_04;
+    while(node->key_name != NULL)
+    {
+        ret = cfstore_test_check_node_correct(node);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:node (key_name=\"%s\", value=\"%s\") not correct in cfstore\n", __func__, node->key_name, node->value);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+        node++;
+    }
+
+    free(test_buf1);
+    ret = drv->Uninitialize();
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_create_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: Uninitialize() call failed.\n", __func__);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_create_utest_msg_g);
+    return CaseNext;
+}
+
+
 /// @cond CFSTORE_DOXYGEN_DISABLE
 utest::v1::status_t greentea_setup(const size_t number_of_cases)
 {
@@ -682,10 +828,11 @@ Case cases[] = {
         Case("CREATE_test_03_end", cfstore_create_test_03_end),
         Case("CREATE_test_04_start", cfstore_utest_default_start),
         Case("CREATE_test_04_end", cfstore_create_test_04_end),
-        Case("CREATE_test_05_start", cfstore_utest_default_start),
-        Case("CREATE_test_05_end", cfstore_create_test_05_end),
+        Case("CREATE_test_05", cfstore_create_test_05),
         Case("CREATE_test_06_start", cfstore_utest_default_start),
         Case("CREATE_test_06_end", cfstore_create_test_06_end),
+        Case("CREATE_test_07_start", cfstore_utest_default_start),
+        Case("CREATE_test_07_end", cfstore_create_test_07_end),
 };
 
 

features/storage/FEATURE_STORAGE/TESTS/cfstore/find/find.cpp

@@ -428,6 +428,77 @@ control_t cfstore_find_test_06_end(const size_t call_count)
     CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: find_count=%d doesnt match the number of entries in match table = %d.\n", __func__, (int) find_count, (int) (sizeof(cfstore_find_test_06_data_match_results)/sizeof(cfstore_kv_data_t))-1);
     TEST_ASSERT_MESSAGE(find_count == (sizeof(cfstore_find_test_06_data_match_results)/sizeof(cfstore_kv_data_t))-1, cfstore_find_utest_msg_g);
 
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: expected ret == ARM_CFSTORE_DRIVER_ERROR_KEY_NOT_FOUND, but ret = %d.\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret == ARM_CFSTORE_DRIVER_ERROR_KEY_NOT_FOUND, cfstore_find_utest_msg_g);
+
+    ret = drv->Uninitialize();
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: Uninitialize() call failed.\n", __func__);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_find_utest_msg_g);
+    return CaseNext;
+}
+
+/**
+ * @brief   test case to check Find() with previous NULL pointer works
+ *
+ * @return on success returns CaseNext to continue to next test case, otherwise will assert on errors.
+ */
+control_t cfstore_find_test_07_end(const size_t call_count)
+{
+    const char* key_name_query = "0123456789abcdef0123456.y*";
+    char key_name[CFSTORE_KEY_NAME_MAX_LENGTH+1];
+    uint8_t len = CFSTORE_KEY_NAME_MAX_LENGTH+1;
+    int32_t ret = ARM_DRIVER_ERROR;
+    int32_t find_count = 0;
+    ARM_CFSTORE_DRIVER* drv = &cfstore_driver;
+    ARM_CFSTORE_HANDLE_INIT(next);
+    cfstore_kv_data_t* node = NULL;
+
+    ret = cfstore_test_create_table(cfstore_find_test_06_data);
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Failed to add cfstore_find_test_06_data table data (ret=%d).\n", __func__, (int) ret);
+    TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_find_utest_msg_g);
+
+    while(true)
+    {
+
+        ret = drv->Find(key_name_query, NULL, next);
+        if(ret == ARM_CFSTORE_DRIVER_ERROR_KEY_NOT_FOUND) {
+            /* no more attributes found matching search criteria.*/
+           break;
+        }
+
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: Find() failed(ret=%d).\n", __func__, (int) ret);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_find_utest_msg_g);
+
+        len = CFSTORE_KEY_NAME_MAX_LENGTH+1;
+        ret = drv->GetKeyName(next, key_name, &len);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: failed to get key name for next (ret=%d).\n", __func__, (int) ret);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_find_utest_msg_g);
+
+        CFSTORE_LOG("%s:Found entry key_name=%s\n", __func__, key_name);
+        node = cfstore_find_test_06_data_match_results;
+        while(node->key_name != NULL){
+            if(strncmp(node->key_name, key_name, CFSTORE_KEY_NAME_MAX_LENGTH) == 0){
+                find_count++;
+                break;
+            }
+            node++;
+        }
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: unable to find match in match table for %s.\n", __func__, key_name);
+        TEST_ASSERT_MESSAGE(node->key_name != NULL, cfstore_find_utest_msg_g);
+
+        /* delete the KV so it wont be found when queried is repeated*/
+        ret = drv->Delete(next);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: Delete() on next handled failed(ret=%d).\n", __func__, (int) ret);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_find_utest_msg_g);
+
+        ret = drv->Close(next);
+        CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: Close() on next handled failed(ret=%d).\n", __func__, (int) ret);
+        TEST_ASSERT_MESSAGE(ret >= ARM_DRIVER_OK, cfstore_find_utest_msg_g);
+    }
+
+    CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: find_count=%d doesnt match the number of entries in match table = %d.\n", __func__, (int) find_count, (int) (sizeof(cfstore_find_test_06_data_match_results)/sizeof(cfstore_kv_data_t))-1);
+    TEST_ASSERT_MESSAGE(find_count == (sizeof(cfstore_find_test_06_data_match_results)/sizeof(cfstore_kv_data_t))-1, cfstore_find_utest_msg_g);
+
     CFSTORE_TEST_UTEST_MESSAGE(cfstore_find_utest_msg_g, CFSTORE_UTEST_MSG_BUF_SIZE, "%s:Error: expected ret == ret == ARM_CFSTORE_DRIVER_ERROR_KEY_NOT_FOUND, but ret = %d.\n", __func__, (int) ret);
     TEST_ASSERT_MESSAGE(ret == ARM_CFSTORE_DRIVER_ERROR_KEY_NOT_FOUND, cfstore_find_utest_msg_g);
 
@@ -458,6 +529,8 @@ Case cases[] = {
         Case("FIND_test_05_end", cfstore_find_test_05_end),
         Case("FIND_test_06_start", cfstore_utest_default_start),
         Case("FIND_test_06_end", cfstore_find_test_06_end),
+        Case("FIND_test_07_start", cfstore_utest_default_start),
+        Case("FIND_test_07_end", cfstore_find_test_07_end),
 };
 
 

features/storage/FEATURE_STORAGE/TESTS/cfstore/flush/flush.cpp

@@ -585,8 +585,19 @@ static void cfstore_flush_fsm_state_set(cfstore_fsm_t* fsm, cfstore_flush_fsm_st
 static control_t cfstore_flush_test_02_k64f(void)
 {
     cfstore_flush_ctx_t* ctx = cfstore_flush_ctx_get();
+    ARM_CFSTORE_CAPABILITIES caps;
+    const ARM_CFSTORE_DRIVER* drv = &cfstore_driver;
 
     CFSTORE_FENTRYLOG("%s:entered: \r\n", __func__);
+    memset(&caps, 0, sizeof(caps));
+    caps = drv->GetCapabilities();
+    if(caps.asynchronous_ops == false){
+        /* This is a async mode only test. If this test is not built for sync mode, then skip testing return true
+         * This means the test will conveniently pass when run in CI as part of async mode testing */
+        CFSTORE_LOG("*** Skipping test as binary built for flash journal sync mode, and this test is async-only%s", "\n");
+        return CaseNext;
+    }
+
     cfstore_flush_ctx_init(ctx);
     cfstore_flush_fsm_state_set(&ctx->fsm, cfstore_flush_fsm_state_initializing, ctx);
     return CaseTimeout(CFSTORE_FLUSH_GREENTEA_TIMEOUT_S*1000);

features/storage/FEATURE_STORAGE/cfstore/source/cfstore_config.h

@@ -56,4 +56,10 @@
 #define CFSTORE_CONFIG_BACKEND_FLASH_ENABLED
 #endif
 
+// todo: fixup for storage driver using more than the STORAGE_xxx namespace:
+#if defined DEVICE_STORAGE_CONFIG_HARDWARE_MTD_K64F_ASYNC_OPS
+#define CFSTORE_STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS DEVICE_STORAGE_CONFIG_HARDWARE_MTD_K64F_ASYNC_OPS
+#endif
+
+
 #endif /*__CFSTORE_CONFIG_H*/

features/storage/FEATURE_STORAGE/cfstore/source/cfstore_debug.h

@@ -28,6 +28,7 @@
   }while(0);
 
 #define noCFSTORE_DEBUG
+//#define CFSTORE_DEBUG
 #ifdef CFSTORE_DEBUG
 
 extern uint32_t cfstore_optDebug_g;

features/storage/FEATURE_STORAGE/cfstore/source/cfstore_test.c

@@ -374,17 +374,12 @@ int32_t cfstore_test_delete_all(void)
             CFSTORE_ERRLOG("%s:Error: failed to delete key_name=%s, len=%d\r\n", __func__, key_name, (int) len);
             return ret;
         }
-        ret = drv->Close(next);
-        if(ret < ARM_DRIVER_OK){
-            CFSTORE_ERRLOG("%s:Error: failed to close key_name=%s, len=%d\r\n", __func__, key_name, (int) len);
-            return ret;
-        }
+        CFSTORE_HANDLE_SWAP(prev, next);
     }
     if(ret == ARM_CFSTORE_DRIVER_ERROR_KEY_NOT_FOUND) {
         /* as expected, no more keys have been found by the Find()*/
         ret = ARM_DRIVER_OK;
     }
-    // todo: find portable format specification CFSTORE_FENTRYLOG("%s:exiting (ret=%ld).\r\n", __func__, ret);
     CFSTORE_FENTRYLOG("%s:exiting (ret=%d).\r\n", __func__, (int) ret);
     return ret;
 }

features/storage/FEATURE_STORAGE/cfstore/source/configuration_store.c

@@ -242,7 +242,7 @@ static int32_t cfstore_fsm_state_set(cfstore_fsm_t* fsm, cfstore_fsm_state_t new
 static int32_t cfstore_get_key_name_ex(cfstore_area_hkvt_t *hkvt, char* key_name, uint8_t *key_name_len);
 
 
-/* Walking Area HKVT's While Inserted a New HKVT:
+/* Walking Area HKVT's While Inserting   a New HKVT:
  * Implementation Note 1 [NOTE1]
  *
  * The implementation must address the following problem:
@@ -259,11 +259,6 @@ static int32_t cfstore_get_key_name_ex(cfstore_area_hkvt_t *hkvt, char* key_name
  * - The Find() walk is terminated when the hkvt header pointer is found to
  *   point to cfstore_ctx_g.area_0_tail i.e. when this arises then the
  *   iterator knows its come to the end of the hkvt's in the area.
- * - When inserting a new KV, the last operation to be performed is to
- *   update cfstore_ctx_g.area_0_tail to point to the new tail. This
- *   operation also reveals the new KV to other operations including
- *   the Find(). All the header, key, value and tail data for the
- *   HKVT must be setup correctly before the tail pointer is updated.
  *
  * Memory Management (todo: future support)
  * Implementation Note 2 [NOTE2]
@@ -336,8 +331,9 @@ static int32_t cfstore_get_key_name_ex(cfstore_area_hkvt_t *hkvt, char* key_name
  *          to facilitate reading/writing to flash.
  *          - accessed in app & intr context; hence needs CS protection.
  *
- * @param   area_0_end
- *          pointer to end area_0 of area_0 memblock (last memory address).
+ * @param   area_0_len
+ *          length of the area used for storing KVs, including padding to
+ *          round to nearest program unit
  *
  * @param   rw_area0_lock
  *          lock used to make CS re-entrant e.g. only 1 flush operation can be
@@ -372,6 +368,7 @@ typedef struct cfstore_ctx_t
     ARM_POWER_STATE power_state;
     uint8_t *area_0_head;
     uint8_t *area_0_tail;
+    size_t area_0_len;
     cfstore_fsm_t fsm;
     int32_t status;
 
@@ -440,11 +437,11 @@ typedef struct cfstore_flash_journal_error_code_node
 /*
  * Globals
  */
-#ifndef STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS
+#ifndef CFSTORE_STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS
 static ARM_CFSTORE_CAPABILITIES cfstore_caps_g = { .asynchronous_ops = 1, .uvisor_support_enabled = 0 };
 #else
-static ARM_CFSTORE_CAPABILITIES cfstore_caps_g = { .asynchronous_ops = STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS, .uvisor_support_enabled = 0 };
-#endif /* STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS */
+static ARM_CFSTORE_CAPABILITIES cfstore_caps_g = { .asynchronous_ops = CFSTORE_STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS, .uvisor_support_enabled = 0 };
+#endif /* CFSTORE_STORAGE_DRIVER_CONFIG_HARDWARE_MTD_ASYNC_OPS */
 
 static const ARM_DRIVER_VERSION cfstore_driver_version_g = { .api = ARM_CFSTORE_API_VERSION, .drv = ARM_CFSTORE_DRV_VERSION };
 
@@ -573,16 +570,6 @@ static void cfstore_client_notify_data_init(cfstore_client_notify_data_t* data,
  * cfstore_ctx_t methods
  */
 
-/* @brief   helper function to reset cfstore_ctx_g state when out of memory is received from malloc */
-static void cfstore_ctx_reset(cfstore_ctx_t* ctx)
-{
-    CFSTORE_ASSERT(ctx!= NULL);
-    CFSTORE_INIT_LIST_HEAD(&ctx->file_list);
-    ctx->area_0_head = NULL;
-    ctx->area_0_tail = NULL;
-    return;
-}
-
 /* @brief   helper function to report whether the initialisation flag has been set in the cfstore_ctx_g */
 static bool cfstore_ctx_is_initialised(cfstore_ctx_t* ctx)
 {
@@ -602,8 +589,15 @@ static inline cfstore_ctx_t* cfstore_ctx_get(void)
 #endif
 }
 
-/* @brief   helper function to compute the size of the sram area in bytes */
-static ARM_CFSTORE_SIZE cfstore_ctx_get_area_len(void)
+/** @brief   helper function to compute the total size of the KVs stored in the
+ *           sram area in bytes.
+ *
+ * Note:
+ *  - sram_area_size =  cfstore_ctx_get_kv_total_len() + padding
+ *  - padding rounds up cfstore_ctx_get_kv_total_len() to
+ *    be a multiple of flash program_unit size.
+ */
+static ARM_CFSTORE_SIZE cfstore_ctx_get_kv_total_len(void)
 {
     ARM_CFSTORE_SIZE size = 0;
     cfstore_ctx_t* ctx = cfstore_ctx_get();
@@ -732,7 +726,7 @@ void *cfstore_realloc(void *ptr, ARM_CFSTORE_SIZE size)
 #endif /* CFSTORE_YOTTA_CFG_CFSTORE_SRAM_ADDR */
 
 
-#ifdef TARGET_LIKE_X86_LINUX_NATIVE
+#ifdef CFSTORE_TARGET_LIKE_X86_LINUX_NATIVE
 static inline void cfstore_critical_section_init(CFSTORE_LOCK* lock){ *lock = 0; }
 static inline void cfstore_critical_section_lock(CFSTORE_LOCK* lock, const char* tag){ (void) tag; __sync_fetch_and_add(lock, 1); }
 static inline void cfstore_critical_section_unlock(CFSTORE_LOCK* lock, const char* tag){(void) tag;  __sync_fetch_and_sub(lock, 1); }
@@ -818,14 +812,14 @@ static CFSTORE_INLINE int32_t cfstore_hkvt_refcount_inc(cfstore_area_hkvt_t* hkv
     return ret;
 }
 
-#endif /* TARGET_LIKE_X86_LINUX_NATIVE */
+#endif /* CFSTORE_TARGET_LIKE_X86_LINUX_NATIVE */
 
 
 /*
  * security/permissions helper functions
  */
-#ifdef noCFG_CFSTORE_UVISOR
 
+#ifdef YOTTA_CFG_CFSTORE_UVISOR
 /**
  * @brief   check that a client (cfstore-uvisor client box) is the "owner" of the
  *          KV. Owner means the client that can create or created the KV. This is
@@ -921,7 +915,7 @@ static int32_t cfstore_is_client_kv_owner(const char* key_name, int32_t* cfstore
 {
     CFSTORE_FENTRYLOG("%s:entered\n", __func__);
 /*
-    #ifdef YOTTA_CFG_CFSTORE_UVISOR
+#ifdef YOTTA_CFG_CFSTORE_UVISOR
     return cfstore_uvisor_is_client_kv_owner(key_name, cfstore_uvisor_box_id);
 #else
     return ARM_DRIVER_OK;
@@ -956,7 +950,7 @@ static bool cfstore_is_kv_client_deletable(cfstore_file_t* file)
     return true;
 }
 
-#ifdef YOTTA_CFG_CFSTORE_UVISOR_to_debug
+#ifdef YOTTA_CFG_CFSTORE_UVISOR
 /* @brief   helper function to determine whether this cfstore-uvisor client box can read a given KV */
 static bool cfstore_is_kv_client_readable(cfstore_area_hkvt_t* hkvt)
 {
@@ -1038,7 +1032,7 @@ static bool cfstore_is_kv_client_executable(cfstore_area_hkvt_t* hkvt)
     }
     return bret;
 }
-#endif  // YOTTA_CFG_CFSTORE_UVISOR_to_debug
+#endif  /* YOTTA_CFG_CFSTORE_UVISOR */
 
 /* @brief   helper function to determine whether this client can read a given KV */
 static bool cfstore_is_kv_client_readable(cfstore_area_hkvt_t* hkvt)
@@ -1306,7 +1300,29 @@ static int32_t cfstore_get_next_hkvt(cfstore_area_hkvt_t* prev, cfstore_area_hkv
 
 static CFSTORE_INLINE void cfstore_hkvt_dump(cfstore_area_hkvt_t* hkvt, const char* tag);
 
-/* set the tail pointer */
+/** @brief  Set the context tail pointer area_0_tail to point to the end of the
+ *          last KV in the memory area.
+ *
+ * This function walks hkvt entries in the KV area to find the memory
+ * address after the end of the last KV, and then sets the area tail pointer
+ * area_0_tail to that address. The function therefore relies on the
+ * head, key, value, tail fields being correct.
+ *
+ * Notes:
+ * - This function should only be called after the memory area is loaded from
+ *   flash and the area_0_tail pointer needs setting. The only way to do this
+ *   (at the present time) is to walk the list of KVs, which is what this function
+ *   does. The only other place the code sets area_0_tail is cfstore_realloc_ex(),
+ *   and this state of affairs shouldnt change i.e. its unnecessary for
+ *   other functions to change area_0_tail.
+ * - When loading the area_0 image from falsh, cfstore_realloc_ex() is used
+ *   to allocate the memory with ctx->expected_blob_size as the size. Thus
+ *   area_0_tail will be initially set to
+ *     area_0_tail = area_0_head + expected_blob_size       (1)
+ *   and thereby may include padding used to align the area size to a
+ *   flash program unit boundary. cfstore_flash_set_tail() is used to
+ *   set area_0_tail correctly.
+ */
 static int32_t cfstore_flash_set_tail(void)
 {
     int32_t ret = ARM_DRIVER_ERROR;
@@ -1315,20 +1331,31 @@ static int32_t cfstore_flash_set_tail(void)
     uint8_t* tail = NULL;
     cfstore_area_hkvt_t hkvt;
 
-    /* walk the area to find the last KV */
     CFSTORE_FENTRYLOG("%s:entered: \n", __func__);
     CFSTORE_ASSERT(ctx != NULL);
     cfstore_hkvt_init(&hkvt);
+
+    /* Check for cases where the tail pointer is already set correctly
+     * e.g. where the area is of zero length */
+    if(cfstore_ctx_get_kv_total_len() == 0) {
+        /* tail pointer already set correctly */
+        return ARM_DRIVER_OK;
+    }
     ptr = ctx->area_0_head;
-    /* ctx->area_0_tail has been set to the end of the sram area allocated, but this is now refined so
-     * as to point to the end of the last KV */
     tail = ctx->area_0_tail;
-    while(ptr < tail) {
+    while(ptr <= tail) {
+        CFSTORE_FENTRYLOG("%s:ptr=%p, tail=%p: \n", __func__, ptr, tail);
         hkvt = cfstore_get_hkvt_from_head_ptr(ptr);
+        if(cfstore_hkvt_is_valid(&hkvt, tail) == false) {
+            CFSTORE_ERRLOG("%s:Error:found invalid hkvt entry in area\n", __func__);
+            break;
+        }
         cfstore_hkvt_dump(&hkvt, __func__);
-        /* when the length between the hkvt.tail and tail (set to the end of the area including padding)
+        /* when the length between the hkvt.tail and tail
          * is less than the minimum KV length then we have found the last KV, and can set the
-         * area_0_tail correctly to the end of the last KV */
+         * area_0_tail correctly to the end of the last KV. This works OK for the present support
+         * (where flash_program_unit ~ sizeof(cfstore_area_header_t)) but may need
+         * revisiting where flash_program_unit > sizeof(cfstore_area_header_t) */
         if((uint32_t)(tail - hkvt.tail) < sizeof(cfstore_area_header_t)){
             /* ptr is last KV in area as there isn't space for another header  */
             ctx->area_0_tail = hkvt.tail;
@@ -1340,6 +1367,116 @@ static int32_t cfstore_flash_set_tail(void)
     return ret;
 }
 
+
+/** @brief  Function to realloc the SRAM area used to store KVs.
+ *
+ * This function consolidates the code needed to:
+ * - realloc the memory
+ * - when the start of the SRAM area moves, update data structures
+ *   which point into SRAM area (e.g. open files cfstore_file_t head pointers).
+ *
+ * The function assumes:
+ * - the cfstore_file_t::head pointers are valid i.e. point to the
+ *   correct locations in the KV area for each file.
+ *
+ * @param   size
+ * total KV size in bytes storage required. Note this does not include
+ * padding to round up to the nearest multiple of flash program unit
+ * as this is computed and added in this function.
+ *
+ * @param   allocated_size
+ * total size in bytes that was allocated (value returned to caller).
+ * This may be larger than the requested size due to rounding to align with a
+ * flash program unit boundary.
+ */
+static int32_t cfstore_realloc_ex(ARM_CFSTORE_SIZE size, uint64_t *allocated_size)
+{
+    uint8_t* ptr = NULL;
+    int32_t ret = ARM_DRIVER_ERROR;
+    int32_t len_diff = 0;
+    cfstore_ctx_t* ctx = cfstore_ctx_get();
+    cfstore_file_t* file;
+    cfstore_list_node_t* node;
+    cfstore_list_node_t* file_list = &ctx->file_list;
+    ARM_CFSTORE_SIZE total_kv_size = size;
+
+    /* Switch on the size of the sram area to create:
+     * - if size > 0 (but may be shrinking) then use REALLOC.
+     * - if size == 0 then the area is being deleted so free the memory
+     * Note:
+     * - realloc can return NULL when the last KV is deleted
+     * - It also appears that realloc can return non-zero ptr when size = 0.
+     *   Hence for this case free() is used.
+     */
+    CFSTORE_FENTRYLOG("%s:entered:\n", __func__);
+    CFSTORE_TP(CFSTORE_TP_MEM, "%s:cfstore_ctx_g.area_0_head=%p, cfstore_ctx_g.area_0_tail=%p, cfstore_ctx_g.area_0_len=%d, size=%d, \n", __func__, ctx->area_0_head, ctx->area_0_tail, (int) ctx->area_0_len, (int) size);
+
+    if(size > 0)
+    {
+        /* In the general case (size % program_unit > 0). The new area_0 size is
+         * aligned to a flash program_unit boundary to facilitate r/w to flash
+         * and so the memory realloc size is calculated to align, as follows */
+        if(size % cfstore_ctx_get_program_unit(ctx) > 0){
+            size += (cfstore_ctx_get_program_unit(ctx) - (size % cfstore_ctx_get_program_unit(ctx)));
+        }
+
+        ptr = (uint8_t*) CFSTORE_REALLOC((void*) ctx->area_0_head, size);
+        if(ptr == NULL){
+            CFSTORE_ERRLOG("%s:Error: unable to allocate memory (size=%d)\n", __func__, (int) size);
+            /* realloc() has failed to allocate the required memory object. If previously
+             * allocation has been made, the old memory object remains allocated. On error, the client
+             * is expected to clean up including making a call to Uninitialize() which will free the
+             * old memory object.
+             */
+            return ARM_CFSTORE_DRIVER_ERROR_OUT_OF_MEMORY;
+        }
+        /* check realloc() hasn't move area in memory from cfstore_ctx_g.area_0_head */
+        if(ptr != ctx->area_0_head){
+            /* realloc() has moved the area in memory */
+            CFSTORE_TP(CFSTORE_TP_MEM, "%s: realloc() has moved memory area and area_0_head ptr must change. old cfstore_ctx_g.area_0_head=%p, new head ptr=%p)\n", __func__, ctx->area_0_head, ptr);
+
+            /* now have to walk the file list updating head pointers to point into the realloc-ed
+             * To begin with, leave the relative position of the file pointers unaltered */
+            node = file_list->next;
+            while(node != file_list){
+                file = (cfstore_file_t*) node;
+                file->head = (uint8_t *) (file->head - ctx->area_0_head);
+                file->head = (uint8_t *) ((int32_t) file->head + (int32_t) ptr);
+                node = node->next;
+            }
+            ctx->area_0_head = ptr;
+        }
+
+        /* If the area is growing then zero the new space at the end of the area */
+        len_diff = size - (int32_t) ctx->area_0_len;
+        if(len_diff > 0) {
+            memset(ptr + ctx->area_0_len, 0, len_diff);
+        }
+        /* Set area_0_tail to be the memory address after the end of the last KV in the memory area.
+         * This is the only place that area_0_tail should be changed, apart from cfstore_flash_set_tail()
+         * which is only called when attributes are loaded from flash.
+         */
+        ctx->area_0_len = size;
+        ctx->area_0_tail = ptr + total_kv_size;
+        if(allocated_size != NULL) {
+            *allocated_size = size;
+        }
+    }
+    else
+    {
+        /* size = 0 so delete the memory */
+        CFSTORE_FREE((void*) ctx->area_0_head);
+        ctx->area_0_head = NULL;
+        ctx->area_0_tail = NULL;
+        ctx->area_0_len = 0;
+    }
+    CFSTORE_TP(CFSTORE_TP_MEM, "%s:cfstore_ctx_g.area_0_head=%p, cfstore_ctx_g.area_0_tail=%p\n", __func__, ctx->area_0_head, ctx->area_0_tail);
+    ret = ARM_DRIVER_OK;
+    return ret;
+
+}
+
+
 #ifdef CFSTORE_CONFIG_BACKEND_FLASH_ENABLED
 
 /*
@@ -1464,7 +1601,6 @@ static int32_t cfstore_fsm_init_on_entry(void* context)
     CFSTORE_FENTRYLOG("%s:entered\n", __func__);
 
     ret = FlashJournal_initialize(&ctx->jrnl, drv, &FLASH_JOURNAL_STRATEGY_SEQUENTIAL, cfstore_flash_journal_callback);
-    CFSTORE_FENTRYLOG("%s:here\n", __func__);
     CFSTORE_TP(CFSTORE_TP_FSM, "%s:FlashJournal_initialize ret=%d\n", __func__, (int) ret);
     if(ret < ARM_DRIVER_OK){
         CFSTORE_ERRLOG("%s:Error: failed to initialize flash journaling layer (ret=%d)\n", __func__, (int) ret);
@@ -1520,7 +1656,6 @@ static int32_t cfstore_fsm_initing(void* context)
  */
 static int32_t cfstore_fsm_read_on_entry(void* context)
 {
-    uint8_t* ptr = NULL;
     int32_t ret = 0;
     FlashJournal_Status_t status = JOURNAL_STATUS_ERROR;
     cfstore_ctx_t* ctx = (cfstore_ctx_t*) context;
@@ -1535,32 +1670,18 @@ static int32_t cfstore_fsm_read_on_entry(void* context)
         cfstore_fsm_state_set(&ctx->fsm, cfstore_fsm_state_ready, ctx);
         ret = ARM_CFSTORE_DRIVER_ERROR_INTERNAL;
         goto out;
-
     }
     if(ctx->info.sizeofJournaledBlob > 0)
     {
-        /* setup the expected blob size for writing
-         * This is a multiple of program unit so the write doesnt fail due to unaligned log */
+        /* setup the expected blob size for writing */
         ctx->expected_blob_size = ctx->info.sizeofJournaledBlob;
-        if(ctx->expected_blob_size % ctx->info.program_unit > 0){
-            ctx->expected_blob_size += (ctx->info.program_unit - (ctx->info.sizeofJournaledBlob % ctx->info.program_unit));
-        }
-        /* grow the area by the size of the stored blob */
-        ptr = (uint8_t*) CFSTORE_REALLOC((void*) ctx->area_0_head, ctx->expected_blob_size);
-        if(ptr == NULL){
-            CFSTORE_ERRLOG("%s:Error: unable to allocate memory (size=%lu)\n", __func__, (long unsigned int) ctx->info.sizeofJournaledBlob);
-            cfstore_ctx_reset(ctx);
-            ret = ARM_CFSTORE_DRIVER_ERROR_OUT_OF_MEMORY;
+        ret = cfstore_realloc_ex(ctx->expected_blob_size, &ctx->expected_blob_size);
+        if(ret < ARM_DRIVER_OK){
+            CFSTORE_ERRLOG("%s:Error: cfstore_realloc_ex() failed (ret=%d)\n", __func__, (int) ret);
             /* move to ready state. cfstore client is expected to Uninitialize() before further calls */
             cfstore_fsm_state_set(&ctx->fsm, cfstore_fsm_state_ready, ctx);
             goto out;
         }
-        memset(ptr, 0, ctx->expected_blob_size);
-        if(ptr != ctx->area_0_head){
-            CFSTORE_TP(CFSTORE_TP_FSM, "%s:cfstore_ctx_g.area_0_head pointer changed (cfstore_ctx_g.area_0_head=%p, ptr=%p)\n", __func__, ctx->area_0_head, ptr);
-            ctx->area_0_head = ptr;
-            ctx->area_0_tail = ctx->area_0_head + ctx->info.sizeofJournaledBlob;
-        }
         ret = FlashJournal_read(&ctx->jrnl, (void*) ctx->area_0_head, ctx->info.sizeofJournaledBlob);
         if(ret < ARM_DRIVER_OK){
             CFSTORE_ERRLOG("%s:Error: failed to initialize flash journaling layer (ret=%d)\n", __func__, (int) ret);
@@ -1692,7 +1813,7 @@ int32_t cfstore_fsm_log_on_entry(void* context)
         return cfstore_flash_map_error(status);
     }
     /* compute the expected_blob_size = area_size plus the padding at the end of the area to align with program_unit*/
-    ctx->expected_blob_size = cfstore_ctx_get_area_len();
+    ctx->expected_blob_size = cfstore_ctx_get_kv_total_len();
     if(ctx->expected_blob_size % info.program_unit > 0){
         ctx->expected_blob_size += (info.program_unit - (ctx->expected_blob_size % info.program_unit));
     }
@@ -2111,82 +2232,86 @@ static int32_t cfstore_flash_flush(cfstore_ctx_t* ctx)
 
 #endif /* CFSTORE_CONFIG_BACKEND_FLASH_ENABLED */
 
-/** @brief  internal delete helper function.
- *  @note   must be called within critical section.
- */
-static int32_t cfstore_delete_ex(cfstore_area_hkvt_t* hkvt)
+
+/** @brief  After a cfstore KV area memmove() operation, update the file pointers
+ *          to reflect the new location in memory of KVs.
+ *
+ * @param   head
+ * the position at which size_diff bytes have been inserted/deleted
+ *
+ * @param   size_diff
+ * Change in size (size difference) of the KV memory area.
+ *  - size_diff > 0 => increase in area, |size_diff| bytes have been inserted at head,
+ *    and the previously following KVs shifted up to higher memory addresses
+ *  - size_diff < 0 => decrease in area, |size_diff| bytes have been removed at head,
+ *    and the previously following KVs shifted down to lower memory addresses
+ * */
+static int32_t cfstore_file_update(uint8_t* head, int32_t size_diff)
 {
-    uint8_t* ptr = NULL;
-    int32_t ret = ARM_DRIVER_ERROR;
-    ARM_CFSTORE_SIZE kv_size = 0;
-    ARM_CFSTORE_SIZE area_size = 0;
-    ARM_CFSTORE_SIZE realloc_size = 0;      /* size aligned to flash program_unit size */
     cfstore_ctx_t* ctx = cfstore_ctx_get();
     cfstore_file_t* file;
     cfstore_list_node_t* node;
     cfstore_list_node_t* file_list = &ctx->file_list;
 
+    CFSTORE_FENTRYLOG("%s:entered:(ctx->area_0_head=%p, ctx->area_0_tail=%p)\n", __func__, ctx->area_0_head, ctx->area_0_tail);
+
+    /* walk the file list updating head pointers for the KVs that remain*/
+    node = file_list->next;
+    while(node != file_list){
+        /* Any KV positioned later in the area than the deleted KV will require file head pointers updating.
+         * If file's head pointer is beyond the deleted KV tail then the file->head needs to be updated
+         * to reflect the memove
+         */
+        file = (cfstore_file_t*) node;
+        if(file->head >= head){
+            /* sign of sign_diff used to move file->head up/down in memory*/
+            file->head += size_diff;
+        }
+        node = node->next;
+    }
+    return ARM_DRIVER_OK;
+}
+
+
+static int32_t cfstore_delete_ex(cfstore_area_hkvt_t* hkvt)
+{
+    int32_t ret = ARM_DRIVER_ERROR;
+    ARM_CFSTORE_SIZE kv_size = 0;
+    ARM_CFSTORE_SIZE kv_total_size = 0;
+    ARM_CFSTORE_SIZE realloc_size = 0;      /* size aligned to flash program_unit size */
+    cfstore_ctx_t* ctx = cfstore_ctx_get();
+
     CFSTORE_FENTRYLOG("%s:entered:(ctx->area_0_head=%p, ctx->area_0_tail=%p)\n", __func__, ctx->area_0_head, ctx->area_0_tail);
     kv_size  = cfstore_hkvt_get_size(hkvt);
-    area_size = cfstore_ctx_get_area_len();
+    kv_total_size = cfstore_ctx_get_kv_total_len();
+
+    /* Note the following:
+     *  1. memmove() above shifts the position of the KVs falling after the deleted KV to be at
+     *     lower memory addresses. The code (A) updates the cfstore_file_t::head pointers for these KVs
+     *     so they point to the new locations.
+     *  2. The operation at 1. above has to happen before the realloc because realloc() can move the
+     *     start of heap block to a new location, in which case all cfstore_file_t::head pointers
+     *     need to be updated. cfstore_realloc() can only do this starting from a set of correct
+     *     cfstore_file_t::head pointers i.e. after 1. has been completed.
+     */
     memmove(hkvt->head, hkvt->tail, ctx->area_0_tail - hkvt->tail);
     /* zero the deleted KV memory */
     memset(ctx->area_0_tail-kv_size, 0, kv_size);
 
-    /* In the general case the new ((area_size - kv_size) % program_unit > 0). The new area_size is
-     * aligned to a program_unit boundary to facilitate r/w to flash and so the memory realloc size
-     * is calculated to align, as follows */
-    /* setup the reallocation memory size. */
-    realloc_size = area_size - kv_size;
-    if(realloc_size % cfstore_ctx_get_program_unit(ctx) > 0){
-        realloc_size += (cfstore_ctx_get_program_unit(ctx) - (realloc_size % cfstore_ctx_get_program_unit(ctx)));
+    /* The KV area has shrunk so a negative size_diff should be indicated to cfstore_file_update(). */
+    ret = cfstore_file_update(hkvt->head, -1 * kv_size);
+    if(ret < ARM_DRIVER_OK){
+        CFSTORE_ERRLOG("%s:Error:file update failed\n", __func__);
+        goto out0;
     }
-    /* realloc() can return non-zero ptr for size = 0 when the last KV is deleted */
-    if(realloc_size > 0)
-    {
-        ptr = (uint8_t*) CFSTORE_REALLOC((void*) ctx->area_0_head, realloc_size);
-        /* realloc can return NULL when the last KV is deleted.
-         * It also appears that realloc can return non-zero ptr even when realloc_size = 0 */
-        if(ptr == NULL){
-            CFSTORE_ERRLOG("%s:Error:realloc failed\n", __func__);
-            cfstore_ctx_reset(ctx);
-            return ARM_CFSTORE_DRIVER_ERROR_OUT_OF_MEMORY;
-        }
-        /* check realloc() hasnt move area in memory from cfstore_ctx_g.area_0_head */
-        if(ptr != ctx->area_0_head){
-            CFSTORE_TP(CFSTORE_TP_DELETE, "%s: cfstore_ctx_g.area_0_head pointer changed (cfstore_ctx_g.area_0_head=%p, cfstore_ctx_g.area_0_tail=%p)\n", __func__, ctx->area_0_head, ptr);
-            /* realloc() has moved the area in memory */
-            ctx->area_0_head = ptr;
-        }
-        /* set tail to be the end of the new area, which will be updated by cfstore_flash_set_tail */
-        ctx->area_0_tail = ptr + area_size - kv_size;
-        ret = cfstore_flash_set_tail();
-        if(ret < ARM_DRIVER_OK){
-            CFSTORE_ERRLOG("%s:Error: cfstore_flash_set_tail() failed (ret=%d)\n", __func__, (int) ret);
-            goto out0;
-        }
 
-        /* now have to walk the file list updating head pointers for the KVs that remain*/
-        node = file_list->next;
-        while(node != file_list){
-            /* Any KV positioned later in the area than the deleted KV will require file head pointers updating.
-             * If file's head pointer is beyond the deleted KV tail then the file->head needs to be updated
-             * to reflect the memove */
-            file = (cfstore_file_t*) node;
-            if(file->head >= hkvt->head){
-                file->head -= kv_size;
-            }
-            node = node->next;
-        }
+    /* setup the reallocation memory size. */
+    realloc_size = kv_total_size - kv_size;
+    ret = cfstore_realloc_ex(realloc_size, NULL);
+    if(ret < ARM_DRIVER_OK){
+        CFSTORE_ERRLOG("%s:Error:realloc failed\n", __func__);
+        goto out0;
     }
-    else
-    {
-        /* realloc_size = 0 */
-        CFSTORE_FREE((void*) ctx->area_0_head);
-        ctx->area_0_head = NULL;
-        ctx->area_0_tail = NULL;
-    }
-    ret = ARM_DRIVER_OK;
 out0:
     return ret;
 }
@@ -2238,7 +2363,7 @@ static int32_t cfstore_file_destroy(cfstore_file_t* file)
         CFSTORE_ASSERT(cfstore_hkvt_is_valid(&hkvt, cfstore_ctx_get()->area_0_tail) == true);
         ret = ARM_DRIVER_OK;
         cfstore_hkvt_refcount_dec(&hkvt, &refcount);
-        CFSTORE_TP(CFSTORE_TP_FILE, "%s:refcount =%d\n", __func__, (int)refcount);
+        CFSTORE_TP(CFSTORE_TP_FILE, "%s:refcount =%d file->head=%p\n", __func__, (int)refcount, file->head);
         if(refcount == 0){
             /* check for delete */
             CFSTORE_TP(CFSTORE_TP_FILE, "%s:checking delete flag\n", __func__);
@@ -2693,7 +2818,7 @@ static int32_t cfstore_get_value_len(ARM_CFSTORE_HANDLE hkey, ARM_CFSTORE_SIZE *
         goto out0;
     }
     /* getting a value len doesnt change the sram area so this can happen independently of
-     * an oustanding async operation. its unnecessary to check the fsm state */
+     * an outstanding async operation. its unnecessary to check the fsm state */
     ret = cfstore_validate_handle(hkey);
     if(ret < ARM_DRIVER_OK){
         CFSTORE_ERRLOG("%s:Error: invalid handle.\n", __func__);
@@ -2724,8 +2849,8 @@ out0:
 /* @brief   debug trace a struct cfstore_area_hkvt_t, providing values for key field. */
 static CFSTORE_INLINE void cfstore_hkvt_dump(cfstore_area_hkvt_t* hkvt, const char* tag)
 {
-/* #define noSymbol */
-#ifdef noSymbol
+/* #define CFSTORE_HKVT_DUMP_ON */
+#ifdef CFSTORE_HKVT_DUMP_ON
     char kname[CFSTORE_KEY_NAME_MAX_LENGTH+1];
     char value[CFSTORE_KEY_NAME_MAX_LENGTH+1];
     uint32_t klen = 0;
@@ -2757,7 +2882,7 @@ static CFSTORE_INLINE void cfstore_hkvt_dump(cfstore_area_hkvt_t* hkvt, const ch
     (void) hkvt;
     (void) tag;
 
-#endif /*  noSymbol */
+#endif /*  CFSTORE_HKVT_DUMP_ON */
 }
 
 static CFSTORE_INLINE void cfstore_flags_dump(ARM_CFSTORE_FMODE flag, const char* tag)
@@ -2779,7 +2904,8 @@ static CFSTORE_INLINE void cfstore_flags_dump(ARM_CFSTORE_FMODE flag, const char
 
 static CFSTORE_INLINE void cfstore_file_dump(cfstore_file_t* file, const char* tag)
 {
-#ifdef noSymbol
+/*#define CFSTORE_FILE_DUMP_ON */
+#ifdef CFSTORE_FILE_DUMP_ON
     cfstore_area_hkvt_t hkvt;
 
     CFSTORE_TP(CFSTORE_TP_VERBOSE3, "%s:*** Dumping File Contents : Start ***\n", tag);
@@ -2794,7 +2920,7 @@ static CFSTORE_INLINE void cfstore_file_dump(cfstore_file_t* file, const char* t
     (void) file;
     (void) tag;
 
-#endif /*  noSymbol */
+#endif /*  CFSTORE_FILE_DUMP_ON */
 }
 
 /* dump sram contents of cfstore in a useful manner for debugging */
@@ -3056,7 +3182,8 @@ static int32_t cfstore_find(const char* key_name_query, const ARM_CFSTORE_HANDLE
             ret = ARM_CFSTORE_DRIVER_ERROR_INVALID_HANDLE;
             goto out1;
         }
-    } else if(!cfstore_file_is_empty(previous)){
+    } else if(previous != NULL && !cfstore_file_is_empty(previous)){
+        CFSTORE_TP(CFSTORE_TP_FIND, "%s:Invalid previous hkey buffer.\n", __func__);
         ret = ARM_CFSTORE_DRIVER_ERROR_INVALID_HANDLE_BUF;
         goto out1;
     }
@@ -3123,8 +3250,10 @@ out1:
  * @note rw_lock must be held by the caller of this function rw_area0_lock */
 static int32_t cfstore_recreate(const char* key_name, ARM_CFSTORE_SIZE value_len, ARM_CFSTORE_HANDLE hkey, cfstore_area_hkvt_t* hkvt)
 {
-    uint8_t* ptr = NULL;
+    uint8_t* old_area_0_head = NULL;
     int32_t kv_size_diff = 0;
+    int32_t ret = ARM_DRIVER_ERROR;
+    size_t memmove_len = 0;
     ARM_CFSTORE_SIZE area_size = 0;
     ARM_CFSTORE_FMODE flags;
     cfstore_ctx_t* ctx = cfstore_ctx_get();
@@ -3141,48 +3270,51 @@ static int32_t cfstore_recreate(const char* key_name, ARM_CFSTORE_SIZE value_len
         return ARM_DRIVER_OK;
     }
 
+    /* grow the area by the size of the new KV */
+    area_size = cfstore_ctx_get_kv_total_len();
+    /* store the area_0_head, and move length for later updating hkvt if realloc moves KV area */
+    old_area_0_head = ctx->area_0_head;
+    memmove_len = ctx->area_0_tail - hkvt->tail;
+
     CFSTORE_TP(CFSTORE_TP_CREATE, "%s:cfstore_ctx_g.area_0_head=%p, cfstore_ctx_g.area_0_tail=%p\n", __func__, ctx->area_0_head, ctx->area_0_tail);
     CFSTORE_TP(CFSTORE_TP_CREATE, "%s:sizeof(header)=%d, sizeof(key)=%d, sizeof(value)=%d, kv_size_diff=%d, area_size=%d\n", __func__, (int) sizeof(cfstore_area_header_t),  (int)(strlen(key_name)), (int)value_len, (int) kv_size_diff, (int) area_size);
-
-    /* grow the area by the size of the new KV */
-    area_size = cfstore_ctx_get_area_len();
     if (kv_size_diff < 0){
         /* value blob size shrinking => do memmove() before realloc() which will free memory */
-        memmove(hkvt->tail + kv_size_diff, hkvt->tail, ctx->area_0_tail - hkvt->tail);
-        //todo: wip: do we have to update file pointers for KVs after the one thats changed size?
+        memmove(hkvt->tail + kv_size_diff, hkvt->tail, memmove_len);
+        ret = cfstore_file_update(hkvt->head, kv_size_diff);
+        if(ret < ARM_DRIVER_OK){
+            CFSTORE_ERRLOG("%s:Error:file update failed\n", __func__);
+            goto out0;
+        }
     }
-    ptr = (uint8_t*) CFSTORE_REALLOC((void*) ctx->area_0_head, area_size + kv_size_diff);
-    if(ptr == NULL){
-        CFSTORE_ERRLOG("%s:realloc failed for key_name=%s\n", __func__, key_name);
-        cfstore_ctx_reset(ctx);
-        return ARM_CFSTORE_DRIVER_ERROR_OUT_OF_MEMORY;
+
+    ret = cfstore_realloc_ex(area_size + kv_size_diff, NULL);
+    if(ret < ARM_DRIVER_OK){
+        CFSTORE_ERRLOG("%s:Error:file realloc failed\n", __func__);
+        goto out0;
     }
-    if(ptr != ctx->area_0_head){
-        CFSTORE_TP(CFSTORE_TP_CREATE, "%s:cfstore_ctx_g.area_0_head pointer changed (cfstore_ctx_g.area_0_head=%p, cfstore_ctx_g.area_0_tail=%p)\n", __func__, ctx->area_0_head, ptr);
-        /* This covers the cases where CFSTORE_REALLOC() has moved the area in memory
-         * As realloc() has caused the memory to move, hkvt needs re-initialising */
-        hkvt->head += ptr - ctx->area_0_head;
-        hkvt->key += ptr - ctx->area_0_head;
-        hkvt->value +=  ptr - ctx->area_0_head;
-        hkvt->tail += ptr - ctx->area_0_head;
-        /* Set head and tail to old relative position in new area */
-        ctx->area_0_head = ptr;
-        ctx->area_0_tail = ctx->area_0_head + area_size;
-        //todo: wip: do we have to update file pointers for KVs after the memory has moved?
+    if(old_area_0_head != ctx->area_0_head){
+        /* As realloc() has caused the memory to move, hkvt needs re-initialising */
+        hkvt->head += ctx->area_0_head - old_area_0_head;
+        hkvt->key += ctx->area_0_head - old_area_0_head;
+        hkvt->value +=  ctx->area_0_head - old_area_0_head;
+        hkvt->tail += ctx->area_0_head - old_area_0_head;
     }
 
     if(kv_size_diff > 0) {
         /* value blob size growing requires memmove() after realloc() */
-        memset(ctx->area_0_tail, 0, kv_size_diff);
-        memmove(hkvt->tail+kv_size_diff, hkvt->tail, ctx->area_0_tail - hkvt->tail);
-        //todo: wip: do we have to update file pointers for KVs after the one thats changed size?
+        memmove(hkvt->tail+kv_size_diff, hkvt->tail, memmove_len);
+        ret = cfstore_file_update(hkvt->head, kv_size_diff);
+        if(ret < ARM_DRIVER_OK){
+            CFSTORE_ERRLOG("%s:Error:file update failed\n", __func__);
+            goto out0;
+        }
     }
     /* hkvt->head, hkvt->key and hkvt->value remain unchanged but hkvt->tail has moved. Update it.*/
     hkvt->tail = hkvt->tail + kv_size_diff;
 
     /* set the new value length in the header */
     cfstore_hkvt_set_value_len(hkvt, value_len);
-    ctx->area_0_tail = ctx->area_0_head + area_size + kv_size_diff;
     cfstore_file_create(hkvt, flags, hkey, &ctx->file_list);
     ctx->area_dirty_flag = true;
 
@@ -3190,7 +3322,9 @@ static int32_t cfstore_recreate(const char* key_name, ARM_CFSTORE_SIZE value_len
     cfstore_hkvt_dump(hkvt, __func__);
     cfstore_dump_contents(__func__);
 #endif
-    return ARM_DRIVER_OK;
+    ret = ARM_DRIVER_OK;
+out0:
+    return ret;
 }
 
 
@@ -3198,7 +3332,6 @@ static int32_t cfstore_recreate(const char* key_name, ARM_CFSTORE_SIZE value_len
 static int32_t cfstore_create(const char* key_name, ARM_CFSTORE_SIZE value_len, const ARM_CFSTORE_KEYDESC* kdesc, ARM_CFSTORE_HANDLE hkey)
 {
     bool b_acl_default = false;
-    uint8_t* ptr = NULL;
     int32_t ret = ARM_DRIVER_ERROR;
     int32_t cfstore_uvisor_box_id = 0;
     ARM_CFSTORE_SIZE area_size = 0;
@@ -3288,39 +3421,14 @@ static int32_t cfstore_create(const char* key_name, ARM_CFSTORE_SIZE value_len,
      * In the general case the new ((area_size + kv_size) % program_unit > 0). The new area_size is
      * aligned to a program_unit boundary to facilitate r/w to flash and so the memory realloc size
      * is calculated to align, as follows */
-    area_size = cfstore_ctx_get_area_len();
-    // moved to flash_init() and program_unit stored in ctx
-    /*
-    status = FlashJournal_getInfo(&ctx->jrnl, &info);
-    if(status < JOURNAL_STATUS_OK){
-        CFSTORE_TP(CFSTORE_TP_CREATE, "%s:Error: failed get journal info (status=%d)\n", __func__, (int) status);
-        ret = cfstore_flash_map_error(status);
-        goto out1;
-    }
-    */
+    area_size = cfstore_ctx_get_kv_total_len();
     /* setup the reallocation memory size. */
     realloc_size = area_size + kv_size;
-    if(realloc_size % cfstore_ctx_get_program_unit(ctx) > 0){
-        realloc_size += (cfstore_ctx_get_program_unit(ctx) - (realloc_size % cfstore_ctx_get_program_unit(ctx)));
-    }
-    ptr = (uint8_t*) CFSTORE_REALLOC((void*) ctx->area_0_head, realloc_size);
-    if(ptr == NULL){
-        CFSTORE_ERRLOG("%s:realloc failed for key_name=%s\n", __func__, key_name);
-        cfstore_ctx_reset(ctx);
-        ret = ARM_CFSTORE_DRIVER_ERROR_OUT_OF_MEMORY;
+    ret = cfstore_realloc_ex(realloc_size, NULL);
+    if(ret < ARM_DRIVER_OK){
+        CFSTORE_ERRLOG("%s:Error:file realloc failed\n", __func__);
         goto out1;
     }
-    if(ptr != ctx->area_0_head){
-        CFSTORE_TP(CFSTORE_TP_CREATE, "%s:cfstore_ctx_g.area_0_head pointer changed (cfstore_ctx_g.area_0_head=%p, cfstore_ctx_g.area_0_tail=%p)\n", __func__, ctx->area_0_head, ptr);
-        /* this covers the following cases:
-         * - this is the first KV insertion in the area, which is special as both area head/tail pointers need setting.
-         * - realloc() has move the area in memory */
-        ctx->area_0_head = ptr;
-        ctx->area_0_tail = ctx->area_0_head + area_size;
-    }
-
-    /* check realloc() hasnt move area in memory from cfstore_ctx_g.area_0_head*/
-    CFSTORE_TP(CFSTORE_TP_CREATE, "%s:cfstore_ctx_g.area_0_head=%p, ptr=%p\n", __func__, ctx->area_0_head, ptr);
 
     /* determine if should adopt a default behavior for acl permission setting */
     if(cfstore_acl_is_default(kdesc->acl)){
@@ -3329,8 +3437,8 @@ static int32_t cfstore_create(const char* key_name, ARM_CFSTORE_SIZE value_len,
         b_acl_default = true;
     }
     /* set the header up, then copy key_name into header */
-    memset(ctx->area_0_tail, 0, kv_size);
-    hdr = (cfstore_area_header_t*) ctx->area_0_tail;
+    hdr = (cfstore_area_header_t*) (ctx->area_0_head + area_size);
+    CFSTORE_FENTRYLOG("%s:hdr=%p\n", __func__, hdr);
     hdr->klength = (uint8_t) strlen(key_name);
     hdr->vlength = value_len;
     hdr->perm_owner_read = b_acl_default ? true : kdesc->acl.perm_owner_read;
@@ -3340,8 +3448,6 @@ static int32_t cfstore_create(const char* key_name, ARM_CFSTORE_SIZE value_len,
     hdr->perm_other_write = kdesc->acl.perm_other_write;
     hdr->perm_other_execute = kdesc->acl.perm_other_execute;
     strncpy((char*)hdr + sizeof(cfstore_area_header_t), key_name, strlen(key_name));
-    /* Updating the area_0_tail pointer reveals the inserted KV to other operations. See [NOTE1] for details.*/
-    ctx->area_0_tail = ctx->area_0_head + area_size + kv_size;
     hkvt = cfstore_get_hkvt_from_head_ptr((uint8_t*) hdr);
     if(cfstore_flags_is_default(kdesc->flags)){
         /* set as read-only by default default */
@@ -3817,6 +3923,9 @@ static int32_t cfstore_uninitialise(void)
     int32_t ret = ARM_DRIVER_ERROR;
     ARM_STORAGE_CAPABILITIES caps;
     cfstore_ctx_t* ctx = cfstore_ctx_get();
+    cfstore_file_t* file;
+    cfstore_list_node_t* node;
+    cfstore_list_node_t* file_list = &ctx->file_list;
 
     CFSTORE_FENTRYLOG("%s:entered\n", __func__);
     memset(&caps, 0, sizeof(caps));
@@ -3834,7 +3943,7 @@ static int32_t cfstore_uninitialise(void)
     }
     if(ctx->init_ref_count > 0) {
         ctx->init_ref_count--;
-        CFSTORE_TP(CFSTORE_TP_INIT, "%s:Debug: decemented init_ref_count (%d).\n", __func__, (int) ctx->init_ref_count);
+        CFSTORE_TP(CFSTORE_TP_INIT, "%s:Debug: decremented init_ref_count (%d).\n", __func__, (int) ctx->init_ref_count);
     }
     if(ctx->init_ref_count == 0)
     {
@@ -3842,10 +3951,14 @@ static int32_t cfstore_uninitialise(void)
         /* check file list is empty and if not, free the items */
         if(ctx->file_list.next != ctx->file_list.prev)
         {
-            /* list is not empty. walk the list and free the entries */
-            // todo: wip: free items on the file list
+            /* list is not empty. walk the list and close the files, cleaning up state */
+            node = file_list->next;
+            while(node != file_list){
+                file = (cfstore_file_t*) node;
+                cfstore_close((ARM_CFSTORE_HANDLE) file);
+                node = node->next;
+            }
         }
-
         ret = cfstore_flash_deinit();
         if(ret < ARM_DRIVER_OK){
             CFSTORE_ERRLOG("%s:Error: failed to uninitialise flash journal layer.\n", __func__);
@@ -4121,3 +4234,4 @@ ARM_CFSTORE_DRIVER cfstore_driver =
 };
 
 #endif /* YOTTA_CFG_CFSTORE_UVISOR */
+

features/storage/FEATURE_STORAGE/flash-journal/flash-journal-strategy-sequential/config.h

@@ -18,6 +18,8 @@
 #ifndef __FLASH_JOURNAL_CONFIG_H__
 #define __FLASH_JOURNAL_CONFIG_H__
 
+#ifndef SEQUENTIAL_FLASH_JOURNAL_MAX_LOGGED_BLOBS
 #define SEQUENTIAL_FLASH_JOURNAL_MAX_LOGGED_BLOBS 4
+#endif
 
 #endif /* __FLASH_JOURNAL_CONFIG_H__ */

hal/api/CAN.h

@@ -203,7 +203,9 @@ public:
         EpIrq,
         AlIrq,
         BeIrq,
-        IdIrq
+        IdIrq,
+
+        IrqCnt
     };
 
     /** Attach a function to call whenever a CAN frame received interrupt is
@@ -246,7 +248,7 @@ protected:
     virtual void lock();
     virtual void unlock();
     can_t               _can;
-    Callback<void()>    _irq[9];
+    Callback<void()>    _irq[IrqCnt];
     PlatformMutex       _mutex;
 };
 

hal/api/CThunk.h

@@ -32,12 +32,13 @@
 #define __CTHUNK_H__
 
 #define CTHUNK_ADDRESS 1
+#define CTHUNK_VARIABLES volatile uint32_t code[2]
 
-#if (defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__thumb2__)) && ! defined(__CORTEX_A9)
-#define CTHUNK_VARIABLES volatile uint32_t code[1]
+#if (defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__CORTEX_M7) || defined(__CORTEX_A9))
 /**
-* CTHUNK disassembly for Cortex-M3/M4 (thumb2):
-* * ldm.w pc,{r0,r1,r2,pc}
+* CTHUNK disassembly for Cortex-M3/M4/M7/A9 (thumb2):
+* * adr  r0, #4
+* * ldm  r0, {r0, r1, r2, pc}
 *
 * This instruction loads the arguments for the static thunking function to r0-r2, and
 * branches to that function by loading its address into PC.
@@ -45,23 +46,21 @@
 * This is safe for both regular calling and interrupt calling, since it only touches scratch registers
 * which should be saved by the caller, and are automatically saved as part of the IRQ context switch.
 */
-#define CTHUNK_ASSIGMENT m_thunk.code[0] = 0x8007E89F
-
-#elif defined(__CORTEX_M0PLUS) || defined(__CORTEX_M0) || defined(__CORTEX_A9)
-/*
-* CTHUNK disassembly for Cortex M0 (thumb):
-* * push {r0,r1,r2,r3,r4,lr} save touched registers and return address
-* * movs r4,#4 set up address to load arguments from (immediately following this code block) (1)
-* * add r4,pc set up address to load arguments from (immediately following this code block) (2)
-* * ldm r4!,{r0,r1,r2,r3} load arguments for static thunk function
-* * blx r3 call static thunk function
-* * pop {r0,r1,r2,r3,r4,pc} restore scratch registers and return from function
-*/
-#define CTHUNK_VARIABLES volatile uint32_t code[3]
 #define CTHUNK_ASSIGMENT do {                              \
-                             m_thunk.code[0] = 0x2404B51F; \
-                             m_thunk.code[1] = 0xCC0F447C; \
-                             m_thunk.code[2] = 0xBD1F4798; \
+                             m_thunk.code[0] = 0xE890A001; \
+                             m_thunk.code[1] = 0x00008007; \
+                         } while (0)
+
+#elif (defined(__CORTEX_M0PLUS) || defined(__CORTEX_M0))
+/*
+* CTHUNK disassembly for Cortex M0/M0+ (thumb):
+* * adr  r0, #4
+* * ldm  r0, {r0, r1, r2, r3}
+* * bx   r3
+*/
+#define CTHUNK_ASSIGMENT do {                              \
+                             m_thunk.code[0] = 0xC80FA001; \
+                             m_thunk.code[1] = 0x00004718; \
                          } while (0)
 
 #else
@@ -225,6 +224,13 @@ class CThunk
                 __ca9u_inv_tlb_all();
                 __v7_inv_btac();
             }
+#endif
+#if defined(__CORTEX_M7)
+            /* Data cache clean and invalid */
+            SCB_CleanInvalidateDCache();
+
+            /* Instruction cache invalid */
+            SCB_InvalidateICache();
 #endif
             __ISB();
             __DSB();

hal/api/CallChain.h

@@ -17,6 +17,7 @@
 #define MBED_CALLCHAIN_H
 
 #include "Callback.h"
+#include "toolchain.h"
 #include <string.h>
 
 namespace mbed {
@@ -87,10 +88,17 @@ public:
      *
      *  @returns
      *  The function object created for 'obj' and 'method'
+     *
+     *  @deprecated
+     *  The add function does not support cv-qualifiers. Replaced by
+     *  add(callback(obj, method)).
      */
     template<typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The add function does not support cv-qualifiers. Replaced by "
+        "add(callback(obj, method)).")
     pFunctionPointer_t add(T *obj, M method) {
-        return add(Callback<void()>(obj, method));
+        return add(callback(obj, method));
     }
 
     /** Add a function at the beginning of the chain
@@ -109,10 +117,17 @@ public:
      *
      *  @returns
      *  The function object created for 'tptr' and 'mptr'
+     *
+     *  @deprecated
+     *  The add_front function does not support cv-qualifiers. Replaced by
+     *  add_front(callback(obj, method)).
      */
     template<typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The add_front function does not support cv-qualifiers. Replaced by "
+        "add_front(callback(obj, method)).")
     pFunctionPointer_t add_front(T *obj, M method) {
-        return add_front(Callback<void()>(obj, method));
+        return add_front(callback(obj, method));
     }
 
     /** Get the number of functions in the chain

hal/api/FunctionPointer.h

@@ -43,6 +43,18 @@ public:
     R (*get_function())(A1) {
         return *reinterpret_cast<R (**)(A1)>(this);
     }
+
+    R call(A1 a1) const {
+        if (!Callback<R(A1)>::operator bool()) {
+            return (R)0;
+        }
+
+        return Callback<R(A1)>::call(a1);
+    }
+
+    R operator()(A1 a1) const {
+        return Callback<R(A1)>::call(a1);
+    }
 };
 
 template <typename R>
@@ -62,6 +74,18 @@ public:
     R (*get_function())() {
         return *reinterpret_cast<R (**)()>(this);
     }
+
+    R call() const {
+        if (!Callback<R()>::operator bool()) {
+            return (R)0;
+        }
+
+        return Callback<R()>::call();
+    }
+
+    R operator()() const {
+        return Callback<R()>::call();
+    }
 };
 
 typedef FunctionPointerArg1<void, void> FunctionPointer;

hal/api/InterruptIn.h

@@ -24,6 +24,7 @@
 #include "gpio_irq_api.h"
 #include "Callback.h"
 #include "critical.h"
+#include "toolchain.h"
 
 namespace mbed {
 
@@ -88,11 +89,17 @@ public:
      *
      *  @param obj pointer to the object to call the member function on
      *  @param method pointer to the member function to be called
+     *  @deprecated
+     *      The rise function does not support cv-qualifiers. Replaced by
+     *      rise(callback(obj, method)).
      */
     template<typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The rise function does not support cv-qualifiers. Replaced by "
+        "rise(callback(obj, method)).")
     void rise(T *obj, M method) {
         core_util_critical_section_enter();
-        rise(Callback<void()>(obj, method));
+        rise(callback(obj, method));
         core_util_critical_section_exit();
     }
 
@@ -106,11 +113,17 @@ public:
      *
      *  @param obj pointer to the object to call the member function on
      *  @param method pointer to the member function to be called
+     *  @deprecated
+     *      The rise function does not support cv-qualifiers. Replaced by
+     *      rise(callback(obj, method)).
      */
     template<typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The fall function does not support cv-qualifiers. Replaced by "
+        "fall(callback(obj, method)).")
     void fall(T *obj, M method) {
         core_util_critical_section_enter();
-        fall(Callback<void()>(obj, method));
+        fall(callback(obj, method));
         core_util_critical_section_exit();
     }
 

hal/api/SerialBase.h

@@ -23,6 +23,7 @@
 #include "Stream.h"
 #include "Callback.h"
 #include "serial_api.h"
+#include "toolchain.h"
 
 #if DEVICE_SERIAL_ASYNCH
 #include "CThunk.h"
@@ -55,7 +56,9 @@ public:
 
     enum IrqType {
         RxIrq = 0,
-        TxIrq
+        TxIrq,
+
+        IrqCnt
     };
 
     enum Flow {
@@ -101,10 +104,16 @@ public:
      *  @param obj pointer to the object to call the member function on
      *  @param method pointer to the member function to be called
      *  @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty)
+     *  @deprecated
+     *      The attach function does not support cv-qualifiers. Replaced by
+     *      attach(callback(obj, method), type).
      */
     template<typename T>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The attach function does not support cv-qualifiers. Replaced by "
+        "attach(callback(obj, method), type).")
     void attach(T *obj, void (T::*method)(), IrqType type=RxIrq) {
-        attach(Callback<void()>(obj, method), type);
+        attach(callback(obj, method), type);
     }
 
     /** Attach a member function to call whenever a serial interrupt is generated
@@ -112,10 +121,16 @@ public:
      *  @param obj pointer to the object to call the member function on
      *  @param method pointer to the member function to be called
      *  @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty)
+     *  @deprecated
+     *      The attach function does not support cv-qualifiers. Replaced by
+     *      attach(callback(obj, method), type).
      */
     template<typename T>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The attach function does not support cv-qualifiers. Replaced by "
+        "attach(callback(obj, method), type).")
     void attach(T *obj, void (*method)(T*), IrqType type=RxIrq) {
-        attach(Callback<void()>(obj, method), type);
+        attach(callback(obj, method), type);
     }
 
     /** Generate a break condition on the serial line
@@ -231,7 +246,7 @@ protected:
 #endif
 
     serial_t         _serial;
-    Callback<void()> _irq[2];
+    Callback<void()> _irq[IrqCnt];
     int              _baud;
 
 };

hal/api/Ticker.h

@@ -18,6 +18,7 @@
 
 #include "TimerEvent.h"
 #include "Callback.h"
+#include "toolchain.h"
 
 namespace mbed {
 
@@ -80,10 +81,16 @@ public:
      *  @param obj pointer to the object to call the member function on
      *  @param method pointer to the member function to be called
      *  @param t the time between calls in seconds
+     *  @deprecated
+     *      The attach function does not support cv-qualifiers. Replaced by
+     *      attach(callback(obj, method), t).
      */
     template<typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The attach function does not support cv-qualifiers. Replaced by "
+        "attach(callback(obj, method), t).")
     void attach(T *obj, M method, float t) {
-        attach(Callback<void()>(obj, method), t);
+        attach(callback(obj, method), t);
     }
 
     /** Attach a function to be called by the Ticker, specifiying the interval in micro-seconds
@@ -101,8 +108,14 @@ public:
      *  @param tptr pointer to the object to call the member function on
      *  @param mptr pointer to the member function to be called
      *  @param t the time between calls in micro-seconds
+     *  @deprecated
+     *      The attach_us function does not support cv-qualifiers. Replaced by
+     *      attach_us(callback(obj, method), t).
      */
     template<typename T, typename M>
+    MBED_DEPRECATED_SINCE("mbed-os-5.1",
+        "The attach_us function does not support cv-qualifiers. Replaced by "
+        "attach_us(callback(obj, method), t).")
     void attach_us(T *obj, M method, timestamp_t t) {
         attach_us(Callback<void()>(obj, method), t);
     }

hal/common/CAN.cpp

@@ -21,8 +21,15 @@
 
 namespace mbed {
 
+static void donothing() {}
+
 CAN::CAN(PinName rd, PinName td) : _can(), _irq() {
     // No lock needed in constructor
+
+    for (int i = 0; i < sizeof _irq / sizeof _irq[0]; i++) {
+        _irq[i].attach(donothing);
+    }
+
     can_init(&_can, rd, td);
     can_irq_init(&_can, (&CAN::_irq_handler), (uint32_t)this);
 }
@@ -100,6 +107,7 @@ void CAN::attach(Callback<void()> func, IrqType type) {
         _irq[(CanIrqType)type].attach(func);
         can_irq_set(&_can, (CanIrqType)type, 1);
     } else {
+        _irq[(CanIrqType)type].attach(donothing);
         can_irq_set(&_can, (CanIrqType)type, 0);
     }
     unlock();

hal/common/InterruptIn.cpp

@@ -19,11 +19,17 @@
 
 namespace mbed {
 
+static void donothing() {}
+
 InterruptIn::InterruptIn(PinName pin) : gpio(),
                                         gpio_irq(),
                                         _rise(),
                                         _fall() {
     // No lock needed in the constructor
+
+    _rise.attach(donothing);
+    _fall.attach(donothing);
+
     gpio_irq_init(&gpio_irq, pin, (&InterruptIn::_irq_handler), (uint32_t)this);
     gpio_init_in(&gpio, pin);
 }
@@ -50,7 +56,7 @@ void InterruptIn::rise(Callback<void()> func) {
         _rise.attach(func);
         gpio_irq_set(&gpio_irq, IRQ_RISE, 1);
     } else {
-        _rise.attach(NULL);
+        _rise.attach(donothing);
         gpio_irq_set(&gpio_irq, IRQ_RISE, 0);
     }
     core_util_critical_section_exit();
@@ -62,7 +68,7 @@ void InterruptIn::fall(Callback<void()> func) {
         _fall.attach(func);
         gpio_irq_set(&gpio_irq, IRQ_FALL, 1);
     } else {
-        _fall.attach(NULL);
+        _fall.attach(donothing);
         gpio_irq_set(&gpio_irq, IRQ_FALL, 0);
     }
     core_util_critical_section_exit();

hal/common/SerialBase.cpp

@@ -21,6 +21,8 @@
 
 namespace mbed {
 
+static void donothing() {};
+
 SerialBase::SerialBase(PinName tx, PinName rx) :
 #if DEVICE_SERIAL_ASYNCH
                                                  _thunk_irq(this), _tx_usage(DMA_USAGE_NEVER),
@@ -29,6 +31,10 @@ SerialBase::SerialBase(PinName tx, PinName rx) :
                                                 _serial(), _baud(9600) {
     // No lock needed in the constructor
 
+    for (int i = 0; i < sizeof _irq / sizeof _irq[0]; i++) {
+        _irq[i].attach(donothing);
+    }
+
     serial_init(&_serial, tx, rx);
     serial_irq_handler(&_serial, SerialBase::_irq_handler, (uint32_t)this);
 }
@@ -69,6 +75,7 @@ void SerialBase::attach(Callback<void()> func, IrqType type) {
         _irq[type].attach(func);
         serial_irq_set(&_serial, (SerialIrq)type, 1);
     } else {
+        _irq[type].attach(donothing);
         serial_irq_set(&_serial, (SerialIrq)type, 0);
     }
     core_util_critical_section_exit();

hal/common/mbed_alloc_wrappers.cpp

@@ -46,15 +46,23 @@ typedef struct {
     uint32_t pad;
 } alloc_info_t;
 
-static SingletonPtr<PlatformMutex> malloc_stats_mutex;
+#ifdef MBED_MEM_TRACING_ENABLED
 static SingletonPtr<PlatformMutex> mem_trace_mutex;
+#endif
+#ifdef MBED_HEAP_STATS_ENABLED
+static SingletonPtr<PlatformMutex> malloc_stats_mutex;
 static mbed_stats_heap_t heap_stats = {0, 0, 0, 0, 0};
+#endif
 
 void mbed_stats_heap_get(mbed_stats_heap_t *stats)
 {
+#ifdef MBED_HEAP_STATS_ENABLED
     malloc_stats_mutex->lock();
     memcpy(stats, &heap_stats, sizeof(mbed_stats_heap_t));
     malloc_stats_mutex->unlock();
+#else
+    memset(stats, 0, sizeof(mbed_stats_heap_t));
+#endif
 }
 
 /******************************************************************************/
@@ -67,9 +75,6 @@ void mbed_stats_heap_get(mbed_stats_heap_t *stats)
 #include "uvisor-lib/uvisor-lib.h"
 #endif/* FEATURE_UVISOR */
 
-// TODO: memory tracing doesn't work with uVisor enabled.
-#if !defined(FEATURE_UVISOR)
-
 extern "C" {
     void * __real__malloc_r(struct _reent * r, size_t size);
     void * __real__realloc_r(struct _reent * r, void * ptr, size_t size);
@@ -77,6 +82,9 @@ extern "C" {
     void* __real__calloc_r(struct _reent * r, size_t nmemb, size_t size);
 }
 
+// TODO: memory tracing doesn't work with uVisor enabled.
+#if !defined(FEATURE_UVISOR)
+
 extern "C" void * __wrap__malloc_r(struct _reent * r, size_t size) {
     void *ptr = NULL;
 #ifdef MBED_HEAP_STATS_ENABLED
@@ -167,6 +175,8 @@ extern "C" void __wrap__free_r(struct _reent * r, void * ptr) {
 #endif // #ifdef MBED_MEM_TRACING_ENABLED
 }
 
+#endif // if !defined(FEATURE_UVISOR)
+
 extern "C" void * __wrap__calloc_r(struct _reent * r, size_t nmemb, size_t size) {
     void *ptr = NULL;
 #ifdef MBED_HEAP_STATS_ENABLED
@@ -187,7 +197,6 @@ extern "C" void * __wrap__calloc_r(struct _reent * r, size_t nmemb, size_t size)
     return ptr;
 }
 
-#endif // if !defined(FEATURE_UVISOR)
 
 /******************************************************************************/
 /* ARMCC memory allocation wrappers                                           */
@@ -259,12 +268,12 @@ extern "C" void* $Sub$$realloc(void *ptr, size_t size) {
         free(ptr);
     }
 #else // #ifdef MBED_HEAP_STATS_ENABLED
-    mem_trace_mutex->lock();
     new_ptr = $Super$$realloc(ptr, size);
-    mem_trace_mutex->unlock();
 #endif // #ifdef MBED_HEAP_STATS_ENABLED
 #ifdef MBED_MEM_TRACING_ENABLED
+    mem_trace_mutex->lock();
     mbed_mem_trace_realloc(new_ptr, ptr, size, MBED_CALLER_ADDR());
+    mem_trace_mutex->unlock();
 #endif // #ifdef MBED_MEM_TRACING_ENABLED
     return new_ptr;
 }

hal/common/mbed_critical.c

@@ -86,6 +86,11 @@ void core_util_critical_section_exit(void)
 
 #if EXCLUSIVE_ACCESS
 
+/* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
+#if defined (__CC_ARM) 
+#pragma diag_suppress 3731
+#endif
+
 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
 {
     uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);

hal/common/retarget.cpp

@@ -480,10 +480,9 @@ extern "C" WEAK void __cxa_pure_virtual(void) {
 #endif
 
 #if defined(TOOLCHAIN_GCC)
-/* uVisor wraps malloc_r, realloc_r and free_r, but not calloc_r! */
-#ifndef  FEATURE_UVISOR
-
 
+#ifdef  FEATURE_UVISOR
+#include "uvisor-lib/uvisor-lib.h"
 #endif/* FEATURE_UVISOR */
 
 
@@ -713,6 +712,43 @@ extern "C" void __env_unlock( struct _reent *_r )
 {
     __rtos_env_unlock(_r);
 }
+
+#define CXA_GUARD_INIT_DONE             (1 << 0)
+#define CXA_GUARD_INIT_IN_PROGRESS      (1 << 1)
+#define CXA_GUARD_MASK                  (CXA_GUARD_INIT_DONE | CXA_GUARD_INIT_IN_PROGRESS)
+
+extern "C" int __cxa_guard_acquire(int *guard_object_p)
+{
+    uint8_t *guard_object = (uint8_t *)guard_object_p;
+    if (CXA_GUARD_INIT_DONE == (*guard_object & CXA_GUARD_MASK)) {
+        return 0;
+    }
+    singleton_lock();
+    if (CXA_GUARD_INIT_DONE == (*guard_object & CXA_GUARD_MASK)) {
+        singleton_unlock();
+        return 0;
+    }
+    MBED_ASSERT(0 == (*guard_object & CXA_GUARD_MASK));
+    *guard_object = *guard_object | CXA_GUARD_INIT_IN_PROGRESS;
+    return 1;
+}
+
+extern "C" void __cxa_guard_release(int *guard_object_p)
+{
+    uint8_t *guard_object = (uint8_t *)guard_object_p;
+    MBED_ASSERT(CXA_GUARD_INIT_IN_PROGRESS == (*guard_object & CXA_GUARD_MASK));
+    *guard_object = (*guard_object & ~CXA_GUARD_MASK) | CXA_GUARD_INIT_DONE;
+    singleton_unlock();
+}
+
+extern "C" void __cxa_guard_abort(int *guard_object_p)
+{
+    uint8_t *guard_object = (uint8_t *)guard_object_p;
+    MBED_ASSERT(CXA_GUARD_INIT_IN_PROGRESS == (*guard_object & CXA_GUARD_MASK));
+    *guard_object = *guard_object & ~CXA_GUARD_INIT_IN_PROGRESS;
+    singleton_unlock();
+}
+
 #endif
 
 void *operator new(std::size_t count)

hal/targets.json

@@ -624,11 +624,12 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["STM", "STM32F0", "STM32F031K6"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "progen": {"target": "nucleo-f031k6"},
         "detect_code": ["0791"],
-        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"]
     },
@@ -637,11 +638,12 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels": ["STM", "STM32F0", "STM32F042K6"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "progen": {"target": "nucleo-f042k6"},
         "detect_code": ["0785"],
-        "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"]
     },
@@ -690,7 +692,7 @@
         "inherits": ["Target"],
         "progen": {"target": "nucleo-f103rb"},
         "detect_code": ["0700"],
-        "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "NUCLEO_F207ZG": {
@@ -702,9 +704,9 @@
         "inherits": ["Target"],
         "progen": {"target": "nucleo-f207zg"},
         "detect_code": ["0835"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "features": ["IPV4"],
-        "release_versions": ["2"]
+        "release_versions": ["2", "5"]
     },
     "NUCLEO_F302R8": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
@@ -724,6 +726,7 @@
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32F3", "STM32F303K8"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "inherits": ["Target"],
         "progen": {"target": "nucleo-f303k8"},
@@ -744,6 +747,19 @@
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
+    "NUCLEO_F303ZE": {
+        "supported_form_factors": ["ARDUINO", "MORPHO"],
+        "core": "Cortex-M4F",
+        "fpu": "single",
+        "default_toolchain": "uARM",
+        "extra_labels": ["STM", "STM32F3", "STM32F303ZE"],
+        "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
+        "inherits": ["Target"],
+        "progen": {"target": "nucleo-f303ze"},
+        "detect_code": ["0745"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "release_versions": ["2"]
+    },
     "NUCLEO_F334R8": {
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M4F",
@@ -814,8 +830,8 @@
         "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "progen": {"target": "nucleo-f429zi"},
-        "macros": ["MBEDTLS_ENTROPY_HARDWARE_ALT"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "macros": ["MBEDTLS_ENTROPY_HARDWARE_ALT", "DEVICE_RTC_LSI=1"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "detect_code": ["0796"],
         "features": ["IPV4"],
         "release_versions": ["2", "5"]
@@ -842,7 +858,7 @@
         "progen": {"target": "nucleo-f446ze"},
         "detect_code": ["0778"],
         "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
-        "release_versions": ["2"]
+        "release_versions": ["2", "5"]
     },
 
     "B96B_F446VE": {
@@ -1022,18 +1038,20 @@
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["GCC_ARM"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
     },
     "DISCO_F334C8": {
         "inherits": ["Target"],
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32F3", "STM32F334C8"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "progen": {"target": "disco-f334c8"},
         "detect_code": ["0810"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
 	"release_versions": ["2"]
     },
@@ -1050,10 +1068,10 @@
         "core": "Cortex-M4F",
         "default_toolchain": "ARM",
         "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx"],
-        "macros": ["MBEDTLS_ENTROPY_HARDWARE_ALT"],
+        "macros": ["MBEDTLS_ENTROPY_HARDWARE_ALT", "DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "progen": {"target": "disco-f429zi"},
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "DISCO_F469NI": {
@@ -1093,6 +1111,18 @@
         "features": ["IPV4"],
         "release_versions": ["2", "5"]
     },
+    "DISCO_F769NI": {
+        "inherits": ["Target"],
+        "core": "Cortex-M7FD",
+        "extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
+        "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
+        "default_toolchain": "ARM",
+        "progen": {"target": "disco-f769ni"},
+        "detect_code": ["0817"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "features": ["IPV4"],
+        "release_versions": ["2"]
+    },
     "DISCO_L476VG": {
         "inherits": ["Target"],
         "core": "Cortex-M4F",
@@ -1101,7 +1131,7 @@
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "progen": {"target": "disco-l476vg"},
         "detect_code": ["0820"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "MTS_MDOT_F405RG": {
@@ -1148,10 +1178,11 @@
         "core": "Cortex-M3",
         "default_toolchain": "uARM",
         "extra_labels": ["STM", "STM32L1", "STM32L152RC"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
         "progen": {"target": "stm32l151rc"},
         "detect_code": ["4100"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"]
     },
@@ -1180,9 +1211,10 @@
         "default_toolchain": "uARM",
         "program_cycle_s": 1.5,
         "extra_labels": ["STM", "STM32L1", "STM32L151RC"],
+        "macros": ["DEVICE_RTC_LSI=1"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
         "progen": {"target": "stm32l151rc"},
-        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small"
     },
     "MCU_NRF51": {
@@ -1550,6 +1582,22 @@
         "extra_labels_add": ["NRF51_MICROBIT"],
         "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
     },
+    "MTM_MTCONNECT04S": {
+        "inherits": ["MCU_NRF51_32K"],
+        "progen": {"target": "mtm-mtconnect04s"},
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "release_versions": ["2"]
+    },
+    "MTM_MTCONNECT04S_BOOT": {
+        "inherits": ["MCU_NRF51_32K_BOOT"],
+        "extra_labels_add": ["MTM_CONNECT04S"],
+        "macros_add": ["TARGET_MTM_CONNECT04S"]
+    },
+    "MTM_MTCONNECT04S_OTA": {
+        "inherits": ["MCU_NRF51_32K_OTA"],
+        "extra_labels_add": ["MTM_CONNECT04S"],
+        "macros_add": ["TARGET_MTM_CONNECT04S"]
+    },
 
     "TY51822R3": {
         "inherits": ["MCU_NRF51_32K_UNIFIED"],
@@ -2001,6 +2049,34 @@
         "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"]
     },
+    "DELTA_DFBM_NQ620": {
+        "supported_form_factors": ["ARDUINO"],
+        "inherits": ["MCU_NRF52"],
+        "progen": {"target": "dfbm-nq620"},
+        "macros_add": [
+            "BOARD_PCA10040",
+            "NRF52_PAN_12",
+            "NRF52_PAN_15",
+            "NRF52_PAN_58",
+            "NRF52_PAN_55",
+            "NRF52_PAN_54",
+            "NRF52_PAN_31",
+            "NRF52_PAN_30",
+            "NRF52_PAN_51",
+            "NRF52_PAN_36",
+            "NRF52_PAN_53",
+            "S132",
+            "CONFIG_GPIO_AS_PINRESET",
+            "BLE_STACK_SUPPORT_REQD",
+            "SWI_DISABLE0",
+            "NRF52_PAN_20",
+            "NRF52_PAN_64",
+            "NRF52_PAN_62",
+            "NRF52_PAN_63"
+        ],
+        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "release_versions": ["2", "5"]
+    },
     "BLUEPILL_F103C8": {
         "core": "Cortex-M3",
         "default_toolchain": "GCC_ARM",

hal/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_CR/TARGET_LPC11U68/startup_LPC11U68.cpp

@@ -137,7 +137,8 @@ AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) {
 
 
 /* Reset entry point*/
-extern "C" void software_init_hook(void) __attribute__((weak));
+extern "C" void software_init_hook(void);
+extern "C" void pre_main(void) __attribute__((weak));
 
 AFTER_VECTORS void ResetISR(void) {
     unsigned int LoadAddr, ExeAddr, SectionLen;
@@ -169,9 +170,10 @@ AFTER_VECTORS void ResetISR(void) {
 
     
     SystemInit();
-    if (software_init_hook) 
-        software_init_hook(); 
-    else {
+    if (pre_main)  { // give control to the RTOS
+        software_init_hook();  // this will also call __libc_init_array
+    }
+    else {           // for BareMetal (non-RTOS) build
         __libc_init_array();
         main();
     }

hal/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp

@@ -113,7 +113,8 @@ extern unsigned int __data_section_table;
 extern unsigned int __data_section_table_end;
 extern unsigned int __bss_section_table_end;
 
-extern "C" void software_init_hook(void) __attribute__((weak));
+extern "C" void software_init_hook(void);
+extern "C" void pre_main(void) __attribute__((weak));
 
 AFTER_VECTORS void ResetISR(void) {
     unsigned int LoadAddr, ExeAddr, SectionLen;
@@ -136,9 +137,10 @@ AFTER_VECTORS void ResetISR(void) {
     }
     
     SystemInit();
-    if (software_init_hook) // give control to the RTOS
+    if (pre_main) { // give control to the RTOS
         software_init_hook(); // this will also call __libc_init_array
-    else {
+    }
+    else {          // for BareMetal (non-RTOS) build
         __libc_init_array();
         main();
     }

hal/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CR/TARGET_LPC11XX/startup_LPC11xx.cpp

@@ -113,7 +113,8 @@ extern unsigned int __data_section_table;
 extern unsigned int __data_section_table_end;
 extern unsigned int __bss_section_table_end;
 
-extern "C" void software_init_hook(void) __attribute__((weak));
+extern "C" void software_init_hook(void);
+extern "C" void pre_main(void) __attribute__((weak));
 
 AFTER_VECTORS void ResetISR(void) {
     unsigned int LoadAddr, ExeAddr, SectionLen;
@@ -136,9 +137,10 @@ AFTER_VECTORS void ResetISR(void) {
     }
     
     SystemInit();
-    if (software_init_hook) // give control to the RTOS
+    if (pre_main) { // give control to the RTOS
         software_init_hook(); // this will also call __libc_init_array
-    else {
+    }
+    else {          // for BareMetal (non-RTOS) build
         __libc_init_array();
         main();
     }
@@ -147,7 +149,7 @@ AFTER_VECTORS void ResetISR(void) {
 
 AFTER_VECTORS void NMI_Handler      (void) {while(1){}}
 AFTER_VECTORS void HardFault_Handler(void) {while(1){}}
-AFTER_VECTORS void SVC_Handler   (void) {while(1){}}
+AFTER_VECTORS void SVC_Handler      (void) {while(1){}}
 AFTER_VECTORS void PendSV_Handler   (void) {while(1){}}
 AFTER_VECTORS void SysTick_Handler  (void) {while(1){}}
 AFTER_VECTORS void IntDefaultHandler(void) {while(1){}}

hal/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/TOOLCHAIN_GCC_CR/startup_LPC15xx.cpp

@@ -166,7 +166,8 @@ AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) {
 
 
 /* Reset entry point*/
-extern "C" void software_init_hook(void) __attribute__((weak));
+extern "C" void software_init_hook(void);
+extern "C" void pre_main(void) __attribute__((weak));
 
 AFTER_VECTORS void ResetISR(void) {
     unsigned int LoadAddr, ExeAddr, SectionLen;
@@ -187,9 +188,10 @@ AFTER_VECTORS void ResetISR(void) {
     }
     
     SystemInit();
-    if (software_init_hook) 
-        software_init_hook(); 
-    else {
+    if (pre_main) { // give control to the RTOS
+        software_init_hook();  // this will also call __libc_init_array
+    }
+    else {          // for BareMetal (non-RTOS) build
         __libc_init_array();
         main();
     }

hal/targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_GCC_CR/startup_LPC17xx.cpp

@@ -130,7 +130,8 @@ AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) {
     for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = 0;
 }
 
-extern "C" void software_init_hook(void) __attribute__((weak));
+extern "C" void software_init_hook(void);
+extern "C" void pre_main(void) __attribute__((weak));
 
 AFTER_VECTORS void ResetISR(void) {
     unsigned int LoadAddr, ExeAddr, SectionLen;
@@ -151,9 +152,10 @@ AFTER_VECTORS void ResetISR(void) {
     }
     
     SystemInit();
-    if (software_init_hook) // give control to the RTOS
+    if (pre_main) { // give control to the RTOS
         software_init_hook(); // this will also call __libc_init_array
-    else {
+    }
+    else {          // for BareMetal (non-RTOS) build
         __libc_init_array();
         main();
     }

hal/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_CR/startup_lpc407x_8x.cpp

@@ -260,7 +260,8 @@ extern unsigned int __bss_section_table_end;
 // library.
 //*****************************************************************************
 
-extern "C" void software_init_hook(void) __attribute__((weak));
+extern "C" void software_init_hook(void);
+extern "C" void pre_main(void) __attribute__((weak));
 
 __attribute__ ((section(".after_vectors")))
 void
@@ -319,26 +320,15 @@ ResetISR(void) {
 		*pSCB_VTOR = (unsigned int)g_pfnVectors;
 	}
 
-//#ifdef __USE_CMSIS
-	SystemInit();
-//#endif
-  if (software_init_hook) // give control to the RTOS
-    software_init_hook(); // this will also call __libc_init_array
-  else {
-#if defined (__cplusplus)
-    //
-    // Call C++ library initialisation
-    //
-    __libc_init_array();
+    SystemInit();
+    if (pre_main) { // give control to the RTOS
+        software_init_hook(); // this will also call __libc_init_array
+    }
+    else {          // for BareMetal (non-RTOS) build
+        __libc_init_array();
+        main();
 #endif
-
-#if defined (__REDLIB__)
-    // Call the Redlib library, which in turn calls main()
-    __main() ;
-#else
-    main();
-#endif
-  }
+    }
 	//
 	// main() shouldn't return, but if it does, we'll just enter an infinite loop 
 	//

hal/targets/cmsis/TARGET_ONSEMI/TARGET_NCS36510/NCS36510.h

@@ -1,6 +1,6 @@
 /**************************************************************************/
 /**
- * @file     ARMCM3.h
+ * @file     NCS36510.h
  * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
  *           for CM3 Device Series
  * @version  V1.05

hal/targets/cmsis/TARGET_ONSEMI/TARGET_NCS36510/cmsis_nvic.c

@@ -7,9 +7,15 @@
 * $Rev: 0.1 $
 * $Date: 2015-11-06 $
 ******************************************************************************
-* @copyright (c) 2012 ON Semiconductor. All rights reserved.
-* ON Semiconductor is supplying this software for use with ON Semiconductor
-* processor based microcontrollers only.
+* Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
+* All rights reserved.  This software and/or documentation is licensed by ON Semiconductor
+* under limited terms and conditions.  The terms and conditions pertaining to the software
+* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
+* (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
+* if applicable the software license agreement.  Do not use this software and/or
+* documentation unless you have carefully read and you agree to the limited terms and
+* conditions.  By using this software and/or documentation, you agree to the limited
+* terms and conditions.
 *
 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
@@ -18,10 +24,11 @@
 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 * @endinternal
 *
-* @ingroup app
+* @ingroup 
 *
 * @details
 */
+
 #include <cmsis_nvic.h>
 
 #define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM

hal/targets/cmsis/TARGET_ONSEMI/TARGET_NCS36510/cmsis_nvic.h

@@ -7,9 +7,15 @@
 * $Rev: 0.1 $
 * $Date: 2015-11-06 $
 ******************************************************************************
-* @copyright (c) 2012 ON Semiconductor. All rights reserved.
-* ON Semiconductor is supplying this software for use with ON Semiconductor
-* processor based microcontrollers only.
+* Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
+* All rights reserved.  This software and/or documentation is licensed by ON Semiconductor
+* under limited terms and conditions.  The terms and conditions pertaining to the software
+* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
+* (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
+* if applicable the software license agreement.  Do not use this software and/or
+* documentation unless you have carefully read and you agree to the limited terms and
+* conditions.  By using this software and/or documentation, you agree to the limited
+* terms and conditions.
 *
 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
@@ -18,7 +24,7 @@
 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 * @endinternal
 *
-* @ingroup app
+* @ingroup 
 *
 * @details
 */

hal/targets/cmsis/TARGET_ONSEMI/TARGET_NCS36510/system_NCS36510.c

@@ -1,5 +1,5 @@
 /**************************************************************************//**
- * @file     system_ARMCM3.c
+ * @file     system_NCS36510.c
  * @brief    CMSIS Cortex-M3 Device System Source File
  *           for CM3 Device Series
  * @version  V1.05

hal/targets/cmsis/TARGET_ONSEMI/TARGET_NCS36510/system_NCS36510.h

@@ -1,5 +1,5 @@
 /**************************************************************************//**
- * @file     system_ARMCM3.h
+ * @file     system_NCS36510.h
  * @brief    CMSIS Cortex-M3 Device System Header File
  *           for CM3 Device Series
  * @version  V1.05

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_ARM_MICRO/startup_stm32f303xe.S

@@ -0,0 +1,407 @@
+;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
+;* File Name          : startup_stm32f303xe.s
+;* Author             : MCD Application Team
+;* Version            : V2.1.0
+;* Date               : 12-Sept-2014
+;* Description        : STM32F303xE devices vector table for MDK-ARM_MICRO toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+                EXPORT  __initial_sp
+                
+Stack_Mem       SPACE   Stack_Size
+__initial_sp    EQU     0x20004000 ; Top of RAM
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000400
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+                
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit    EQU (__initial_sp - Stack_Size)
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_TSC_IRQHandler              ; EXTI Line2 and Touch Sense controller
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_CAN_TX_IRQHandler          ; USB Device High Priority or CAN TX
+                DCD     USB_LP_CAN_RX0_IRQHandler         ; USB Device Low Priority or CAN RX0
+                DCD     CAN_RX1_IRQHandler                ; CAN RX1
+                DCD     CAN_SCE_IRQHandler                ; CAN SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger and Commutation and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger and Commutation
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     USB_HP_IRQHandler                 ; USB High Priority remap
+                DCD     USB_LP_IRQHandler                 ; USB Low Priority remap
+                DCD     USBWakeUp_RMP_IRQHandler          ; USB Wakeup remap through EXTI
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger and Commutation
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SPI4_IRQHandler                   ; SPI4
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]
+                EXPORT  PVD_IRQHandler                    [WEAK]
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]
+                EXPORT  FLASH_IRQHandler                  [WEAK]
+                EXPORT  RCC_IRQHandler                    [WEAK]
+                EXPORT  EXTI0_IRQHandler                  [WEAK]
+                EXPORT  EXTI1_IRQHandler                  [WEAK]
+                EXPORT  EXTI2_TSC_IRQHandler              [WEAK]
+                EXPORT  EXTI3_IRQHandler                  [WEAK]
+                EXPORT  EXTI4_IRQHandler                  [WEAK]
+                EXPORT  DMA1_Channel1_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel2_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel3_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel4_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel5_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel6_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel7_IRQHandler          [WEAK]
+                EXPORT  ADC1_2_IRQHandler                 [WEAK]
+                EXPORT  USB_HP_CAN_TX_IRQHandler          [WEAK]
+                EXPORT  USB_LP_CAN_RX0_IRQHandler         [WEAK]
+                EXPORT  CAN_RX1_IRQHandler                [WEAK]
+                EXPORT  CAN_SCE_IRQHandler                [WEAK]
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]
+                EXPORT  TIM1_BRK_TIM15_IRQHandler         [WEAK]
+                EXPORT  TIM1_UP_TIM16_IRQHandler          [WEAK]
+                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]
+                EXPORT  TIM2_IRQHandler                   [WEAK]
+                EXPORT  TIM3_IRQHandler                   [WEAK]
+                EXPORT  TIM4_IRQHandler                   [WEAK]
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]
+                EXPORT  SPI1_IRQHandler                   [WEAK]
+                EXPORT  SPI2_IRQHandler                   [WEAK]
+                EXPORT  USART1_IRQHandler                 [WEAK]
+                EXPORT  USART2_IRQHandler                 [WEAK]
+                EXPORT  USART3_IRQHandler                 [WEAK]
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]
+                EXPORT  USBWakeUp_IRQHandler              [WEAK]
+                EXPORT  TIM8_BRK_IRQHandler               [WEAK]
+                EXPORT  TIM8_UP_IRQHandler                [WEAK]
+                EXPORT  TIM8_TRG_COM_IRQHandler           [WEAK]
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]
+                EXPORT  ADC3_IRQHandler                   [WEAK]
+                EXPORT  FMC_IRQHandler                    [WEAK]
+                EXPORT  SPI3_IRQHandler                   [WEAK]
+                EXPORT  UART4_IRQHandler                  [WEAK]
+                EXPORT  UART5_IRQHandler                  [WEAK]
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]
+                EXPORT  TIM7_IRQHandler                   [WEAK]
+                EXPORT  DMA2_Channel1_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel2_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel3_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel4_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel5_IRQHandler          [WEAK]
+                EXPORT  ADC4_IRQHandler                   [WEAK]
+                EXPORT  COMP1_2_3_IRQHandler              [WEAK]
+                EXPORT  COMP4_5_6_IRQHandler              [WEAK]
+                EXPORT  COMP7_IRQHandler                  [WEAK]
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]
+                EXPORT  USB_HP_IRQHandler                 [WEAK]
+                EXPORT  USB_LP_IRQHandler                 [WEAK]
+                EXPORT  USBWakeUp_RMP_IRQHandler          [WEAK]
+                EXPORT  TIM20_BRK_IRQHandler              [WEAK]
+                EXPORT  TIM20_UP_IRQHandler               [WEAK]
+                EXPORT  TIM20_TRG_COM_IRQHandler          [WEAK]
+                EXPORT  TIM20_CC_IRQHandler               [WEAK]
+                EXPORT  FPU_IRQHandler                    [WEAK]
+                EXPORT  SPI4_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_TSC_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_CAN_TX_IRQHandler
+USB_LP_CAN_RX0_IRQHandler
+CAN_RX1_IRQHandler
+CAN_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+USBWakeUp_RMP_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+SPI4_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+                END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_ARM_MICRO/stm32f303xe.sct

@@ -0,0 +1,45 @@
+; Scatter-Loading Description File
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2014, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000)
+LR_IROM1 0x08000000 0x80000  {    ; load region size_region
+
+  ER_IROM1 0x08000000 0x80000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+
+  ; 101 vectors = 404 bytes (0x194) to be reserved in RAM
+  RW_IRAM1 (0x20000000+0x194) (0x10000-0x194)  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+
+}
+

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_ARM_STD/startup_stm32f303xe.S

@@ -0,0 +1,380 @@
+;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
+;* File Name          : startup_stm32f303xe.s
+;* Author             : MCD Application Team
+;* Version            : V2.1.0
+;* Date               : 12-Sept-2014
+;* Description        : STM32F303xE devices vector table for MDK-ARM_STD toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;*******************************************************************************
+
+__initial_sp    EQU     0x20004000 ; Top of RAM
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_TSC_IRQHandler              ; EXTI Line2 and Touch Sense controller
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1 and ADC2
+                DCD     USB_HP_CAN_TX_IRQHandler          ; USB Device High Priority or CAN TX
+                DCD     USB_LP_CAN_RX0_IRQHandler         ; USB Device Low Priority or CAN RX0
+                DCD     CAN_RX1_IRQHandler                ; CAN RX1
+                DCD     CAN_SCE_IRQHandler                ; CAN SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger and Commutation and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     USBWakeUp_IRQHandler              ; USB Wakeup through EXTI line
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger and Commutation
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare
+                DCD     ADC3_IRQHandler                   ; ADC3
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     ADC4_IRQHandler                   ; ADC4
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     COMP1_2_3_IRQHandler              ; COMP1, COMP2 and COMP3
+                DCD     COMP4_5_6_IRQHandler              ; COMP4, COMP5 and COMP6
+                DCD     COMP7_IRQHandler                  ; COMP7
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C3_EV_IRQHandler                ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 Error
+                DCD     USB_HP_IRQHandler                 ; USB High Priority remap
+                DCD     USB_LP_IRQHandler                 ; USB Low Priority remap
+                DCD     USBWakeUp_RMP_IRQHandler          ; USB Wakeup remap through EXTI
+                DCD     TIM20_BRK_IRQHandler              ; TIM20 Break
+                DCD     TIM20_UP_IRQHandler               ; TIM20 Update
+                DCD     TIM20_TRG_COM_IRQHandler          ; TIM20 Trigger and Commutation
+                DCD     TIM20_CC_IRQHandler               ; TIM20 Capture Compare
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SPI4_IRQHandler                   ; SPI4
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]
+                EXPORT  PVD_IRQHandler                    [WEAK]
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]
+                EXPORT  FLASH_IRQHandler                  [WEAK]
+                EXPORT  RCC_IRQHandler                    [WEAK]
+                EXPORT  EXTI0_IRQHandler                  [WEAK]
+                EXPORT  EXTI1_IRQHandler                  [WEAK]
+                EXPORT  EXTI2_TSC_IRQHandler              [WEAK]
+                EXPORT  EXTI3_IRQHandler                  [WEAK]
+                EXPORT  EXTI4_IRQHandler                  [WEAK]
+                EXPORT  DMA1_Channel1_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel2_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel3_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel4_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel5_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel6_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel7_IRQHandler          [WEAK]
+                EXPORT  ADC1_2_IRQHandler                 [WEAK]
+                EXPORT  USB_HP_CAN_TX_IRQHandler          [WEAK]
+                EXPORT  USB_LP_CAN_RX0_IRQHandler         [WEAK]
+                EXPORT  CAN_RX1_IRQHandler                [WEAK]
+                EXPORT  CAN_SCE_IRQHandler                [WEAK]
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]
+                EXPORT  TIM1_BRK_TIM15_IRQHandler         [WEAK]
+                EXPORT  TIM1_UP_TIM16_IRQHandler          [WEAK]
+                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]
+                EXPORT  TIM2_IRQHandler                   [WEAK]
+                EXPORT  TIM3_IRQHandler                   [WEAK]
+                EXPORT  TIM4_IRQHandler                   [WEAK]
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]
+                EXPORT  SPI1_IRQHandler                   [WEAK]
+                EXPORT  SPI2_IRQHandler                   [WEAK]
+                EXPORT  USART1_IRQHandler                 [WEAK]
+                EXPORT  USART2_IRQHandler                 [WEAK]
+                EXPORT  USART3_IRQHandler                 [WEAK]
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]
+                EXPORT  USBWakeUp_IRQHandler              [WEAK]
+                EXPORT  TIM8_BRK_IRQHandler               [WEAK]
+                EXPORT  TIM8_UP_IRQHandler                [WEAK]
+                EXPORT  TIM8_TRG_COM_IRQHandler           [WEAK]
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]
+                EXPORT  ADC3_IRQHandler                   [WEAK]
+                EXPORT  FMC_IRQHandler                    [WEAK]
+                EXPORT  SPI3_IRQHandler                   [WEAK]
+                EXPORT  UART4_IRQHandler                  [WEAK]
+                EXPORT  UART5_IRQHandler                  [WEAK]
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]
+                EXPORT  TIM7_IRQHandler                   [WEAK]
+                EXPORT  DMA2_Channel1_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel2_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel3_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel4_IRQHandler          [WEAK]
+                EXPORT  DMA2_Channel5_IRQHandler          [WEAK]
+                EXPORT  ADC4_IRQHandler                   [WEAK]
+                EXPORT  COMP1_2_3_IRQHandler              [WEAK]
+                EXPORT  COMP4_5_6_IRQHandler              [WEAK]
+                EXPORT  COMP7_IRQHandler                  [WEAK]
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]
+                EXPORT  USB_HP_IRQHandler                 [WEAK]
+                EXPORT  USB_LP_IRQHandler                 [WEAK]
+                EXPORT  USBWakeUp_RMP_IRQHandler          [WEAK]
+                EXPORT  TIM20_BRK_IRQHandler              [WEAK]
+                EXPORT  TIM20_UP_IRQHandler               [WEAK]
+                EXPORT  TIM20_TRG_COM_IRQHandler          [WEAK]
+                EXPORT  TIM20_CC_IRQHandler               [WEAK]
+                EXPORT  FPU_IRQHandler                    [WEAK]
+                EXPORT  SPI4_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_TSC_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_CAN_TX_IRQHandler
+USB_LP_CAN_RX0_IRQHandler
+CAN_RX1_IRQHandler
+CAN_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+USBWakeUp_RMP_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+SPI4_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+                END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_ARM_STD/stm32f303xe.sct

@@ -0,0 +1,45 @@
+; Scatter-Loading Description File
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2014, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000)
+LR_IROM1 0x08000000 0x80000  {    ; load region size_region
+
+  ER_IROM1 0x08000000 0x80000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+
+  ; 101 vectors = 404 bytes (0x194) to be reserved in RAM
+  RW_IRAM1 (0x20000000+0x194) (0x10000-0x194)  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+
+}
+

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_ARM_STD/sys.cpp

@@ -1,6 +1,6 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
-/* mbed Microcontroller Library
+/* mbed Microcontroller Library - stackheap
+ * Setup a fixed single stack/heap memory model, 
+ * between the top of the RW/ZI region and the stackpointer
  *******************************************************************************
  * Copyright (c) 2014, STMicroelectronics
  * All rights reserved.
@@ -29,26 +29,28 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
  *******************************************************************************
  */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
-
-
-
-
-
-
-
-
-
-
-//=======================================
-
-#define DEVICE_ID_LENGTH       24
-
-
-
-//#define DEVICE_ERROR_RED      0
-
-#include "objects.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif 
+
+#include <rt_misc.h>
+#include <stdint.h>
+
+extern char Image$$RW_IRAM1$$ZI$$Limit[];
+
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+    uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
+    uint32_t sp_limit = __current_sp();
+
+    zi_limit = (zi_limit + 7) & ~0x7;    // ensure zi_limit is 8-byte aligned
+
+    struct __initial_stackheap r;
+    r.heap_base = zi_limit;
+    r.heap_limit = sp_limit;
+    return r;
+}
+
+#ifdef __cplusplus
+}
 #endif 

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_GCC_ARM/STM32F303XE.ld

@@ -0,0 +1,155 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{ 
+  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
+  CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 16K
+  RAM (rwx) : ORIGIN = 0x20000194, LENGTH = 64K - 0x194
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ * 
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   _estack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .text :
+    {
+        KEEP(*(.isr_vector))
+        *(.text*)
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+
+        KEEP(*(.eh_frame*))
+    } > FLASH
+
+    .ARM.extab : 
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    __etext = .;
+    _sidata = .;
+
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        _sdata = .;
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+        . = ALIGN(4);
+        /* All data end */
+        __data_end__ = .;
+        _edata = .;
+
+    } > RAM
+
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        _sbss = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+        _ebss = .;
+    } > RAM
+    
+    .heap (COPY):
+    {
+        __end__ = .;
+        end = __end__;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > RAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    _estack = __StackTop;
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+    
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
+

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_GCC_ARM/startup_stm32f303xe.S

@@ -0,0 +1,505 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32f303xe.s
+  * @author    MCD Application Team
+  * @version   
+  * @date      12-Sept-2014
+  * @brief     STM32F303xE devices vector table for Atollic 
+  *            TrueSTUDIO toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure the clock system  
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software 
+  * distributed under the License is distributed on an "AS IS" BASIS, 
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+
+.equ  BootRAM,        0xF1E0F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+    .section	.text.Reset_Handler
+	.weak	Reset_Handler
+	.type	Reset_Handler, %function
+Reset_Handler:
+  ldr   sp, =_estack    /* Atollic update: set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+  movs	r1, #0
+  b	LoopCopyDataInit
+
+CopyDataInit:
+	ldr	r3, =_sidata
+	ldr	r3, [r3, r1]
+	str	r3, [r0, r1]
+	adds	r1, r1, #4
+
+LoopCopyDataInit:
+	ldr	r0, =_sdata
+	ldr	r3, =_edata
+	adds	r2, r0, r1
+	cmp	r2, r3
+	bcc	CopyDataInit
+	ldr	r2, =_sbss
+	b	LoopFillZerobss
+/* Zero fill the bss segment. */
+FillZerobss:
+	movs	r3, #0
+	str	r3, [r2], #4
+
+LoopFillZerobss:
+	ldr	r3, = _ebss
+	cmp	r2, r3
+	bcc	FillZerobss
+
+/* Call the clock system intitialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    //bl __libc_init_array
+/* Call the application's entry point.*/
+    //bl  main
+/**
+ * Calling the crt0 'cold-start' entry point. There __libc_init_array is called
+ * and when existing hardware_init_hook() and software_init_hook() before 
+ * starting main(). software_init_hook() is available and has to be called due 
+ * to initializsation when using rtos.
+*/
+    bl _start
+
+LoopForever:
+    b LoopForever
+    
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section	.text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+	.size	g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+	.word	_estack
+	.word	Reset_Handler
+	.word	NMI_Handler
+	.word	HardFault_Handler
+	.word	MemManage_Handler
+	.word	BusFault_Handler
+	.word	UsageFault_Handler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	SVC_Handler
+	.word	DebugMon_Handler
+	.word	0
+	.word	PendSV_Handler
+	.word	SysTick_Handler
+	.word	WWDG_IRQHandler
+	.word	PVD_IRQHandler
+	.word	TAMP_STAMP_IRQHandler
+	.word	RTC_WKUP_IRQHandler
+	.word	FLASH_IRQHandler
+	.word	RCC_IRQHandler
+	.word	EXTI0_IRQHandler
+	.word	EXTI1_IRQHandler
+	.word	EXTI2_TSC_IRQHandler
+	.word	EXTI3_IRQHandler
+	.word	EXTI4_IRQHandler
+	.word	DMA1_Channel1_IRQHandler
+	.word	DMA1_Channel2_IRQHandler
+	.word	DMA1_Channel3_IRQHandler
+	.word	DMA1_Channel4_IRQHandler
+	.word	DMA1_Channel5_IRQHandler
+	.word	DMA1_Channel6_IRQHandler
+	.word	DMA1_Channel7_IRQHandler
+	.word	ADC1_2_IRQHandler
+	.word	USB_HP_CAN_TX_IRQHandler
+	.word	USB_LP_CAN_RX0_IRQHandler
+	.word	CAN_RX1_IRQHandler
+	.word	CAN_SCE_IRQHandler
+	.word	EXTI9_5_IRQHandler
+	.word	TIM1_BRK_TIM15_IRQHandler
+	.word	TIM1_UP_TIM16_IRQHandler
+	.word	TIM1_TRG_COM_TIM17_IRQHandler
+	.word	TIM1_CC_IRQHandler
+	.word	TIM2_IRQHandler
+	.word	TIM3_IRQHandler
+	.word	TIM4_IRQHandler
+	.word	I2C1_EV_IRQHandler
+	.word	I2C1_ER_IRQHandler
+	.word	I2C2_EV_IRQHandler
+	.word	I2C2_ER_IRQHandler
+	.word	SPI1_IRQHandler
+	.word	SPI2_IRQHandler
+	.word	USART1_IRQHandler
+	.word	USART2_IRQHandler
+	.word	USART3_IRQHandler
+	.word	EXTI15_10_IRQHandler
+	.word	RTC_Alarm_IRQHandler
+	.word	USBWakeUp_IRQHandler
+	.word	TIM8_BRK_IRQHandler
+	.word	TIM8_UP_IRQHandler
+	.word	TIM8_TRG_COM_IRQHandler
+	.word	TIM8_CC_IRQHandler
+	.word	ADC3_IRQHandler
+	.word	FMC_IRQHandler
+	.word	0
+	.word	0
+	.word	SPI3_IRQHandler
+	.word	UART4_IRQHandler
+	.word	UART5_IRQHandler
+	.word	TIM6_DAC_IRQHandler
+	.word	TIM7_IRQHandler
+	.word	DMA2_Channel1_IRQHandler
+	.word	DMA2_Channel2_IRQHandler
+	.word	DMA2_Channel3_IRQHandler
+	.word	DMA2_Channel4_IRQHandler
+	.word	DMA2_Channel5_IRQHandler
+	.word	ADC4_IRQHandler
+	.word	0
+	.word	0
+	.word	COMP1_2_3_IRQHandler
+	.word	COMP4_5_6_IRQHandler
+	.word	COMP7_IRQHandler
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	I2C3_EV_IRQHandler
+	.word	I2C3_ER_IRQHandler
+	.word	USB_HP_IRQHandler
+	.word	USB_LP_IRQHandler
+	.word	USBWakeUp_RMP_IRQHandler
+	.word	TIM20_BRK_IRQHandler
+	.word	TIM20_UP_IRQHandler
+	.word	TIM20_TRG_COM_IRQHandler
+	.word	TIM20_CC_IRQHandler
+	.word	FPU_IRQHandler
+	.word	0
+	.word	0
+	.word	SPI4_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+  .weak	NMI_Handler
+	.thumb_set NMI_Handler,Default_Handler
+
+  .weak	HardFault_Handler
+	.thumb_set HardFault_Handler,Default_Handler
+
+  .weak	MemManage_Handler
+	.thumb_set MemManage_Handler,Default_Handler
+
+  .weak	BusFault_Handler
+	.thumb_set BusFault_Handler,Default_Handler
+
+	.weak	UsageFault_Handler
+	.thumb_set UsageFault_Handler,Default_Handler
+
+	.weak	SVC_Handler
+	.thumb_set SVC_Handler,Default_Handler
+
+	.weak	DebugMon_Handler
+	.thumb_set DebugMon_Handler,Default_Handler
+
+	.weak	PendSV_Handler
+	.thumb_set PendSV_Handler,Default_Handler
+
+	.weak	SysTick_Handler
+	.thumb_set SysTick_Handler,Default_Handler
+
+	.weak	WWDG_IRQHandler
+	.thumb_set WWDG_IRQHandler,Default_Handler
+
+	.weak	PVD_IRQHandler
+	.thumb_set PVD_IRQHandler,Default_Handler
+
+	.weak	TAMP_STAMP_IRQHandler
+	.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
+
+	.weak	RTC_WKUP_IRQHandler
+	.thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+	.weak	FLASH_IRQHandler
+	.thumb_set FLASH_IRQHandler,Default_Handler
+
+	.weak	RCC_IRQHandler
+	.thumb_set RCC_IRQHandler,Default_Handler
+
+	.weak	EXTI0_IRQHandler
+	.thumb_set EXTI0_IRQHandler,Default_Handler
+
+	.weak	EXTI1_IRQHandler
+	.thumb_set EXTI1_IRQHandler,Default_Handler
+
+	.weak	EXTI2_TSC_IRQHandler
+	.thumb_set EXTI2_TSC_IRQHandler,Default_Handler
+
+	.weak	EXTI3_IRQHandler
+	.thumb_set EXTI3_IRQHandler,Default_Handler
+
+	.weak	EXTI4_IRQHandler
+	.thumb_set EXTI4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel1_IRQHandler
+	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel2_IRQHandler
+	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel3_IRQHandler
+	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel4_IRQHandler
+	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel5_IRQHandler
+	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel6_IRQHandler
+	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+	.weak	DMA1_Channel7_IRQHandler
+	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+	.weak	ADC1_2_IRQHandler
+	.thumb_set ADC1_2_IRQHandler,Default_Handler
+
+	.weak	USB_HP_CAN_TX_IRQHandler
+	.thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler
+
+	.weak	USB_LP_CAN_RX0_IRQHandler
+	.thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler
+
+	.weak	CAN_RX1_IRQHandler
+	.thumb_set CAN_RX1_IRQHandler,Default_Handler
+
+	.weak	CAN_SCE_IRQHandler
+	.thumb_set CAN_SCE_IRQHandler,Default_Handler
+
+	.weak	EXTI9_5_IRQHandler
+	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+	.weak	TIM1_BRK_TIM15_IRQHandler
+	.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+	.weak	TIM1_UP_TIM16_IRQHandler
+	.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+	.weak	TIM1_TRG_COM_TIM17_IRQHandler
+	.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+	.weak	TIM1_CC_IRQHandler
+	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+	.weak	TIM2_IRQHandler
+	.thumb_set TIM2_IRQHandler,Default_Handler
+
+	.weak	TIM3_IRQHandler
+	.thumb_set TIM3_IRQHandler,Default_Handler
+
+	.weak	TIM4_IRQHandler
+	.thumb_set TIM4_IRQHandler,Default_Handler
+
+	.weak	I2C1_EV_IRQHandler
+	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+	.weak	I2C1_ER_IRQHandler
+	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+	.weak	I2C2_EV_IRQHandler
+	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+	.weak	I2C2_ER_IRQHandler
+	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+	.weak	SPI1_IRQHandler
+	.thumb_set SPI1_IRQHandler,Default_Handler
+
+	.weak	SPI2_IRQHandler
+	.thumb_set SPI2_IRQHandler,Default_Handler
+
+	.weak	USART1_IRQHandler
+	.thumb_set USART1_IRQHandler,Default_Handler
+
+	.weak	USART2_IRQHandler
+	.thumb_set USART2_IRQHandler,Default_Handler
+
+	.weak	USART3_IRQHandler
+	.thumb_set USART3_IRQHandler,Default_Handler
+
+	.weak	EXTI15_10_IRQHandler
+	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+	.weak	RTC_Alarm_IRQHandler
+	.thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+	.weak	USBWakeUp_IRQHandler
+	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+	.weak	TIM8_BRK_IRQHandler
+	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+	.weak	TIM8_UP_IRQHandler
+	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+	.weak	TIM8_TRG_COM_IRQHandler
+	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+	.weak	TIM8_CC_IRQHandler
+	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+	.weak	ADC3_IRQHandler
+	.thumb_set ADC3_IRQHandler,Default_Handler
+
+	.weak	FMC_IRQHandler
+	.thumb_set FMC_IRQHandler,Default_Handler
+
+	.weak	SPI3_IRQHandler
+	.thumb_set SPI3_IRQHandler,Default_Handler
+
+	.weak	UART4_IRQHandler
+	.thumb_set UART4_IRQHandler,Default_Handler
+
+	.weak	UART5_IRQHandler
+	.thumb_set UART5_IRQHandler,Default_Handler
+
+	.weak	TIM6_DAC_IRQHandler
+	.thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+	.weak	TIM7_IRQHandler
+	.thumb_set TIM7_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel1_IRQHandler
+	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel2_IRQHandler
+	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel3_IRQHandler
+	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel4_IRQHandler
+	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+	.weak	DMA2_Channel5_IRQHandler
+	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+	.weak	ADC4_IRQHandler
+	.thumb_set ADC4_IRQHandler,Default_Handler	
+	
+	.weak	COMP1_2_3_IRQHandler
+	.thumb_set COMP1_2_3_IRQHandler,Default_Handler
+	
+	.weak	COMP4_5_6_IRQHandler
+	.thumb_set COMP4_5_6_IRQHandler,Default_Handler
+	
+	.weak	COMP7_IRQHandler
+	.thumb_set COMP7_IRQHandler,Default_Handler	
+	
+	.weak	I2C3_EV_IRQHandler
+	.thumb_set I2C3_EV_IRQHandler,Default_Handler	
+	
+	.weak	I2C3_ER_IRQHandler
+	.thumb_set I2C3_ER_IRQHandler,Default_Handler	
+	
+	.weak	USB_HP_IRQHandler
+	.thumb_set USB_HP_IRQHandler,Default_Handler
+	
+	.weak	USB_LP_IRQHandler
+	.thumb_set USB_LP_IRQHandler,Default_Handler
+	
+	.weak	USBWakeUp_RMP_IRQHandler
+	.thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler
+	
+	.weak	TIM20_BRK_IRQHandler
+	.thumb_set TIM20_BRK_IRQHandler,Default_Handler
+	
+	.weak	TIM20_UP_IRQHandler
+	.thumb_set TIM20_UP_IRQHandler,Default_Handler
+	
+	.weak	TIM20_TRG_COM_IRQHandler
+	.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+	
+	.weak	TIM20_CC_IRQHandler
+	.thumb_set TIM20_CC_IRQHandler,Default_Handler
+	
+	.weak	FPU_IRQHandler
+	.thumb_set FPU_IRQHandler,Default_Handler
+	
+	.weak	SPI4_IRQHandler
+	.thumb_set SPI4_IRQHandler,Default_Handler
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_IAR/startup_stm32f303xe.S

@@ -0,0 +1,610 @@
+;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
+;* File Name          : startup_stm32f303xe.s
+;* Author             : MCD Application Team
+;* Version            : V2.1.0
+;* Date               : 12-Sept-2014
+;* Description        : STM32F303RE/STM32F303VE/STM32F303ZE devices vector table 
+;*                      for EWARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;*
+;* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+        ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; 0: Window WatchDog
+        DCD     PVD_IRQHandler                    ; 1: PVD through EXTI Line detection
+        DCD     TAMP_STAMP_IRQHandler             ; 2: Tamper and TimeStamps through the EXTI line
+        DCD     RTC_WKUP_IRQHandler               ; 3: RTC Wakeup through the EXTI line
+        DCD     FLASH_IRQHandler                  ; 4: FLASH
+        DCD     RCC_IRQHandler                    ; 5: RCC
+        DCD     EXTI0_IRQHandler                  ; 6: EXTI Line0
+        DCD     EXTI1_IRQHandler                  ; 7: EXTI Line1
+        DCD     EXTI2_TSC_IRQHandler              ; 8: EXTI Line2 and Touch Sense controller
+        DCD     EXTI3_IRQHandler                  ; 9: EXTI Line3
+        DCD     EXTI4_IRQHandler                  ; 10: EXTI Line4
+        DCD     DMA1_Channel1_IRQHandler          ; 11: DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler          ; 12: DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler          ; 13: DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler          ; 14: DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler          ; 15: DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler          ; 16: DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler          ; 17: DMA1 Channel 7
+        DCD     ADC1_2_IRQHandler                 ; 18: ADC1 and ADC2
+        DCD     USB_HP_CAN_TX_IRQHandler          ; 19: USB Device High Priority or CAN TX
+        DCD     USB_LP_CAN_RX0_IRQHandler         ; 20: USB Device Low Priority or CAN RX0
+        DCD     CAN_RX1_IRQHandler                ; 21: CAN RX1
+        DCD     CAN_SCE_IRQHandler                ; 22: CAN SCE
+        DCD     EXTI9_5_IRQHandler                ; 23: External Line[9:5]s
+        DCD     TIM1_BRK_TIM15_IRQHandler         ; 24: TIM1 Break and TIM15
+        DCD     TIM1_UP_TIM16_IRQHandler          ; 25: TIM1 Update and TIM16
+        DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; 26: TIM1 Trigger and Commutation and TIM17
+        DCD     TIM1_CC_IRQHandler                ; 27: TIM1 Capture Compare
+        DCD     TIM2_IRQHandler                   ; 28: TIM2
+        DCD     TIM3_IRQHandler                   ; 29: TIM3
+        DCD     TIM4_IRQHandler                   ; 30: TIM4
+        DCD     I2C1_EV_IRQHandler                ; 31: I2C1 Event
+        DCD     I2C1_ER_IRQHandler                ; 32: I2C1 Error
+        DCD     I2C2_EV_IRQHandler                ; 33: I2C2 Event
+        DCD     I2C2_ER_IRQHandler                ; 34: I2C2 Error
+        DCD     SPI1_IRQHandler                   ; 35: SPI1
+        DCD     SPI2_IRQHandler                   ; 36: SPI2
+        DCD     USART1_IRQHandler                 ; 37: USART1
+        DCD     USART2_IRQHandler                 ; 38: USART2
+        DCD     USART3_IRQHandler                 ; 39: USART3
+        DCD     EXTI15_10_IRQHandler              ; 40: External Line[15:10]s
+        DCD     RTC_Alarm_IRQHandler              ; 41: RTC Alarm (A and B) through EXTI Line
+        DCD     USBWakeUp_IRQHandler              ; 42: USB Wakeup through EXTI line
+        DCD     TIM8_BRK_IRQHandler               ; 43: TIM8 Break
+        DCD     TIM8_UP_IRQHandler                ; 44: TIM8 Update
+        DCD     TIM8_TRG_COM_IRQHandler           ; 45: TIM8 Trigger and Commutation
+        DCD     TIM8_CC_IRQHandler                ; 46: TIM8 Capture Compare
+        DCD     ADC3_IRQHandler                   ; 47: ADC3
+        DCD     FMC_IRQHandler                    ; 48: FMC
+        DCD     0                                 ; 49: Reserved
+        DCD     0                                 ; 50: Reserved
+        DCD     SPI3_IRQHandler                   ; 51: SPI3
+        DCD     UART4_IRQHandler                  ; 52: UART4
+        DCD     UART5_IRQHandler                  ; 53: UART5
+        DCD     TIM6_DAC_IRQHandler               ; 54: TIM6 and DAC1&2 underrun errors
+        DCD     TIM7_IRQHandler                   ; 55: TIM7
+        DCD     DMA2_Channel1_IRQHandler          ; 56: DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler          ; 57: DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler          ; 58: DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler          ; 59: DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler          ; 60: DMA2 Channel 5
+        DCD     ADC4_IRQHandler                   ; 61: ADC4
+        DCD     0                                 ; 62: Reserved
+        DCD     0                                 ; 63: Reserved
+        DCD     COMP1_2_3_IRQHandler              ; 64: COMP1, COMP2 and COMP3
+        DCD     COMP4_5_6_IRQHandler              ; 65: COMP4, COMP5 and COMP6
+        DCD     COMP7_IRQHandler                  ; 66: COMP7
+        DCD     0                                 ; 67: Reserved
+        DCD     0                                 ; 68: Reserved
+        DCD     0                                 ; 69: Reserved
+        DCD     0                                 ; 70: Reserved
+        DCD     0                                 ; 71: Reserved
+        DCD     I2C3_EV_IRQHandler                ; 72: I2C3 Event
+        DCD     I2C3_ER_IRQHandler                ; 73: I2C3 Error
+        DCD     USB_HP_IRQHandler                 ; 74: USB High Priority remap
+        DCD     USB_LP_IRQHandler                 ; 75: USB Low Priority remap
+        DCD     USBWakeUp_RMP_IRQHandler          ; 76: USB Wakeup remap through EXTI
+        DCD     TIM20_BRK_IRQHandler              ; 77: TIM20 Break
+        DCD     TIM20_UP_IRQHandler               ; 78: TIM20 Update
+        DCD     TIM20_TRG_COM_IRQHandler          ; 79: TIM20 Trigger and Commutation
+        DCD     TIM20_CC_IRQHandler               ; 80: TIM20 Capture Compare
+        DCD     FPU_IRQHandler                    ; 81: FPU
+        DCD     0                                 ; 82: Reserved
+        DCD     0                                 ; 83: Reserved
+        DCD     SPI4_IRQHandler                   ; 84: SPI4
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_IRQHandler
+        B PVD_IRQHandler
+
+        PUBWEAK TAMP_STAMP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TAMP_STAMP_IRQHandler
+        B TAMP_STAMP_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_TSC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_TSC_IRQHandler
+        B EXTI2_TSC_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+
+        PUBWEAK ADC1_2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+        B ADC1_2_IRQHandler
+
+        PUBWEAK USB_HP_CAN_TX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_CAN_TX_IRQHandler
+        B USB_HP_CAN_TX_IRQHandler
+
+        PUBWEAK USB_LP_CAN_RX0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_CAN_RX0_IRQHandler
+        B USB_LP_CAN_RX0_IRQHandler
+
+        PUBWEAK CAN_RX1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CAN_RX1_IRQHandler
+        B CAN_RX1_IRQHandler
+
+        PUBWEAK CAN_SCE_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+CAN_SCE_IRQHandler
+        B CAN_SCE_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM15_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+        B TIM1_BRK_TIM15_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM16_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+        B TIM1_UP_TIM16_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+        B TIM1_TRG_COM_TIM17_IRQHandler
+
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK USBWakeUp_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+        B USBWakeUp_IRQHandler
+
+        PUBWEAK TIM8_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+        B TIM8_BRK_IRQHandler
+
+        PUBWEAK TIM8_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+        B TIM8_UP_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+        B TIM8_TRG_COM_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK ADC3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+        B ADC3_IRQHandler
+        
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+        B FMC_IRQHandler        
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_IRQHandler
+        B TIM7_IRQHandler
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+
+        PUBWEAK ADC4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+        B ADC4_IRQHandler
+
+        PUBWEAK COMP1_2_3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+        B COMP1_2_3_IRQHandler
+
+        PUBWEAK COMP4_5_6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+        B COMP4_5_6_IRQHandler
+
+        PUBWEAK COMP7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+        B COMP7_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+
+        PUBWEAK USBWakeUp_RMP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_RMP_IRQHandler
+        B USBWakeUp_RMP_IRQHandler
+
+        PUBWEAK TIM20_BRK_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+        B TIM20_BRK_IRQHandler
+
+        PUBWEAK TIM20_UP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+        B TIM20_UP_IRQHandler
+
+        PUBWEAK TIM20_TRG_COM_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+        B TIM20_TRG_COM_IRQHandler
+
+        PUBWEAK TIM20_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+        B TIM20_CC_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+        B FPU_IRQHandler
+
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+        B SPI4_IRQHandler
+        
+        END
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_IAR/stm32f303xe.icf

@@ -0,0 +1,35 @@
+/* [ROM = 512kb = 0x80000] */
+define symbol __intvec_start__     = 0x08000000;
+define symbol __region_ROM_start__ = 0x08000000;
+define symbol __region_ROM_end__   = 0x0807FFFF;
+
+define symbol __region_CCMRAM_start__ = 0x10000000;
+define symbol __region_CCMRAM_end__   = 0x10003FFF;
+
+/* [RAM = 64kb = 0x10000] Vector table dynamic copy: 101 vectors = 404 bytes (0x194) to be reserved in RAM */
+define symbol __NVIC_start__          = 0x20000000;
+define symbol __NVIC_end__            = 0x20000197; /* Add 4 more bytes to be aligned on 8 bytes */
+define symbol __region_RAM_start__    = 0x20000198;
+define symbol __region_RAM_end__      = 0x2000FFFF;
+
+/* Memory regions */
+define memory mem with size = 4G;
+define region ROM_region    = mem:[from __region_ROM_start__    to __region_ROM_end__];
+define region RAM_region    = mem:[from __region_RAM_start__    to __region_RAM_end__];
+define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__];
+
+/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x2000;
+define symbol __size_heap__   = 0x4000;
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+
+initialize by copy with packing = zeros { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite, block STACKHEAP };

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/cmsis.h

@@ -1,4 +1,5 @@
 /* mbed Microcontroller Library
+ * A generic CMSIS include header
  *******************************************************************************
  * Copyright (c) 2014, STMicroelectronics
  * All rights reserved.
@@ -27,15 +28,11 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *******************************************************************************
  */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
 
-//=======================================
+#ifndef MBED_CMSIS_H
+#define MBED_CMSIS_H
 
-#define DEVICE_ID_LENGTH       24
-
-#define LED_RED                 LED3
-
-#include "objects.h"
+#include "stm32f3xx.h"
+#include "cmsis_nvic.h"
 
 #endif

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/cmsis_nvic.c

@@ -0,0 +1,55 @@
+/* mbed Microcontroller Library
+ * CMSIS-style functionality to support dynamic vectors
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */ 
+#include "cmsis_nvic.h"
+
+#define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
+#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
+
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
+    uint32_t *vectors = (uint32_t *)SCB->VTOR;
+    uint32_t i;
+
+    // Copy and switch to dynamic vectors if the first time called
+    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+        uint32_t *old_vectors = vectors;
+        vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
+        for (i=0; i<NVIC_NUM_VECTORS; i++) {
+            vectors[i] = old_vectors[i];
+        }
+        SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
+    }
+    vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+}
+
+uint32_t NVIC_GetVector(IRQn_Type IRQn) {
+    uint32_t *vectors = (uint32_t*)SCB->VTOR;
+    return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
+}

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/cmsis_nvic.h

@@ -1,6 +1,5 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
 /* mbed Microcontroller Library
+ * CMSIS-style functionality to support dynamic vectors
  *******************************************************************************
  * Copyright (c) 2014, STMicroelectronics
  * All rights reserved.
@@ -29,26 +28,28 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *******************************************************************************
  */ 
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
 
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
 
+// STM32F303RE
+// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
+// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to 0x193
+// Total: 101 vectors = 404 bytes (0x194) to be reserved in RAM
+#define NVIC_NUM_VECTORS      101
+#define NVIC_USER_IRQ_OFFSET  16
 
+#include "cmsis.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
 
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
+uint32_t NVIC_GetVector(IRQn_Type IRQn);
 
-
-
-
-
-
-//=======================================
-
-#define DEVICE_ID_LENGTH       24
-
-
-
-
-#include "objects.h"
+#ifdef __cplusplus
+}
+#endif
 
 #endif

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/hal_tick.c

@@ -0,0 +1,120 @@
+/**
+  ******************************************************************************
+  * @file    hal_tick.c
+  * @author  MCD Application Team
+  * @brief   Initialization of HAL tick
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#include "hal_tick.h"
+
+TIM_HandleTypeDef TimMasterHandle;
+uint32_t PreviousVal = 0;
+
+void us_ticker_irq_handler(void);
+
+void timer_irq_handler(void) {
+    // Channel 1 for mbed timeout
+    if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC1) == SET) {
+        __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1);
+        us_ticker_irq_handler();
+    }
+
+    // Channel 2 for HAL tick
+    if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC2) == SET) {
+        __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
+        uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
+        if ((val - PreviousVal) >= HAL_TICK_DELAY) {
+            // Increment HAL variable
+            HAL_IncTick();
+            // Prepare next interrupt
+            __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
+            PreviousVal = val;
+#if 0 // For DEBUG only
+            HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
+#endif
+        }
+    }
+}
+
+// Reconfigure the HAL tick using a standard timer instead of systick.
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
+    // Enable timer clock
+    TIM_MST_RCC;
+
+    // Reset timer
+    TIM_MST_RESET_ON;
+    TIM_MST_RESET_OFF;
+
+    // Configure time base
+    TimMasterHandle.Instance = TIM_MST;
+    TimMasterHandle.Init.Period            = 0xFFFFFFFF;
+    TimMasterHandle.Init.Prescaler         = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 us tick
+    TimMasterHandle.Init.ClockDivision     = 0;
+    TimMasterHandle.Init.CounterMode       = TIM_COUNTERMODE_UP;
+    TimMasterHandle.Init.RepetitionCounter = 0;
+    HAL_TIM_OC_Init(&TimMasterHandle);
+
+    NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
+    NVIC_EnableIRQ(TIM_MST_IRQ);
+
+    // Channel 1 for mbed timeout
+    HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
+
+    // Channel 2 for HAL tick
+    HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
+    PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
+    __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
+    __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
+
+#if 0 // For DEBUG only
+    __GPIOB_CLK_ENABLE();
+    GPIO_InitTypeDef GPIO_InitStruct;
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+#endif
+
+    return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */    
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/hal_tick.h

@@ -0,0 +1,60 @@
+/**
+  ******************************************************************************
+  * @file    hal_tick.h
+  * @author  MCD Application Team
+  * @brief   Initialization of HAL tick
+  ******************************************************************************  
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************  
+  */ 
+#ifndef __HAL_TICK_H
+#define __HAL_TICK_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "stm32f3xx.h"
+#include "cmsis_nvic.h"
+   
+#define TIM_MST      TIM2
+#define TIM_MST_IRQ  TIM2_IRQn
+#define TIM_MST_RCC  __TIM2_CLK_ENABLE()
+
+#define TIM_MST_RESET_ON   __TIM2_FORCE_RESET()
+#define TIM_MST_RESET_OFF  __TIM2_RELEASE_RESET()
+
+#define HAL_TICK_DELAY (1000) // 1 ms
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __HAL_TICK_H
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/stm32f3xx.h

@@ -0,0 +1,252 @@
+/**
+  ******************************************************************************
+  * @file    stm32f3xx.h
+  * @author  MCD Application Team
+  * @version V2.3.0
+  * @date    29-April-2015
+  * @brief   CMSIS STM32F3xx Device Peripheral Access Layer Header File.           
+  *            
+  *          The file is the unique include file that the application programmer
+  *          is using in the C source code, usually in main.c. This file contains:
+  *           - Configuration section that allows to select:
+  *              - The STM32F3xx device used in the target application
+  *              - To use or not the peripheral’s drivers in application code(i.e. 
+  *                code will be based on direct access to peripheral’s registers 
+  *                rather than drivers API), this option is controlled by 
+  *                "#define USE_HAL_DRIVER"
+  *  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f3xx
+  * @{
+  */
+    
+#ifndef __STM32F3xx_H
+#define __STM32F3xx_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif /* __cplusplus */
+   
+/** @addtogroup Library_configuration_section
+  * @{
+  */
+
+/**
+  * @brief STM32 Family
+  */
+#if !defined (STM32F3)
+#define STM32F3
+#endif /* STM32F3 */
+
+/* Uncomment the line below according to the target STM32 device used in your
+   application 
+  */
+
+#if !defined (STM32F301x8) && !defined (STM32F302x8) && !defined (STM32F318xx) && \
+    !defined (STM32F302xC) && !defined (STM32F303xC) && !defined (STM32F358xx) && \
+    !defined (STM32F303x8) && !defined (STM32F334x8) && !defined (STM32F328xx) && \
+    !defined (STM32F302xE) && !defined (STM32F303xE) && !defined (STM32F398xx) && \
+    !defined (STM32F373xC) && !defined (STM32F378xx)
+    
+  /* #define STM32F301x8 */   /*!< STM32F301K6, STM32F301K8, STM32F301C6, STM32F301C8,
+                                   STM32F301R6 and STM32F301R8 Devices */
+  /* #define STM32F302x8 */   /*!< STM32F302K6, STM32F302K8, STM32F302C6, STM32F302C8,
+                                   STM32F302R6 and STM32F302R8 Devices */
+  /* #define STM32F302xC */   /*!< STM32F302CB, STM32F302CC, STM32F302RB, STM32F302RC,
+                                   STM32F302VB and STM32F302VC Devices */
+  /* #define STM32F302xE */   /*!< STM32F302RE, STM32F302VE, STM32F302ZE, STM32F302RD,
+                                   STM32F302VD and STM32F302ZD Devices */
+  /* #define STM32F303x8 */   /*!< STM32F303K6, STM32F303K8, STM32F303C6, STM32F303C8, 
+                                   STM32F303R6 and STM32F303R8 Devices */
+  /* #define STM32F303xC */   /*!< STM32F303CB, STM32F303CC, STM32F303RB, STM32F303RC,
+                                   STM32F303VB and STM32F303VC Devices */
+#define STM32F303xE   /*!< STM32F303RE, STM32F303VE, STM32F303ZE, STM32F303RD,
+                                   STM32F303VD and STM32F303ZD Devices */
+  /* #define STM32F373xC */   /*!< STM32F373C8, STM32F373CB, STM32F373CC,
+                                   STM32F373R8, STM32F373RB, STM32F373RC,
+                                   STM32F373V8, STM32F373VB and STM32F373VC Devices */
+  /* #define STM32F334x8 */   /*!< STM32F334K4, STM32F334K6, STM32F334K8,
+                                   STM32F334C4, STM32F334C6, STM32F334C8,
+                                   STM32F334R4, STM32F334R6 and STM32F334R8 Devices */
+  /* #define STM32F318xx */   /*!< STM32F318K8, STM32F318C8: STM32F301x8 with regulator off: STM32F318xx Devices */
+  /* #define STM32F328xx */   /*!< STM32F328C8, STM32F328R8: STM32F334x8 with regulator off: STM32F328xx Devices */
+  /* #define STM32F358xx */   /*!< STM32F358CC, STM32F358RC, STM32F358VC: STM32F303xC with regulator off: STM32F358xx Devices */
+  /* #define STM32F378xx */   /*!< STM32F378CC, STM32F378RC, STM32F378VC: STM32F373xC with regulator off: STM32F378xx Devices */
+  /* #define STM32F398xx */   /*!< STM32F398VE: STM32F303xE with regulator off: STM32F398xx Devices */
+#endif
+   
+/*  Tip: To avoid modifying this file each time you need to switch between these
+        devices, you can define the device in your toolchain compiler preprocessor.
+  */
+#if !defined  (USE_HAL_DRIVER)
+/**
+ * @brief Comment the line below if you will not use the peripherals drivers.
+   In this case, these drivers will not be included and the application code will 
+   be based on direct access to peripherals registers 
+   */
+#define USE_HAL_DRIVER
+#endif /* USE_HAL_DRIVER */
+
+/**
+  * @brief CMSIS Device version number V2.3.0
+  */
+#define __STM32F3_CMSIS_VERSION_MAIN   (0x02) /*!< [31:24] main version */                                  
+#define __STM32F3_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
+#define __STM32F3_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F3_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
+#define __STM32F3_CMSIS_VERSION        ((__STM32F3_CMSIS_VERSION_MAIN     << 24)\
+                                       |(__STM32F3_CMSIS_VERSION_SUB1 << 16)\
+                                       |(__STM32F3_CMSIS_VERSION_SUB2 << 8 )\
+                                       |(__STM32F3_CMSIS_VERSION_RC))
+
+/**
+  * @}
+  */
+
+/** @addtogroup Device_Included
+  * @{
+  */
+
+#if defined(STM32F301x8)
+  #include "stm32f301x8.h"
+#elif defined(STM32F302x8)
+  #include "stm32f302x8.h"
+#elif defined(STM32F302xC)
+  #include "stm32f302xc.h"
+#elif defined(STM32F302xE)
+  #include "stm32f302xe.h"
+#elif defined(STM32F303x8)
+  #include "stm32f303x8.h"
+#elif defined(STM32F303xC)
+  #include "stm32f303xc.h"
+#elif defined(STM32F303xE)
+  #include "stm32f303xe.h"
+#elif defined(STM32F373xC)
+  #include "stm32f373xc.h"
+#elif defined(STM32F334x8)
+  #include "stm32f334x8.h"
+#elif defined(STM32F318xx)
+  #include "stm32f318xx.h"
+#elif defined(STM32F328xx)
+  #include "stm32f328xx.h"
+#elif defined(STM32F358xx)
+  #include "stm32f358xx.h"
+#elif defined(STM32F378xx)
+  #include "stm32f378xx.h"
+#elif defined(STM32F398xx)
+  #include "stm32f398xx.h"
+#else
+ #error "Please select first the target STM32F3xx device used in your application (in stm32f3xx.h file)"
+#endif
+
+/**
+  * @}
+  */
+
+/** @addtogroup Exported_types
+  * @{
+  */ 
+typedef enum 
+{
+  RESET = 0, 
+  SET = !RESET
+} FlagStatus, ITStatus;
+
+typedef enum 
+{
+  DISABLE = 0, 
+  ENABLE = !DISABLE
+} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+
+typedef enum 
+{
+  ERROR = 0, 
+  SUCCESS = !ERROR
+} ErrorStatus;
+
+/**
+  * @}
+  */
+
+
+/** @addtogroup Exported_macros
+  * @{
+  */
+#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
+
+#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
+
+#define READ_BIT(REG, BIT)    ((REG) & (BIT))
+
+#define CLEAR_REG(REG)        ((REG) = (0x0))
+
+#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
+
+#define READ_REG(REG)         ((REG))
+
+#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
+
+#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
+
+
+#if defined (USE_HAL_DRIVER)
+ #include "stm32f3xx_hal.h"
+#endif /* USE_HAL_DRIVER */
+
+
+/**
+  * @}
+  */
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __STM32F3xx_H */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/system_stm32f3xx.c

@@ -0,0 +1,459 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f3xx.c
+  * @author  MCD Application Team
+  * @version V2.3.0
+  * @date    29-April-2015
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+  *
+  * 1. This file provides two functions and one global variable to be called from
+  *    user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f3xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * 2. After each device reset the HSI (8 MHz) is used as system clock source.
+  *    Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to
+  *    configure the system clock before to branch to main program.
+  *
+  * 3. This file configures the system clock as follows:
+  *-----------------------------------------------------------------------------
+  * System clock source                | 1- PLL_HSE_EXTC        | 3- PLL_HSI
+  *                                    | (external 8 MHz clock) | (internal 8 MHz)
+  *                                    | 2- PLL_HSE_XTAL        |
+  *                                    | (external 8 MHz xtal)  |
+  *-----------------------------------------------------------------------------
+  * SYSCLK(MHz)                        | 72                     | 64
+  *-----------------------------------------------------------------------------
+  * AHBCLK (MHz)                       | 72                     | 64
+  *-----------------------------------------------------------------------------
+  * APB1CLK (MHz)                      | 36                     | 32
+  *-----------------------------------------------------------------------------
+  * APB2CLK (MHz)                      | 72                     | 64
+  *-----------------------------------------------------------------------------
+  * USB capable (48 MHz precise clock) | NO                     | NO
+  *-----------------------------------------------------------------------------
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f3xx_system
+  * @{
+  */
+
+/** @addtogroup STM32F3xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f3xx.h"
+#include "hal_tick.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Private_Defines
+  * @{
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
+                                                This value can be provided and adapted by the user application. */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
+                                                This value can be provided and adapted by the user application. */
+#endif /* HSI_VALUE */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field.
+                                  This value must be a multiple of 0x200. */
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Private_Macros
+  * @{
+  */
+
+/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
+#define USE_PLL_HSE_EXTC (1) /* Use external clock */
+#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Private_Variables
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock there is no need to
+               call the 2 first functions listed above, since SystemCoreClock variable is 
+               updated automatically.
+  */
+uint32_t SystemCoreClock = 72000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
+uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
+#endif
+
+uint8_t SetSysClock_PLL_HSI(void);
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the FPU setting, vector table location and the PLL configuration is reset.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  #endif
+
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= 0x00000001U;
+
+  /* Reset CFGR register */
+  RCC->CFGR &= 0xF87FC00CU;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= 0xFEF6FFFFU;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= 0xFFFBFFFFU;
+
+  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */
+  RCC->CFGR &= 0xFF80FFFFU;
+
+  /* Reset PREDIV1[3:0] bits */
+  RCC->CFGR2 &= 0xFFFFFFF0U;
+
+  /* Reset USARTSW[1:0], I2CSW and TIMs bits */
+  RCC->CFGR3 &= 0xFF00FCCCU;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000U;
+
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+
+  /* Configure the Cube driver */
+  SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
+  HAL_Init();
+
+  /* Configure the System clock source, PLL Multiplier and Divider factors,
+     AHB/APBx prescalers and Flash settings */
+  SetSysClock();
+
+  /* Reset the timer to avoid issues after the RAM initialization */
+  TIM_MST_RESET_ON;
+  TIM_MST_RESET_OFF;
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value
+  *             8 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value
+  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate (void)
+{
+  uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case RCC_CFGR_SWS_PLL:  /* PLL used as system clock */
+      /* Get PLL clock source and multiplication factor ----------------------*/
+      pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
+      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
+      pllmull = ( pllmull >> 18) + 2;
+
+#if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx)
+        predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
+      if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
+      {
+        /* HSE oscillator clock selected as PREDIV1 clock entry */
+        SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
+      }
+      else
+      {
+        /* HSI oscillator clock selected as PREDIV1 clock entry */
+        SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull;
+      }
+#else      
+      if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2)
+      {
+        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
+        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
+      }
+      else
+      {
+        predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
+        /* HSE oscillator clock selected as PREDIV1 clock entry */
+        SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
+      }
+#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
+      break;
+    default: /* HSI used as system clock */
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK clock frequency ----------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors,
+  *               AHB/APBx prescalers and Flash settings
+  * @note   This function should be called only once the RCC clock configuration  
+  *         is reset to the default reset state (done in SystemInit() function).             
+  * @param  None
+  * @retval None
+  */
+void SetSysClock(void)
+{
+  /* 1- Try to start with HSE and external clock */
+#if USE_PLL_HSE_EXTC != 0
+  if (SetSysClock_PLL_HSE(1) == 0)
+#endif
+  {
+    /* 2- If fail try to start with HSE and external xtal */
+    #if USE_PLL_HSE_XTAL != 0
+    if (SetSysClock_PLL_HSE(0) == 0)
+    #endif
+    {
+      /* 3- If fail start with HSI clock */
+      if (SetSysClock_PLL_HSI() == 0)
+      {
+        while(1)
+        {
+          // [TODO] Put something here to tell the user that a problem occured...
+        }
+      }
+    }
+  }
+  
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_DIV1); // 72 MHz or 64 MHz
+}
+
+#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  /* Enable HSE oscillator and activate PLL with HSE as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSE;
+  if (bypass == 0)
+  {
+    RCC_OscInitStruct.HSEState          = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
+  }
+  else
+  {
+    RCC_OscInitStruct.HSEState          = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
+  }
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PREDIV          = RCC_PREDIV_DIV1;
+  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL9; // 72 MHz (8 MHz * 9)
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+ 
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 72 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 72 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           // 36 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 72 MHz
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //if (bypass == 0)
+  //  HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV2); // 4 MHz with xtal
+  //else
+  //  HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV1); // 8 MHz with ext clock
+  
+  return 1; // OK
+}
+#endif
+
+/******************************************************************************/
+/*            PLL (clocked by HSI) used as System clock source                */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSI(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  /* Enable HSI oscillator and activate PLL with HSI as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  RCC_OscInitStruct.HSEState            = RCC_HSE_OFF;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PREDIV          = RCC_PREDIV_DIV2;
+  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16)
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+ 
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 64 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 64 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           // 32 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 64 MHz
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSI, RCC_MCO_DIV1); // 8 MHz
+
+  return 1; // OK
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

hal/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/system_stm32f3xx.h

@@ -0,0 +1,126 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f3xx.h
+  * @author  MCD Application Team
+  * @version V2.3.0
+  * @date    29-April-2015
+  * @brief   CMSIS Cortex-M4 Device System Source File for STM32F3xx devices.  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */ 
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f3xx_system
+  * @{
+  */  
+  
+/**
+  * @brief Define to prevent recursive inclusion
+  */
+#ifndef __SYSTEM_STM32F3XX_H
+#define __SYSTEM_STM32F3XX_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+/** @addtogroup STM32F3xx_System_Includes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+
+/** @addtogroup STM32F3xx_System_Exported_types
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      3) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) by calling HAL API function HAL_RCC_ClockConfig()
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
+extern const uint8_t AHBPrescTable[16];   /*!< AHB prescalers table values */
+extern const uint8_t APBPrescTable[8];    /*!< APB prescalers table values */
+
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Exported_Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Exported_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F3xx_System_Exported_Functions
+  * @{
+  */
+  
+extern void SystemInit(void);
+extern void SystemCoreClockUpdate(void);
+extern void SetSysClock(void);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SYSTEM_STM32F3XX_H */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */  
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/startup_stm32f769xx.S

@@ -0,0 +1,479 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name          : startup_stm32f769xx.s
+;* Author             : MCD Application Team
+;* Version            : V1.1.0
+;* Date               : 22-April-2016
+;* Description        : STM32F769xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM7 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;*******************************************************************************
+; 
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+__initial_sp    EQU     0x20080000 ; Top of RAM
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FMC_IRQHandler                    ; FMC                                             
+                DCD     SDMMC1_IRQHandler                  ; SDMMC1                                            
+                DCD     TIM5_IRQHandler                   ; TIM5                                            
+                DCD     SPI3_IRQHandler                   ; SPI3                                            
+                DCD     UART4_IRQHandler                  ; UART4                                           
+                DCD     UART5_IRQHandler                  ; UART5                                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
+                DCD     TIM7_IRQHandler                   ; TIM7                   
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
+                DCD     ETH_IRQHandler                    ; Ethernet                                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+                DCD     USART6_IRQHandler                 ; USART6                                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
+                DCD     DCMI_IRQHandler                   ; DCMI                                            
+                DCD     0                                 ; Reserved                                     
+                DCD     RNG_IRQHandler                    ; Rng
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     UART7_IRQHandler                  ; UART7
+                DCD     UART8_IRQHandler                  ; UART8
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     SPI5_IRQHandler                   ; SPI5
+                DCD     SPI6_IRQHandler                   ; SPI6
+                DCD     SAI1_IRQHandler                   ; SAI1
+                DCD     LTDC_IRQHandler                   ; LTDC
+                DCD     LTDC_ER_IRQHandler                ; LTDC error
+                DCD     DMA2D_IRQHandler                  ; DMA2D
+                DCD     SAI2_IRQHandler                   ; SAI2
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     LPTIM1_IRQHandler                 ; LPTIM1
+                DCD     CEC_IRQHandler                    ; HDMI_CEC
+                DCD     I2C4_EV_IRQHandler                ; I2C4 Event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 Error 
+                DCD     SPDIF_RX_IRQHandler               ; SPDIF_RX
+                DCD     DSI_IRQHandler                    ; DSI
+                DCD     DFSDM1_FLT0_IRQHandler            ; DFSDM1 Filter 0 global Interrupt
+                DCD     DFSDM1_FLT1_IRQHandler            ; DFSDM1 Filter 1 global Interrupt
+                DCD     DFSDM1_FLT2_IRQHandler            ; DFSDM1 Filter 2 global Interrupt
+                DCD     DFSDM1_FLT3_IRQHandler            ; DFSDM1 Filter 3 global Interrupt
+                DCD     SDMMC2_IRQHandler                 ; SDMMC2
+                DCD     CAN3_TX_IRQHandler                ; CAN3 TX
+                DCD     CAN3_RX0_IRQHandler               ; CAN3 RX0
+                DCD     CAN3_RX1_IRQHandler               ; CAN3 RX1
+                DCD     CAN3_SCE_IRQHandler               ; CAN3 SCE
+                DCD     JPEG_IRQHandler                   ; JPEG
+                DCD     MDIOS_IRQHandler                  ; MDIOS
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
+                EXPORT  PVD_IRQHandler                    [WEAK]                      
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
+                EXPORT  RCC_IRQHandler                    [WEAK]                                            
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  ADC_IRQHandler                    [WEAK]                         
+                EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                
+                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                
+                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
+                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
+                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FMC_IRQHandler                    [WEAK]                                             
+                EXPORT  SDMMC1_IRQHandler                 [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               
+                EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                                                                  
+                EXPORT  RNG_IRQHandler                    [WEAK]
+                EXPORT  FPU_IRQHandler                    [WEAK]
+                EXPORT  UART7_IRQHandler                  [WEAK]
+                EXPORT  UART8_IRQHandler                  [WEAK]
+                EXPORT  SPI4_IRQHandler                   [WEAK]
+                EXPORT  SPI5_IRQHandler                   [WEAK]
+                EXPORT  SPI6_IRQHandler                   [WEAK]
+                EXPORT  SAI1_IRQHandler                   [WEAK]
+                EXPORT  LTDC_IRQHandler                   [WEAK]
+                EXPORT  LTDC_ER_IRQHandler                [WEAK]
+                EXPORT  DMA2D_IRQHandler                  [WEAK]
+                EXPORT  SAI2_IRQHandler                   [WEAK]   
+                EXPORT  QUADSPI_IRQHandler                [WEAK]
+                EXPORT  LPTIM1_IRQHandler                 [WEAK]
+                EXPORT  CEC_IRQHandler                    [WEAK]   
+                EXPORT  I2C4_EV_IRQHandler                [WEAK]
+                EXPORT  I2C4_ER_IRQHandler                [WEAK] 
+                EXPORT  SPDIF_RX_IRQHandler               [WEAK]
+                EXPORT  DSI_IRQHandler                    [WEAK]
+                EXPORT  DFSDM1_FLT0_IRQHandler            [WEAK]
+                EXPORT  DFSDM1_FLT1_IRQHandler            [WEAK]
+                EXPORT  DFSDM1_FLT2_IRQHandler            [WEAK]
+                EXPORT  DFSDM1_FLT3_IRQHandler            [WEAK]
+                EXPORT  SDMMC2_IRQHandler                 [WEAK]
+                EXPORT  CAN3_TX_IRQHandler                [WEAK]
+                EXPORT  CAN3_RX0_IRQHandler               [WEAK]
+                EXPORT  CAN3_RX1_IRQHandler               [WEAK]
+                EXPORT  CAN3_SCE_IRQHandler               [WEAK]
+                EXPORT  JPEG_IRQHandler                   [WEAK]
+                EXPORT  MDIOS_IRQHandler                  [WEAK]
+                
+WWDG_IRQHandler                                                       
+PVD_IRQHandler                                      
+TAMP_STAMP_IRQHandler                  
+RTC_WKUP_IRQHandler                                
+FLASH_IRQHandler                                                       
+RCC_IRQHandler                                                            
+EXTI0_IRQHandler                                                          
+EXTI1_IRQHandler                                                           
+EXTI2_IRQHandler                                                          
+EXTI3_IRQHandler                                                         
+EXTI4_IRQHandler                                                          
+DMA1_Stream0_IRQHandler                                       
+DMA1_Stream1_IRQHandler                                          
+DMA1_Stream2_IRQHandler                                          
+DMA1_Stream3_IRQHandler                                          
+DMA1_Stream4_IRQHandler                                          
+DMA1_Stream5_IRQHandler                                          
+DMA1_Stream6_IRQHandler                                          
+ADC_IRQHandler                                         
+CAN1_TX_IRQHandler                                                            
+CAN1_RX0_IRQHandler                                                          
+CAN1_RX1_IRQHandler                                                           
+CAN1_SCE_IRQHandler                                                           
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_TIM9_IRQHandler                        
+TIM1_UP_TIM10_IRQHandler                      
+TIM1_TRG_COM_TIM11_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                            
+OTG_FS_WKUP_IRQHandler                                
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FMC_IRQHandler                                                            
+SDMMC1_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+CAN2_TX_IRQHandler                                                           
+CAN2_RX0_IRQHandler                                                          
+CAN2_RX1_IRQHandler                                                          
+CAN2_SCE_IRQHandler                                                          
+OTG_FS_IRQHandler                                                    
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler                           
+OTG_HS_EP1_IN_IRQHandler                            
+OTG_HS_WKUP_IRQHandler                                
+OTG_HS_IRQHandler                                                   
+DCMI_IRQHandler                                                                                                                
+RNG_IRQHandler
+FPU_IRQHandler  
+UART7_IRQHandler                  
+UART8_IRQHandler                  
+SPI4_IRQHandler                   
+SPI5_IRQHandler                   
+SPI6_IRQHandler                   
+SAI1_IRQHandler                   
+LTDC_IRQHandler                   
+LTDC_ER_IRQHandler                 
+DMA2D_IRQHandler   
+SAI2_IRQHandler        
+QUADSPI_IRQHandler
+LPTIM1_IRQHandler
+CEC_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPDIF_RX_IRQHandler
+DSI_IRQHandler
+DFSDM1_FLT0_IRQHandler
+DFSDM1_FLT1_IRQHandler
+DFSDM1_FLT2_IRQHandler
+DFSDM1_FLT3_IRQHandler
+SDMMC2_IRQHandler
+CAN3_TX_IRQHandler
+CAN3_RX0_IRQHandler
+CAN3_RX1_IRQHandler
+CAN3_SCE_IRQHandler
+JPEG_IRQHandler
+MDIOS_IRQHandler
+                B       .
+
+                ENDP
+
+                ALIGN
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/stm32f769ni.sct

@@ -0,0 +1,45 @@
+; Scatter-Loading Description File
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2016, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; STM32F769NI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
+LR_IROM1 0x08000000 0x200000  {    ; load region size_region
+
+  ER_IROM1 0x08000000 0x200000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+
+  ; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM
+  RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8)  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+
+}
+

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/sys.cpp

@@ -0,0 +1,56 @@
+/* mbed Microcontroller Library - stackheap
+ * Setup a fixed single stack/heap memory model, 
+ * between the top of the RW/ZI region and the stackpointer
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+ *******************************************************************************
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif 
+
+#include <rt_misc.h>
+#include <stdint.h>
+
+extern char Image$$RW_IRAM1$$ZI$$Limit[];
+
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+    uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
+    uint32_t sp_limit = __current_sp();
+
+    zi_limit = (zi_limit + 7) & ~0x7;    // ensure zi_limit is 8-byte aligned
+
+    struct __initial_stackheap r;
+    r.heap_base = zi_limit;
+    r.heap_limit = sp_limit;
+    return r;
+}
+
+#ifdef __cplusplus
+}
+#endif 

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_GCC_ARM/STM32F769NI.ld

@@ -0,0 +1,153 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{ 
+  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
+  RAM (rwx)  : ORIGIN = 0x200001F8, LENGTH = 512K - 0x1F8
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ * 
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   _estack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .text :
+    {
+        KEEP(*(.isr_vector))
+        *(.text*)
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+
+        KEEP(*(.eh_frame*))
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    __etext = .;
+    _sidata = .;
+
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        _sdata = .;
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+        . = ALIGN(4);
+        /* All data end */
+        __data_end__ = .;
+        _edata = .;
+
+    } > RAM
+
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        _sbss = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+        _ebss = .;
+    } > RAM
+
+    .heap (COPY):
+    {
+        __end__ = .;
+        end = __end__;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > RAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    _estack = __StackTop;
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_GCC_ARM/startup_stm32f769xx.S

@@ -0,0 +1,644 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32f769xx.s
+  * @author    MCD Application Team
+  * @version   V1.1.0
+  * @date      22-April-2016
+  * @brief     STM32F769xx Devices vector table for GCC based toolchain. 
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M7 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+    
+  .syntax unified
+  .cpu cortex-m7
+  .fpu softvfp
+  .thumb
+
+.global  g_pfnVectors
+.global  Default_Handler
+
+/* start address for the initialization values of the .data section. 
+defined in linker script */
+.word  _sidata
+/* start address for the .data section. defined in linker script */  
+.word  _sdata
+/* end address for the .data section. defined in linker script */
+.word  _edata
+/* start address for the .bss section. defined in linker script */
+.word  _sbss
+/* end address for the .bss section. defined in linker script */
+.word  _ebss
+/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
+
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called. 
+ * @param  None
+ * @retval : None
+*/
+
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
+  ldr   sp, =_estack      /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */  
+  movs  r1, #0
+  b  LoopCopyDataInit
+
+CopyDataInit:
+  ldr  r3, =_sidata
+  ldr  r3, [r3, r1]
+  str  r3, [r0, r1]
+  adds  r1, r1, #4
+    
+LoopCopyDataInit:
+  ldr  r0, =_sdata
+  ldr  r3, =_edata
+  adds  r2, r0, r1
+  cmp  r2, r3
+  bcc  CopyDataInit
+  ldr  r2, =_sbss
+  b  LoopFillZerobss
+/* Zero fill the bss segment. */  
+FillZerobss:
+  movs  r3, #0
+  str  r3, [r2], #4
+    
+LoopFillZerobss:
+  ldr  r3, = _ebss
+  cmp  r2, r3
+  bcc  FillZerobss
+
+/* Call the clock system initialization function.*/
+  bl  SystemInit   
+/* Call static constructors */
+  //bl __libc_init_array
+/* Call the application's entry point.*/
+  //bl  main
+  // Calling the crt0 'cold-start' entry point. There __libc_init_array is called
+  // and when existing hardware_init_hook() and software_init_hook() before 
+  // starting main(). software_init_hook() is available and has to be called due 
+  // to initializsation when using rtos.
+  bl _start
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an 
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ * @param  None     
+ * @retval None       
+*/
+    .section  .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M7. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+* 
+*******************************************************************************/
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+  .size  g_pfnVectors, .-g_pfnVectors
+   
+   
+g_pfnVectors:
+  .word  _estack
+  .word  Reset_Handler
+
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+  
+  /* External Interrupts */
+  .word     WWDG_IRQHandler                   /* Window WatchDog              */
+  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
+  .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
+  .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */
+  .word     FLASH_IRQHandler                  /* FLASH                        */
+  .word     RCC_IRQHandler                    /* RCC                          */
+  .word     EXTI0_IRQHandler                  /* EXTI Line0                   */
+  .word     EXTI1_IRQHandler                  /* EXTI Line1                   */
+  .word     EXTI2_IRQHandler                  /* EXTI Line2                   */
+  .word     EXTI3_IRQHandler                  /* EXTI Line3                   */
+  .word     EXTI4_IRQHandler                  /* EXTI Line4                   */
+  .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */
+  .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */
+  .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */
+  .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */
+  .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */
+  .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */
+  .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */
+  .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s         */
+  .word     CAN1_TX_IRQHandler                /* CAN1 TX                      */
+  .word     CAN1_RX0_IRQHandler               /* CAN1 RX0                     */
+  .word     CAN1_RX1_IRQHandler               /* CAN1 RX1                     */
+  .word     CAN1_SCE_IRQHandler               /* CAN1 SCE                     */
+  .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */
+  .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9          */
+  .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10        */
+  .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11 */
+  .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
+  .word     TIM2_IRQHandler                   /* TIM2                         */
+  .word     TIM3_IRQHandler                   /* TIM3                         */
+  .word     TIM4_IRQHandler                   /* TIM4                         */
+  .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */
+  .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */
+  .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */
+  .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */
+  .word     SPI1_IRQHandler                   /* SPI1                         */
+  .word     SPI2_IRQHandler                   /* SPI2                         */
+  .word     USART1_IRQHandler                 /* USART1                       */
+  .word     USART2_IRQHandler                 /* USART2                       */
+  .word     USART3_IRQHandler                 /* USART3                       */
+  .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */
+  .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */
+  .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line */
+  .word     TIM8_BRK_TIM12_IRQHandler         /* TIM8 Break and TIM12         */
+  .word     TIM8_UP_TIM13_IRQHandler          /* TIM8 Update and TIM13        */
+  .word     TIM8_TRG_COM_TIM14_IRQHandler     /* TIM8 Trigger and Commutation and TIM14 */
+  .word     TIM8_CC_IRQHandler                /* TIM8 Capture Compare         */
+  .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */
+  .word     FMC_IRQHandler                    /* FMC                          */
+  .word     SDMMC1_IRQHandler                 /* SDMMC1                       */
+  .word     TIM5_IRQHandler                   /* TIM5                         */
+  .word     SPI3_IRQHandler                   /* SPI3                         */
+  .word     UART4_IRQHandler                  /* UART4                        */
+  .word     UART5_IRQHandler                  /* UART5                        */
+  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC1&2 underrun errors */
+  .word     TIM7_IRQHandler                   /* TIM7                         */
+  .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */
+  .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */
+  .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */
+  .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */
+  .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */
+  .word     ETH_IRQHandler                    /* Ethernet                     */
+  .word     ETH_WKUP_IRQHandler               /* Ethernet Wakeup through EXTI line */
+  .word     CAN2_TX_IRQHandler                /* CAN2 TX                      */
+  .word     CAN2_RX0_IRQHandler               /* CAN2 RX0                     */
+  .word     CAN2_RX1_IRQHandler               /* CAN2 RX1                     */
+  .word     CAN2_SCE_IRQHandler               /* CAN2 SCE                     */
+  .word     OTG_FS_IRQHandler                 /* USB OTG FS                   */
+  .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */
+  .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */
+  .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */
+  .word     USART6_IRQHandler                 /* USART6                       */
+  .word     I2C3_EV_IRQHandler                /* I2C3 event                   */
+  .word     I2C3_ER_IRQHandler                /* I2C3 error                   */
+  .word     OTG_HS_EP1_OUT_IRQHandler         /* USB OTG HS End Point 1 Out   */
+  .word     OTG_HS_EP1_IN_IRQHandler          /* USB OTG HS End Point 1 In    */
+  .word     OTG_HS_WKUP_IRQHandler            /* USB OTG HS Wakeup through EXTI */
+  .word     OTG_HS_IRQHandler                 /* USB OTG HS                   */
+  .word     DCMI_IRQHandler                   /* DCMI                         */
+  .word     0                                 /* Reserved                     */
+  .word     RNG_IRQHandler                    /* RNG                          */
+  .word     FPU_IRQHandler                    /* FPU                          */
+  .word     UART7_IRQHandler                  /* UART7                        */
+  .word     UART8_IRQHandler                  /* UART8                        */
+  .word     SPI4_IRQHandler                   /* SPI4                         */
+  .word     SPI5_IRQHandler                   /* SPI5                         */
+  .word     SPI6_IRQHandler                   /* SPI6                         */
+  .word     SAI1_IRQHandler                   /* SAI1                         */
+  .word     LTDC_IRQHandler                   /* LTDC                         */
+  .word     LTDC_ER_IRQHandler                /* LTDC error                   */
+  .word     DMA2D_IRQHandler                  /* DMA2D                        */
+  .word     SAI2_IRQHandler                   /* SAI2                         */
+  .word     QUADSPI_IRQHandler                /* QUADSPI                      */
+  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
+  .word     CEC_IRQHandler                    /* HDMI_CEC                     */
+  .word     I2C4_EV_IRQHandler                /* I2C4 Event                   */
+  .word     I2C4_ER_IRQHandler                /* I2C4 Error                   */
+  .word     SPDIF_RX_IRQHandler               /* SPDIF_RX                     */
+  .word     DSI_IRQHandler                    /* DSI                          */
+  .word     DFSDM1_FLT0_IRQHandler            /* DFSDM1 Filter 0 global Interrupt */
+  .word     DFSDM1_FLT1_IRQHandler            /* DFSDM1 Filter 1 global Interrupt */
+  .word     DFSDM1_FLT2_IRQHandler            /* DFSDM1 Filter 2 global Interrupt */
+  .word     DFSDM1_FLT3_IRQHandler            /* DFSDM1 Filter 3 global Interrupt */
+  .word     SDMMC2_IRQHandler                 /* SDMMC2                       */
+  .word     CAN3_TX_IRQHandler                /* CAN3 TX                      */
+  .word     CAN3_RX0_IRQHandler               /* CAN3 RX0                     */
+  .word     CAN3_RX1_IRQHandler               /* CAN3 RX1                     */
+  .word     CAN3_SCE_IRQHandler               /* CAN3 SCE                     */
+  .word     JPEG_IRQHandler                   /* JPEG                         */
+  .word     MDIOS_IRQHandler                  /* MDIOS                        */
+  
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler. 
+* As they are weak aliases, any function with the same name will override 
+* this definition.
+* 
+*******************************************************************************/
+   .weak      NMI_Handler
+   .thumb_set NMI_Handler,Default_Handler
+  
+   .weak      HardFault_Handler
+   .thumb_set HardFault_Handler,Default_Handler
+  
+   .weak      MemManage_Handler
+   .thumb_set MemManage_Handler,Default_Handler
+  
+   .weak      BusFault_Handler
+   .thumb_set BusFault_Handler,Default_Handler
+
+   .weak      UsageFault_Handler
+   .thumb_set UsageFault_Handler,Default_Handler
+
+   .weak      SVC_Handler
+   .thumb_set SVC_Handler,Default_Handler
+
+   .weak      DebugMon_Handler
+   .thumb_set DebugMon_Handler,Default_Handler
+
+   .weak      PendSV_Handler
+   .thumb_set PendSV_Handler,Default_Handler
+
+   .weak      SysTick_Handler
+   .thumb_set SysTick_Handler,Default_Handler              
+  
+   .weak      WWDG_IRQHandler                   
+   .thumb_set WWDG_IRQHandler,Default_Handler      
+                  
+   .weak      PVD_IRQHandler      
+   .thumb_set PVD_IRQHandler,Default_Handler
+               
+   .weak      TAMP_STAMP_IRQHandler            
+   .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
+            
+   .weak      RTC_WKUP_IRQHandler                  
+   .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+            
+   .weak      FLASH_IRQHandler         
+   .thumb_set FLASH_IRQHandler,Default_Handler
+                  
+   .weak      RCC_IRQHandler      
+   .thumb_set RCC_IRQHandler,Default_Handler
+                  
+   .weak      EXTI0_IRQHandler         
+   .thumb_set EXTI0_IRQHandler,Default_Handler
+                  
+   .weak      EXTI1_IRQHandler         
+   .thumb_set EXTI1_IRQHandler,Default_Handler
+                     
+   .weak      EXTI2_IRQHandler         
+   .thumb_set EXTI2_IRQHandler,Default_Handler 
+                 
+   .weak      EXTI3_IRQHandler         
+   .thumb_set EXTI3_IRQHandler,Default_Handler
+                        
+   .weak      EXTI4_IRQHandler         
+   .thumb_set EXTI4_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream0_IRQHandler               
+   .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
+         
+   .weak      DMA1_Stream1_IRQHandler               
+   .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream2_IRQHandler               
+   .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream3_IRQHandler               
+   .thumb_set DMA1_Stream3_IRQHandler,Default_Handler 
+                 
+   .weak      DMA1_Stream4_IRQHandler              
+   .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream5_IRQHandler               
+   .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream6_IRQHandler               
+   .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
+                  
+   .weak      ADC_IRQHandler      
+   .thumb_set ADC_IRQHandler,Default_Handler
+               
+   .weak      CAN1_TX_IRQHandler   
+   .thumb_set CAN1_TX_IRQHandler,Default_Handler
+            
+   .weak      CAN1_RX0_IRQHandler                  
+   .thumb_set CAN1_RX0_IRQHandler,Default_Handler
+                           
+   .weak      CAN1_RX1_IRQHandler                  
+   .thumb_set CAN1_RX1_IRQHandler,Default_Handler
+            
+   .weak      CAN1_SCE_IRQHandler                  
+   .thumb_set CAN1_SCE_IRQHandler,Default_Handler
+            
+   .weak      EXTI9_5_IRQHandler   
+   .thumb_set EXTI9_5_IRQHandler,Default_Handler
+            
+   .weak      TIM1_BRK_TIM9_IRQHandler            
+   .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
+            
+   .weak      TIM1_UP_TIM10_IRQHandler            
+   .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
+
+   .weak      TIM1_TRG_COM_TIM11_IRQHandler      
+   .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
+      
+   .weak      TIM1_CC_IRQHandler   
+   .thumb_set TIM1_CC_IRQHandler,Default_Handler
+                  
+   .weak      TIM2_IRQHandler            
+   .thumb_set TIM2_IRQHandler,Default_Handler
+                  
+   .weak      TIM3_IRQHandler            
+   .thumb_set TIM3_IRQHandler,Default_Handler
+                  
+   .weak      TIM4_IRQHandler            
+   .thumb_set TIM4_IRQHandler,Default_Handler
+                  
+   .weak      I2C1_EV_IRQHandler   
+   .thumb_set I2C1_EV_IRQHandler,Default_Handler
+                     
+   .weak      I2C1_ER_IRQHandler   
+   .thumb_set I2C1_ER_IRQHandler,Default_Handler
+                     
+   .weak      I2C2_EV_IRQHandler   
+   .thumb_set I2C2_EV_IRQHandler,Default_Handler
+                  
+   .weak      I2C2_ER_IRQHandler   
+   .thumb_set I2C2_ER_IRQHandler,Default_Handler
+                           
+   .weak      SPI1_IRQHandler            
+   .thumb_set SPI1_IRQHandler,Default_Handler
+                        
+   .weak      SPI2_IRQHandler            
+   .thumb_set SPI2_IRQHandler,Default_Handler
+                  
+   .weak      USART1_IRQHandler      
+   .thumb_set USART1_IRQHandler,Default_Handler
+                     
+   .weak      USART2_IRQHandler      
+   .thumb_set USART2_IRQHandler,Default_Handler
+                     
+   .weak      USART3_IRQHandler      
+   .thumb_set USART3_IRQHandler,Default_Handler
+                  
+   .weak      EXTI15_10_IRQHandler               
+   .thumb_set EXTI15_10_IRQHandler,Default_Handler
+               
+   .weak      RTC_Alarm_IRQHandler               
+   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+            
+   .weak      OTG_FS_WKUP_IRQHandler         
+   .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
+            
+   .weak      TIM8_BRK_TIM12_IRQHandler         
+   .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
+         
+   .weak      TIM8_UP_TIM13_IRQHandler            
+   .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
+         
+   .weak      TIM8_TRG_COM_TIM14_IRQHandler      
+   .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
+      
+   .weak      TIM8_CC_IRQHandler   
+   .thumb_set TIM8_CC_IRQHandler,Default_Handler
+                  
+   .weak      DMA1_Stream7_IRQHandler               
+   .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
+                     
+   .weak      FMC_IRQHandler            
+   .thumb_set FMC_IRQHandler,Default_Handler
+                     
+   .weak      SDMMC1_IRQHandler            
+   .thumb_set SDMMC1_IRQHandler,Default_Handler
+                     
+   .weak      TIM5_IRQHandler            
+   .thumb_set TIM5_IRQHandler,Default_Handler
+                     
+   .weak      SPI3_IRQHandler            
+   .thumb_set SPI3_IRQHandler,Default_Handler
+                     
+   .weak      UART4_IRQHandler         
+   .thumb_set UART4_IRQHandler,Default_Handler
+                  
+   .weak      UART5_IRQHandler         
+   .thumb_set UART5_IRQHandler,Default_Handler
+                  
+   .weak      TIM6_DAC_IRQHandler                  
+   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+               
+   .weak      TIM7_IRQHandler            
+   .thumb_set TIM7_IRQHandler,Default_Handler
+         
+   .weak      DMA2_Stream0_IRQHandler               
+   .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
+               
+   .weak      DMA2_Stream1_IRQHandler               
+   .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
+                  
+   .weak      DMA2_Stream2_IRQHandler               
+   .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
+            
+   .weak      DMA2_Stream3_IRQHandler               
+   .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
+            
+   .weak      DMA2_Stream4_IRQHandler               
+   .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
+   
+   .weak      DMA2_Stream4_IRQHandler               
+   .thumb_set DMA2_Stream4_IRQHandler,Default_Handler   
+
+   .weak      ETH_IRQHandler   
+   .thumb_set ETH_IRQHandler,Default_Handler
+   
+   .weak      ETH_WKUP_IRQHandler   
+   .thumb_set ETH_WKUP_IRQHandler,Default_Handler
+
+   .weak      CAN2_TX_IRQHandler   
+   .thumb_set CAN2_TX_IRQHandler,Default_Handler   
+                           
+   .weak      CAN2_RX0_IRQHandler                  
+   .thumb_set CAN2_RX0_IRQHandler,Default_Handler
+                           
+   .weak      CAN2_RX1_IRQHandler                  
+   .thumb_set CAN2_RX1_IRQHandler,Default_Handler
+                           
+   .weak      CAN2_SCE_IRQHandler                  
+   .thumb_set CAN2_SCE_IRQHandler,Default_Handler
+                           
+   .weak      OTG_FS_IRQHandler      
+   .thumb_set OTG_FS_IRQHandler,Default_Handler
+                     
+   .weak      DMA2_Stream5_IRQHandler               
+   .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
+                  
+   .weak      DMA2_Stream6_IRQHandler               
+   .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
+                  
+   .weak      DMA2_Stream7_IRQHandler               
+   .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
+                  
+   .weak      USART6_IRQHandler      
+   .thumb_set USART6_IRQHandler,Default_Handler
+                        
+   .weak      I2C3_EV_IRQHandler   
+   .thumb_set I2C3_EV_IRQHandler,Default_Handler
+                        
+   .weak      I2C3_ER_IRQHandler   
+   .thumb_set I2C3_ER_IRQHandler,Default_Handler
+                        
+   .weak      OTG_HS_EP1_OUT_IRQHandler         
+   .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
+               
+   .weak      OTG_HS_EP1_IN_IRQHandler            
+   .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
+               
+   .weak      OTG_HS_WKUP_IRQHandler         
+   .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
+            
+   .weak      OTG_HS_IRQHandler      
+   .thumb_set OTG_HS_IRQHandler,Default_Handler
+                  
+   .weak      DCMI_IRQHandler            
+   .thumb_set DCMI_IRQHandler,Default_Handler
+
+   .weak      RNG_IRQHandler            
+   .thumb_set RNG_IRQHandler,Default_Handler   
+
+   .weak      FPU_IRQHandler                  
+   .thumb_set FPU_IRQHandler,Default_Handler
+
+   .weak      UART7_IRQHandler                  
+   .thumb_set UART7_IRQHandler,Default_Handler
+
+   .weak      UART8_IRQHandler                  
+   .thumb_set UART8_IRQHandler,Default_Handler   
+
+   .weak      SPI4_IRQHandler            
+   .thumb_set SPI4_IRQHandler,Default_Handler
+   
+   .weak      SPI5_IRQHandler            
+   .thumb_set SPI5_IRQHandler,Default_Handler
+
+   .weak      SPI6_IRQHandler            
+   .thumb_set SPI6_IRQHandler,Default_Handler   
+
+   .weak      SAI1_IRQHandler            
+   .thumb_set SAI1_IRQHandler,Default_Handler
+   
+   .weak      LTDC_IRQHandler            
+   .thumb_set LTDC_IRQHandler,Default_Handler
+
+   .weak      LTDC_ER_IRQHandler            
+   .thumb_set LTDC_ER_IRQHandler,Default_Handler
+
+   .weak      DMA2D_IRQHandler            
+   .thumb_set DMA2D_IRQHandler,Default_Handler   
+
+   .weak      SAI2_IRQHandler            
+   .thumb_set SAI2_IRQHandler,Default_Handler
+   
+   .weak      QUADSPI_IRQHandler            
+   .thumb_set QUADSPI_IRQHandler,Default_Handler
+ 
+   .weak      LPTIM1_IRQHandler            
+   .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+   .weak      CEC_IRQHandler            
+   .thumb_set CEC_IRQHandler,Default_Handler
+   
+   .weak      I2C4_EV_IRQHandler            
+   .thumb_set I2C4_EV_IRQHandler,Default_Handler 
+ 
+   .weak      I2C4_ER_IRQHandler            
+   .thumb_set I2C4_ER_IRQHandler,Default_Handler
+   
+   .weak      SPDIF_RX_IRQHandler            
+   .thumb_set SPDIF_RX_IRQHandler,Default_Handler
+
+   .weak      DSI_IRQHandler            
+   .thumb_set DSI_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT0_IRQHandler            
+   .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT1_IRQHandler            
+   .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT2_IRQHandler            
+   .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
+
+   .weak      DFSDM1_FLT3_IRQHandler            
+   .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
+
+   .weak      SDMMC2_IRQHandler            
+   .thumb_set SDMMC2_IRQHandler,Default_Handler
+
+   .weak      CAN3_TX_IRQHandler            
+   .thumb_set CAN3_TX_IRQHandler,Default_Handler
+
+   .weak      CAN3_RX0_IRQHandler            
+   .thumb_set CAN3_RX0_IRQHandler,Default_Handler
+
+   .weak      CAN3_RX1_IRQHandler            
+   .thumb_set CAN3_RX1_IRQHandler,Default_Handler
+
+   .weak      CAN3_SCE_IRQHandler            
+   .thumb_set CAN3_SCE_IRQHandler,Default_Handler
+
+   .weak      JPEG_IRQHandler            
+   .thumb_set JPEG_IRQHandler,Default_Handler
+
+   .weak      MDIOS_IRQHandler            
+   .thumb_set MDIOS_IRQHandler,Default_Handler   
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/        
+ 

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_IAR/startup_stm32f769xx.S

@@ -0,0 +1,804 @@
+;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name          : startup_stm32f769xx.s
+;* Author             : MCD Application Team
+;* Version            : V1.0.1
+;* Date               : 22-April-2016
+;* Description        : STM32F769xx devices vector table for EWARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == _iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR 
+;*                        address.
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M7 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* 
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;* 
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+        DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+        DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+        DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+        DCD     FLASH_IRQHandler                  ; FLASH                                           
+        DCD     RCC_IRQHandler                    ; RCC                                             
+        DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+        DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+        DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+        DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+        DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+        DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+        DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+        DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+        DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+        DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+        DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+        DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+        DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+        DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
+        DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
+        DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
+        DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
+        DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+        DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+        DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+        DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+        DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+        DCD     TIM2_IRQHandler                   ; TIM2                                            
+        DCD     TIM3_IRQHandler                   ; TIM3                                            
+        DCD     TIM4_IRQHandler                   ; TIM4                                            
+        DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+        DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+        DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+        DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+        DCD     SPI1_IRQHandler                   ; SPI1                                            
+        DCD     SPI2_IRQHandler                   ; SPI2                                            
+        DCD     USART1_IRQHandler                 ; USART1                                          
+        DCD     USART2_IRQHandler                 ; USART2                                          
+        DCD     USART3_IRQHandler                 ; USART3                                          
+        DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+        DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+        DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+        DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
+        DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
+        DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
+        DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
+        DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+        DCD     FMC_IRQHandler                    ; FMC                                            
+        DCD     SDMMC1_IRQHandler                 ; SDMMC1                                            
+        DCD     TIM5_IRQHandler                   ; TIM5                                            
+        DCD     SPI3_IRQHandler                   ; SPI3                                            
+        DCD     UART4_IRQHandler                  ; UART4                                           
+        DCD     UART5_IRQHandler                  ; UART5                                           
+        DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
+        DCD     TIM7_IRQHandler                   ; TIM7                   
+        DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+        DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+        DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+        DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+        DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
+        DCD     ETH_IRQHandler                    ; Ethernet                                        
+        DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
+        DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
+        DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
+        DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
+        DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
+        DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+        DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+        DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+        DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+        DCD     USART6_IRQHandler                 ; USART6                                           
+        DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+        DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+        DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+        DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+        DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+        DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
+        DCD     DCMI_IRQHandler                   ; DCMI                                            
+        DCD     0                                 ; Reserved                                     
+        DCD     RNG_IRQHandler                    ; Rng
+        DCD     FPU_IRQHandler                    ; FPU
+        DCD     UART7_IRQHandler                  ; UART7
+        DCD     UART8_IRQHandler                  ; UART8
+        DCD     SPI4_IRQHandler                   ; SPI4
+        DCD     SPI5_IRQHandler                   ; SPI5
+        DCD     SPI6_IRQHandler                   ; SPI6
+        DCD     SAI1_IRQHandler                   ; SAI1
+        DCD     LTDC_IRQHandler                   ; LTDC
+        DCD     LTDC_ER_IRQHandler                ; LTDC error
+        DCD     DMA2D_IRQHandler                  ; DMA2D
+        DCD     SAI2_IRQHandler                   ; SAI2
+        DCD     QUADSPI_IRQHandler                ; QUADSPI
+        DCD     LPTIM1_IRQHandler                 ; LPTIM1
+        DCD     CEC_IRQHandler                    ; HDMI_CEC
+        DCD     I2C4_EV_IRQHandler                ; I2C4 Event                                             
+        DCD     I2C4_ER_IRQHandler                ; I2C4 Error 
+        DCD     SPDIF_RX_IRQHandler               ; SPDIF_RX		
+        DCD     DSI_IRQHandler                    ; DSI  	
+        DCD     DFSDM0_IRQHandler	          ; DFSDM Filter1                                            
+        DCD     DFSDM1_IRQHandler	          ; DFSDM Filter2                                            
+        DCD     DFSDM2_IRQHandler	          ; DFSDM Filter3                                            
+        DCD     DFSDM3_IRQHandler	          ; DFSDM Filter4
+        DCD     SDMMC2_IRQHandler                 ; SDMMC2   
+        DCD     CAN3_TX_IRQHandler                ; CAN3 TX                                                
+        DCD     CAN3_RX0_IRQHandler               ; CAN3 RX0                                               
+        DCD     CAN3_RX1_IRQHandler               ; CAN3 RX1                                               
+        DCD     CAN3_SCE_IRQHandler               ; CAN3 SCE 
+        DCD     JPEG_IRQHandler                   ; JPEG
+        DCD     MDIOS_IRQHandler                  ; MDIOS
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+        B NMI_Handler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+        B HardFault_Handler
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+        B MemManage_Handler
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+        B BusFault_Handler
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+        B UsageFault_Handler
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+        B SysTick_Handler
+
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler  
+        B WWDG_IRQHandler
+
+        PUBWEAK PVD_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_IRQHandler  
+        B PVD_IRQHandler
+
+        PUBWEAK TAMP_STAMP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TAMP_STAMP_IRQHandler  
+        B TAMP_STAMP_IRQHandler
+
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+RTC_WKUP_IRQHandler  
+        B RTC_WKUP_IRQHandler
+
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler  
+        B FLASH_IRQHandler
+
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler  
+        B RCC_IRQHandler
+
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler  
+        B EXTI0_IRQHandler
+
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler  
+        B EXTI1_IRQHandler
+
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler  
+        B EXTI2_IRQHandler
+
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+EXTI4_IRQHandler  
+        B EXTI4_IRQHandler
+
+        PUBWEAK DMA1_Stream0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream0_IRQHandler  
+        B DMA1_Stream0_IRQHandler
+
+        PUBWEAK DMA1_Stream1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream1_IRQHandler  
+        B DMA1_Stream1_IRQHandler
+
+        PUBWEAK DMA1_Stream2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream2_IRQHandler  
+        B DMA1_Stream2_IRQHandler
+
+        PUBWEAK DMA1_Stream3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream3_IRQHandler  
+        B DMA1_Stream3_IRQHandler
+
+        PUBWEAK DMA1_Stream4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream4_IRQHandler  
+        B DMA1_Stream4_IRQHandler
+
+        PUBWEAK DMA1_Stream5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream5_IRQHandler  
+        B DMA1_Stream5_IRQHandler
+
+        PUBWEAK DMA1_Stream6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream6_IRQHandler  
+        B DMA1_Stream6_IRQHandler
+
+        PUBWEAK ADC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ADC_IRQHandler  
+        B ADC_IRQHandler
+
+        PUBWEAK CAN1_TX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CAN1_TX_IRQHandler  
+        B CAN1_TX_IRQHandler
+
+        PUBWEAK CAN1_RX0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+CAN1_RX0_IRQHandler  
+        B CAN1_RX0_IRQHandler
+
+        PUBWEAK CAN1_RX1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+CAN1_RX1_IRQHandler  
+        B CAN1_RX1_IRQHandler
+
+        PUBWEAK CAN1_SCE_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+CAN1_SCE_IRQHandler  
+        B CAN1_SCE_IRQHandler
+
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+EXTI9_5_IRQHandler  
+        B EXTI9_5_IRQHandler
+
+        PUBWEAK TIM1_BRK_TIM9_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM1_BRK_TIM9_IRQHandler  
+        B TIM1_BRK_TIM9_IRQHandler
+
+        PUBWEAK TIM1_UP_TIM10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM1_UP_TIM10_IRQHandler  
+        B TIM1_UP_TIM10_IRQHandler
+
+        PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM1_TRG_COM_TIM11_IRQHandler  
+        B TIM1_TRG_COM_TIM11_IRQHandler
+        
+        PUBWEAK TIM1_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM1_CC_IRQHandler  
+        B TIM1_CC_IRQHandler
+
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler  
+        B TIM2_IRQHandler
+
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler  
+        B TIM3_IRQHandler
+
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler  
+        B TIM4_IRQHandler
+
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C1_EV_IRQHandler  
+        B I2C1_EV_IRQHandler
+
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C1_ER_IRQHandler  
+        B I2C1_ER_IRQHandler
+
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C2_EV_IRQHandler  
+        B I2C2_EV_IRQHandler
+
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C2_ER_IRQHandler  
+        B I2C2_ER_IRQHandler
+
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler  
+        B SPI1_IRQHandler
+
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler  
+        B SPI2_IRQHandler
+
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler  
+        B USART1_IRQHandler
+
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler  
+        B USART2_IRQHandler
+
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler  
+        B USART3_IRQHandler
+
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)   
+EXTI15_10_IRQHandler  
+        B EXTI15_10_IRQHandler
+
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)   
+RTC_Alarm_IRQHandler  
+        B RTC_Alarm_IRQHandler
+
+        PUBWEAK OTG_FS_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+OTG_FS_WKUP_IRQHandler  
+        B OTG_FS_WKUP_IRQHandler
+      
+        PUBWEAK TIM8_BRK_TIM12_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM8_BRK_TIM12_IRQHandler  
+        B TIM8_BRK_TIM12_IRQHandler
+
+        PUBWEAK TIM8_UP_TIM13_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM8_UP_TIM13_IRQHandler  
+        B TIM8_UP_TIM13_IRQHandler
+
+        PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+TIM8_TRG_COM_TIM14_IRQHandler  
+        B TIM8_TRG_COM_TIM14_IRQHandler
+
+        PUBWEAK TIM8_CC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+TIM8_CC_IRQHandler  
+        B TIM8_CC_IRQHandler
+
+        PUBWEAK DMA1_Stream7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA1_Stream7_IRQHandler  
+        B DMA1_Stream7_IRQHandler
+
+        PUBWEAK FMC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler  
+        B FMC_IRQHandler
+
+        PUBWEAK SDMMC1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SDMMC1_IRQHandler  
+        B SDMMC1_IRQHandler
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler  
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler  
+        B SPI3_IRQHandler
+
+        PUBWEAK UART4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler  
+        B UART4_IRQHandler
+
+        PUBWEAK UART5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler  
+        B UART5_IRQHandler
+
+        PUBWEAK TIM6_DAC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)   
+TIM6_DAC_IRQHandler  
+        B TIM6_DAC_IRQHandler
+
+        PUBWEAK TIM7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)   
+TIM7_IRQHandler  
+        B TIM7_IRQHandler
+
+        PUBWEAK DMA2_Stream0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream0_IRQHandler  
+        B DMA2_Stream0_IRQHandler
+
+        PUBWEAK DMA2_Stream1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream1_IRQHandler  
+        B DMA2_Stream1_IRQHandler
+
+        PUBWEAK DMA2_Stream2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream2_IRQHandler  
+        B DMA2_Stream2_IRQHandler
+
+        PUBWEAK DMA2_Stream3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream3_IRQHandler  
+        B DMA2_Stream3_IRQHandler
+
+        PUBWEAK DMA2_Stream4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream4_IRQHandler  
+        B DMA2_Stream4_IRQHandler
+
+        PUBWEAK ETH_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+ETH_IRQHandler  
+        B ETH_IRQHandler
+
+        PUBWEAK ETH_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+ETH_WKUP_IRQHandler  
+        B ETH_WKUP_IRQHandler
+
+        PUBWEAK CAN2_TX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CAN2_TX_IRQHandler  
+        B CAN2_TX_IRQHandler
+
+        PUBWEAK CAN2_RX0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+CAN2_RX0_IRQHandler  
+        B CAN2_RX0_IRQHandler
+
+        PUBWEAK CAN2_RX1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+CAN2_RX1_IRQHandler  
+        B CAN2_RX1_IRQHandler
+
+        PUBWEAK CAN2_SCE_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+CAN2_SCE_IRQHandler  
+        B CAN2_SCE_IRQHandler
+
+        PUBWEAK OTG_FS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+OTG_FS_IRQHandler  
+        B OTG_FS_IRQHandler
+
+        PUBWEAK DMA2_Stream5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream5_IRQHandler  
+        B DMA2_Stream5_IRQHandler
+
+        PUBWEAK DMA2_Stream6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream6_IRQHandler  
+        B DMA2_Stream6_IRQHandler
+
+        PUBWEAK DMA2_Stream7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+DMA2_Stream7_IRQHandler  
+        B DMA2_Stream7_IRQHandler
+
+        PUBWEAK USART6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+USART6_IRQHandler  
+        B USART6_IRQHandler
+
+        PUBWEAK I2C3_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C3_EV_IRQHandler  
+        B I2C3_EV_IRQHandler
+
+        PUBWEAK I2C3_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C3_ER_IRQHandler  
+        B I2C3_ER_IRQHandler
+
+        PUBWEAK OTG_HS_EP1_OUT_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+OTG_HS_EP1_OUT_IRQHandler  
+        B OTG_HS_EP1_OUT_IRQHandler
+
+        PUBWEAK OTG_HS_EP1_IN_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+OTG_HS_EP1_IN_IRQHandler  
+        B OTG_HS_EP1_IN_IRQHandler
+
+        PUBWEAK OTG_HS_WKUP_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)    
+OTG_HS_WKUP_IRQHandler  
+        B OTG_HS_WKUP_IRQHandler
+
+        PUBWEAK OTG_HS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+OTG_HS_IRQHandler  
+        B OTG_HS_IRQHandler
+
+        PUBWEAK DCMI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)
+DCMI_IRQHandler  
+        B DCMI_IRQHandler
+
+        PUBWEAK RNG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+RNG_IRQHandler  
+        B RNG_IRQHandler
+
+        PUBWEAK FPU_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)  
+FPU_IRQHandler  
+        B FPU_IRQHandler
+
+        PUBWEAK UART7_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1)      
+UART7_IRQHandler 
+        B UART7_IRQHandler  
+
+        PUBWEAK UART8_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+UART8_IRQHandler             
+        B UART8_IRQHandler
+        
+        PUBWEAK SPI4_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+SPI4_IRQHandler
+        B SPI4_IRQHandler                 
+
+        PUBWEAK SPI5_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+SPI5_IRQHandler   
+        B SPI5_IRQHandler                  
+
+        PUBWEAK SPI6_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+SPI6_IRQHandler 
+        B SPI6_IRQHandler                    
+
+        PUBWEAK SAI1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+SAI1_IRQHandler  
+        B SAI1_IRQHandler                  
+
+        PUBWEAK LTDC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+LTDC_IRQHandler 
+        B LTDC_IRQHandler                     
+
+        PUBWEAK LTDC_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+LTDC_ER_IRQHandler 
+        B LTDC_ER_IRQHandler                 
+
+        PUBWEAK DMA2D_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+DMA2D_IRQHandler 
+        B DMA2D_IRQHandler                  
+
+       PUBWEAK SAI2_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1) 
+SAI2_IRQHandler 
+        B SAI2_IRQHandler          
+
+       PUBWEAK QUADSPI_IRQHandler
+       SECTION .text:CODE:NOROOT:REORDER(1) 
+QUADSPI_IRQHandler 
+        B QUADSPI_IRQHandler       
+        
+        PUBWEAK LPTIM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+LPTIM1_IRQHandler 
+        B LPTIM1_IRQHandler   
+        
+        PUBWEAK CEC_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CEC_IRQHandler 
+        B CEC_IRQHandler 
+
+        PUBWEAK I2C4_EV_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C4_EV_IRQHandler 
+        B I2C4_EV_IRQHandler   
+        
+        PUBWEAK I2C4_ER_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+I2C4_ER_IRQHandler 
+        B I2C4_ER_IRQHandler 
+ 
+        PUBWEAK SPDIF_RX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+SPDIF_RX_IRQHandler 
+        B SPDIF_RX_IRQHandler
+
+        PUBWEAK DSI_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+DSI_IRQHandler 
+        B DSI_IRQHandler
+		
+        PUBWEAK DFSDM0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+DFSDM0_IRQHandler 
+        B DFSDM0_IRQHandler
+
+        PUBWEAK DFSDM1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+DFSDM1_IRQHandler 
+        B DFSDM1_IRQHandler
+
+        PUBWEAK DFSDM2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+DFSDM2_IRQHandler 
+        B DFSDM2_IRQHandler
+
+        PUBWEAK DFSDM3_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+DFSDM3_IRQHandler 
+        B DFSDM3_IRQHandler
+
+        PUBWEAK SDMMC2_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+SDMMC2_IRQHandler 
+        B SDMMC2_IRQHandler
+
+        PUBWEAK CAN3_TX_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CAN3_TX_IRQHandler 
+        B CAN3_TX_IRQHandler
+
+        PUBWEAK CAN3_RX0_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CAN3_RX0_IRQHandler 
+        B CAN3_RX0_IRQHandler
+
+        PUBWEAK CAN3_RX1_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CAN3_RX1_IRQHandler 
+        B CAN3_RX1_IRQHandler
+
+        PUBWEAK CAN3_SCE_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+CAN3_SCE_IRQHandler 
+        B CAN3_SCE_IRQHandler
+
+        PUBWEAK JPEG_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+JPEG_IRQHandler 
+        B JPEG_IRQHandler
+
+        PUBWEAK MDIOS_IRQHandler
+        SECTION .text:CODE:NOROOT:REORDER(1) 
+MDIOS_IRQHandler 
+        B MDIOS_IRQHandler			
+        END
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_IAR/stm32f769ni.icf

@@ -0,0 +1,35 @@
+/* [ROM = 2048kb = 0x200000] */
+define symbol __intvec_start__     = 0x08000000;
+define symbol __region_ROM_start__ = 0x08000000;
+define symbol __region_ROM_end__   = 0x081FFFFF;
+
+/* [RAM = 512kb = 0x80000] Vector table dynamic copy: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM */
+define symbol __NVIC_start__          = 0x20000000;
+define symbol __NVIC_end__            = 0x200001F7; /* Aligned on 8 bytes */
+define symbol __region_RAM_start__    = 0x200001F8;
+define symbol __region_RAM_end__      = 0x2007FFFF;
+
+define symbol __region_ITCMRAM_start__ = 0x00000000;
+define symbol __region_ITCMRAM_end__   = 0x00003FFF;
+
+/* Memory regions */
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
+define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
+define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_ITCMRAM_end__];
+
+/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x8000;
+define symbol __size_heap__   = 0x8000;
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+
+initialize by copy with packing = zeros { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite, block STACKHEAP };

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/cmsis.h

@@ -1,6 +1,5 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
 /* mbed Microcontroller Library
+ * A generic CMSIS include header
  *******************************************************************************
  * Copyright (c) 2016, STMicroelectronics
  * All rights reserved.
@@ -29,26 +28,11 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *******************************************************************************
  */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
 
+#ifndef MBED_CMSIS_H
+#define MBED_CMSIS_H
 
-
-
-
-
-
-
-
-
-
-//=======================================
-
-#define DEVICE_ID_LENGTH       24
-
-
-
-
-#include "objects.h"
+#include "stm32f7xx.h"
+#include "cmsis_nvic.h"
 
 #endif

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/cmsis_nvic.c

@@ -1,4 +1,5 @@
 /* mbed Microcontroller Library
+ * CMSIS-style functionality to support dynamic vectors
  *******************************************************************************
  * Copyright (c) 2016, STMicroelectronics
  * All rights reserved.
@@ -27,46 +28,28 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *******************************************************************************
  */
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
+#include "cmsis_nvic.h"
 
-#define DEVICE_PORTIN           1
-#define DEVICE_PORTOUT          1
-#define DEVICE_PORTINOUT        1
+#define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
+#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
 
-#define DEVICE_INTERRUPTIN      1
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
+    uint32_t *vectors = (uint32_t *)SCB->VTOR;
+    uint32_t i;
 
-#define DEVICE_ANALOGIN         1
-#define DEVICE_ANALOGOUT        1
+    // Copy and switch to dynamic vectors if the first time called
+    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+        uint32_t *old_vectors = vectors;
+        vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
+        for (i=0; i<NVIC_NUM_VECTORS; i++) {
+            vectors[i] = old_vectors[i];
+        }
+        SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
+    }
+    vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+}
 
-#define DEVICE_SERIAL           1
-#define DEVICE_SERIAL_FC        0
-
-#define DEVICE_I2C              1
-#define DEVICE_I2CSLAVE         1
-
-#define DEVICE_SPI              1
-#define DEVICE_SPISLAVE         1
-
-#define DEVICE_RTC              1
-#define DEVICE_RTC_LSI          0
-
-#define DEVICE_PWMOUT           1
-
-#define DEVICE_SLEEP            1
-
-//=======================================
-
-#define DEVICE_SEMIHOST         0
-#define DEVICE_LOCALFILESYSTEM  0
-#define DEVICE_ID_LENGTH       24
-
-#define DEVICE_DEBUG_AWARENESS  0
-
-#define DEVICE_STDIO_MESSAGES   1
-
-#define DEVICE_ERROR_RED        0
-
-#include "objects.h"
-
-#endif
+uint32_t NVIC_GetVector(IRQn_Type IRQn) {
+    uint32_t *vectors = (uint32_t*)SCB->VTOR;
+    return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
+}

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/cmsis_nvic.h

@@ -1,6 +1,5 @@
-// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
-// Check the 'features' section of the target description in 'targets.json' for more details.
 /* mbed Microcontroller Library
+ * CMSIS-style functionality to support dynamic vectors
  *******************************************************************************
  * Copyright (c) 2016, STMicroelectronics
  * All rights reserved.
@@ -29,27 +28,27 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *******************************************************************************
  */ 
-#ifndef MBED_DEVICE_H
-#define MBED_DEVICE_H
 
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
 
+// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
+// MCU Peripherals: 98 vectors = 392 bytes from 0x40 to 0x1C7
+// Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM
+#define NVIC_NUM_VECTORS      114
+#define NVIC_USER_IRQ_OFFSET  16
 
+#include "cmsis.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
 
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
+uint32_t NVIC_GetVector(IRQn_Type IRQn);
 
-
-
-
-
-
-//=======================================
-
-#define DEVICE_ID_LENGTH       24
-
-
-
-#define LED_RED                 LED2
-
-#include "objects.h"
+#ifdef __cplusplus
+}
+#endif
 
 #endif

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/hal_tick.c

@@ -0,0 +1,144 @@
+/**
+  ******************************************************************************
+  * @file    hal_tick.c
+  * @author  MCD Application Team
+  * @brief   Initialization of HAL tick
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#include "hal_tick.h"
+
+// 0=NO, 1=PG6 toggles at each tick
+#define DEBUG_TICK 0
+
+TIM_HandleTypeDef TimMasterHandle;
+uint32_t PreviousVal = 0;
+
+void HAL_IncTick(void);
+void us_ticker_irq_handler(void);
+
+void timer_irq_handler(void) {
+    // Channel 1 for mbed timeout
+    if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC1) == SET) {
+        if (__HAL_TIM_GET_IT_SOURCE(&TimMasterHandle, TIM_IT_CC1) == SET) {
+            __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1);
+            us_ticker_irq_handler();
+        }
+    }
+
+    // Channel 2 for HAL tick
+    if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC2) == SET) {
+        if (__HAL_TIM_GET_IT_SOURCE(&TimMasterHandle, TIM_IT_CC2) == SET) {
+            __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
+            uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
+            if ((val - PreviousVal) >= HAL_TICK_DELAY) {
+                // Increment HAL variable
+                HAL_IncTick();
+                // Prepare next interrupt
+                __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
+                PreviousVal = val;
+#if DEBUG_TICK > 0
+                HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_6);
+#endif
+            }
+        }
+    }
+}
+
+// Reconfigure the HAL tick using a standard timer instead of systick.
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+    uint32_t PclkFreq;
+
+    // Get clock configuration
+    // Note: PclkFreq contains here the Latency (not used after)
+    HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &PclkFreq);
+
+    // Get TIM5 clock value
+    PclkFreq = HAL_RCC_GetPCLK1Freq();
+
+    // Enable timer clock
+    TIM_MST_RCC;
+
+    // Reset timer
+    TIM_MST_RESET_ON;
+    TIM_MST_RESET_OFF;
+
+    // Configure time base
+    TimMasterHandle.Instance = TIM_MST;
+    TimMasterHandle.Init.Period = 0xFFFFFFFF;
+
+    // TIMxCLK = PCLKx when the APB prescaler = 1 else TIMxCLK = 2 * PCLKx
+    if (RCC_ClkInitStruct.APB1CLKDivider == RCC_HCLK_DIV1)
+      TimMasterHandle.Init.Prescaler = (uint16_t)((PclkFreq) / 1000000) - 1; // 1 us tick
+    else
+      TimMasterHandle.Init.Prescaler = (uint16_t)((PclkFreq * 2) / 1000000) - 1; // 1 us tick  
+
+    TimMasterHandle.Init.ClockDivision     = 0;
+    TimMasterHandle.Init.CounterMode       = TIM_COUNTERMODE_UP;
+    TimMasterHandle.Init.RepetitionCounter = 0;
+    HAL_TIM_OC_Init(&TimMasterHandle);
+
+    NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
+    NVIC_EnableIRQ(TIM_MST_IRQ);
+
+    // Channel 1 for mbed timeout
+    HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
+
+    // Channel 2 for HAL tick
+    HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
+    PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
+    __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
+    __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
+
+#if DEBUG_TICK > 0
+    __GPIOG_CLK_ENABLE();
+    GPIO_InitTypeDef GPIO_InitStruct;
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+#endif
+
+    return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */    
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/hal_tick.h

@@ -0,0 +1,62 @@
+/**
+  ******************************************************************************
+  * @file    hal_tick.h
+  * @author  MCD Application Team
+  * @brief   Initialization of HAL tick
+  ******************************************************************************  
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************  
+  */ 
+#ifndef __HAL_TICK_H
+#define __HAL_TICK_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "stm32f7xx.h"
+#include "cmsis_nvic.h"
+   
+#define TIM_MST      TIM5
+#define TIM_MST_IRQ  TIM5_IRQn
+#define TIM_MST_RCC  __TIM5_CLK_ENABLE()
+
+#define TIM_MST_RESET_ON   __TIM5_FORCE_RESET()
+#define TIM_MST_RESET_OFF  __TIM5_RELEASE_RESET()
+
+#define HAL_TICK_DELAY (1000) // 1 ms
+
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __HAL_TICK_H
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/stm32f7xx.h

@@ -0,0 +1,216 @@
+/**
+  ******************************************************************************
+  * @file    stm32f7xx.h
+  * @author  MCD Application Team
+  * @version V1.1.0
+  * @date    22-April-2016
+  * @brief   CMSIS STM32F7xx Device Peripheral Access Layer Header File.           
+  *            
+  *          The file is the unique include file that the application programmer
+  *          is using in the C source code, usually in main.c. This file contains:
+  *           - Configuration section that allows to select:
+  *              - The STM32F7xx device used in the target application
+  *              - To use or not the peripheral’s drivers in application code(i.e. 
+  *                code will be based on direct access to peripheral’s registers 
+  *                rather than drivers API), this option is controlled by 
+  *                "#define USE_HAL_DRIVER"
+  *  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f7xx
+  * @{
+  */
+    
+#ifndef __STM32F7xx_H
+#define __STM32F7xx_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif /* __cplusplus */
+  
+/** @addtogroup Library_configuration_section
+  * @{
+  */
+
+/**
+  * @brief STM32 Family
+  */
+#if !defined  (STM32F7)
+#define STM32F7
+#endif /* STM32F7 */
+
+/* Uncomment the line below according to the target STM32 device used in your
+   application 
+  */
+#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
+    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
+  /* #define STM32F756xx */   /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
+                                   STM32F756NG Devices */
+  /* #define STM32F746xx */   /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
+                                   STM32F746BE, STM32F746BG, STM32F746NE, STM32F746NG Devices */
+  /* #define STM32F745xx */   /*!< STM32F745VE, STM32F745VG, STM32F745ZG, STM32F745ZE, STM32F745IE, STM32F745IG Devices */
+  /* #define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
+                                   STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
+  /* #define STM32F767xx */   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
+                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
+#define STM32F769xx    /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
+                                   STM32F769NG, STM32F769NI Devices */
+  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
+  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
+#endif
+
+/*  Tip: To avoid modifying this file each time you need to switch between these
+        devices, you can define the device in your toolchain compiler preprocessor.
+  */
+
+#if !defined  (USE_HAL_DRIVER)
+/**
+ * @brief Comment the line below if you will not use the peripherals drivers.
+   In this case, these drivers will not be included and the application code will 
+   be based on direct access to peripherals registers 
+   */
+#define USE_HAL_DRIVER
+#endif /* USE_HAL_DRIVER */
+
+/**
+  * @brief CMSIS Device version number V1.1.0
+  */
+#define __STM32F7_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
+#define __STM32F7_CMSIS_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
+#define __STM32F7_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
+#define __STM32F7_CMSIS_VERSION        ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
+                                       |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
+                                       |(__STM32F7_CMSIS_VERSION_SUB2 << 8 )\
+                                       |(__STM32F7_CMSIS_VERSION))
+/**
+  * @}
+  */
+
+/** @addtogroup Device_Included
+  * @{
+  */
+#if defined(STM32F756xx)
+  #include "stm32f756xx.h"
+#elif defined(STM32F746xx)
+  #include "stm32f746xx.h"
+#elif defined(STM32F745xx)
+  #include "stm32f745xx.h"
+#elif defined(STM32F765xx)
+  #include "stm32f765xx.h"
+#elif defined(STM32F767xx)
+  #include "stm32f767xx.h"
+#elif defined(STM32F769xx)
+  #include "stm32f769xx.h"
+#elif defined(STM32F777xx)
+  #include "stm32f777xx.h"
+#elif defined(STM32F779xx)
+  #include "stm32f779xx.h"  
+#else
+ #error "Please select first the target STM32F7xx device used in your application (in stm32f7xx.h file)"
+#endif
+
+/**
+  * @}
+  */
+
+/** @addtogroup Exported_types
+  * @{
+  */ 
+typedef enum 
+{
+  RESET = 0, 
+  SET = !RESET
+} FlagStatus, ITStatus;
+
+typedef enum 
+{
+  DISABLE = 0, 
+  ENABLE = !DISABLE
+} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+
+typedef enum 
+{
+  ERROR = 0, 
+  SUCCESS = !ERROR
+} ErrorStatus;
+
+/**
+  * @}
+  */
+  
+/** @addtogroup Exported_macro
+  * @{
+  */
+#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
+
+#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
+
+#define READ_BIT(REG, BIT)    ((REG) & (BIT))
+
+#define CLEAR_REG(REG)        ((REG) = (0x0))
+
+#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
+
+#define READ_REG(REG)         ((REG))
+
+#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
+
+#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
+
+/**
+  * @}
+  */
+
+#ifdef USE_HAL_DRIVER
+  #include "stm32f7xx_hal_conf.h"
+#endif /* USE_HAL_DRIVER */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __STM32F7xx_H */
+
+/**
+  * @}
+  */
+
+  /**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/stm32f7xx_hal_conf.h

@@ -0,0 +1,454 @@
+/**
+  ******************************************************************************
+  * @file    stm32f7xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @version V1.1.0
+  * @date    22-April-2016
+  * @brief   HAL configuration template file. 
+  *          This file should be copied to the application folder and renamed
+  *          to stm32f7xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CONF_H
+#define __STM32F7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+#define HAL_MODULE_ENABLED  
+#define HAL_ADC_MODULE_ENABLED  
+#define HAL_CAN_MODULE_ENABLED
+#define HAL_CEC_MODULE_ENABLED  
+#define HAL_CRC_MODULE_ENABLED  
+#define HAL_CRYP_MODULE_ENABLED  
+#define HAL_DAC_MODULE_ENABLED  
+#define HAL_DCMI_MODULE_ENABLED 
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_DMA2D_MODULE_ENABLED 
+#define HAL_ETH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_NAND_MODULE_ENABLED
+#define HAL_NOR_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+#define HAL_SDRAM_MODULE_ENABLED
+#define HAL_HASH_MODULE_ENABLED  
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_I2S_MODULE_ENABLED   
+#define HAL_IWDG_MODULE_ENABLED 
+#define HAL_LPTIM_MODULE_ENABLED
+#define HAL_LTDC_MODULE_ENABLED 
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_QSPI_MODULE_ENABLED   
+#define HAL_RCC_MODULE_ENABLED 
+#define HAL_RNG_MODULE_ENABLED   
+#define HAL_RTC_MODULE_ENABLED
+#define HAL_SAI_MODULE_ENABLED   
+#define HAL_SD_MODULE_ENABLED  
+#define HAL_SPDIFRX_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED   
+#define HAL_TIM_MODULE_ENABLED   
+#define HAL_UART_MODULE_ENABLED 
+#define HAL_USART_MODULE_ENABLED 
+#define HAL_IRDA_MODULE_ENABLED 
+#define HAL_SMARTCARD_MODULE_ENABLED 
+#define HAL_WWDG_MODULE_ENABLED  
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_PCD_MODULE_ENABLED
+#define HAL_HCD_MODULE_ENABLED
+#define HAL_DFSDM_MODULE_ENABLED
+#define HAL_DSI_MODULE_ENABLED
+#define HAL_JPEG_MODULE_ENABLED
+#define HAL_MDIOS_MODULE_ENABLED
+
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    25000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    200U   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE  32000U                  /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  32768U    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    5000U   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    12288000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */     
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0x0FU /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1 */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */   
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    4U       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848 PHY Address*/ 
+#define DP83848_PHY_ADDRESS             0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x00U)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x01U)    /*!< Transceiver Basic Status Register    */
+ 
+#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
+  
+/* Section 4: Extended PHY Registers */
+
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
+#define PHY_MICR                        ((uint16_t)0x11U)    /*!< MII Interrupt Control Register                  */
+#define PHY_MISR                        ((uint16_t)0x12U)    /*!< MII Interrupt Status and Misc. Control Register */
+ 
+#define PHY_LINK_STATUS                 ((uint16_t)0x0001U)  /*!< PHY Link mask                                   */
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
+
+#define PHY_MICR_INT_EN                 ((uint16_t)0x0002U)  /*!< PHY Enable interrupts                           */
+#define PHY_MICR_INT_OE                 ((uint16_t)0x0001U)  /*!< PHY Enable output interrupt events              */
+
+#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020U)  /*!< Enable Interrupt on change of link status       */
+#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000U)  /*!< PHY link status interrupt mask                  */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+   
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f7xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32f7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f7xx_hal_cryp.h" 
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+ 
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */      
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32f7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32f7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+   
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0)
+#endif /* USE_FULL_ASSERT */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CONF_H */
+ 
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/