mirror of https://github.com/ARMmbed/mbed-os.git
Add TF-M based partition files - CY8CPROTO_064_SB
These files are directly leveraged from the TF-M target (psoc64_1m). Git hash - https://git.trustedfirmware.org/trusted-firmware-m.git/commit/?h=feature-twincpu&id=14d4a73cae631ea291f4d8d04e3c588ea9e955c8 Reason: They are going to provide region definitions and flash partition details of the target which runs TF-M based Secure image defining the memory map needed for successful integration. Folder structure: TARGET_CY8CPROTO_064_SB -- partition -- flash_layout.h -- region_defs.h Signed-off-by: Vikas Katariya <Vikas.Katariya@arm.com>pull/12402/head
Vikas Katariya
Jaeden Amero
parent
20ddc3ae90
commit
b6c0a763dc
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/*
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* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
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* Copyright (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __FLASH_LAYOUT_H__
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#define __FLASH_LAYOUT_H__
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/* Flash layout with BL2:
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*
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* TBD
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*
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*
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* Flash layout if BL2 not defined:
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*
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* 0x1000_0000 Non-secure image primary (256 KB)
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* 0x1004_0000 Secure/Non-secure image secondary (256 KB)
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* Note that only one image can be upgraded per boot
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* 0x1008_0000 Secure image primary (256 KB)
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* 0x100c_0000 Secure Storage Area (20 KB)
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* 0x100c_5000 NV counters area (24 Bytes)
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* 0x100c_5018 Unused (almost 44 KB)
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* 0x100d_0000 Reserved (192 KB)
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*
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*/
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#define MAX(X, Y) (((X) > (Y)) ? (X) : (Y))
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/* This header file is included from linker scatter file as well, where only a
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* limited C constructs are allowed. Therefore it is not possible to include
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* here the platform_base_address.h to access flash related defines. To resolve
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* this some of the values are redefined here with different names, these are
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* marked with comment.
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*/
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/* The size of S partition */
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#define FLASH_S_PARTITION_SIZE 0x40000 /* 256 KB */
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/* The size of NS partition */
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#define FLASH_NS_PARTITION_SIZE 0x40000 /* 256 KB */
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/*
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* Each FLASH_AREA_IMAGE contains NS and S partitions.
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* See Flash layout above.
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*/
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#define FLASH_PARTITION_SIZE (FLASH_S_PARTITION_SIZE + \
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FLASH_NS_PARTITION_SIZE)
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#define FLASH_MAX_PARTITION_SIZE MAX(FLASH_S_PARTITION_SIZE, \
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FLASH_NS_PARTITION_SIZE)
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/* Sector size of the flash hardware; same as FLASH0_SECTOR_SIZE */
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#define FLASH_AREA_IMAGE_SECTOR_SIZE (0x200) /* 512 B */
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/* Same as FLASH0_SIZE */
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#define FLASH_TOTAL_SIZE (0x00100000) /* 1 MB */
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/* Flash layout info for BL2 bootloader */
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#define FLASH_BASE_ADDRESS (0x10000000U) /* same as FLASH0_BASE */
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#ifdef BL2
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/* Offset and size definitions of the flash partitions that are handled by the
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* bootloader. The image swapping is done between IMAGE_PRIMARY and
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* IMAGE_SECONDARY.
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* SCRATCH is used as a temporary storage during image swapping.
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*/
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#define FLASH_AREA_BL2_OFFSET (0x0)
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#define FLASH_AREA_BL2_SIZE (0x20000) /* 128 kB */
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#if !defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1)
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/* Secure + Non-secure image primary slot */
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#define FLASH_AREA_0_ID (1)
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#define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + \
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FLASH_AREA_BL2_SIZE)
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#define FLASH_AREA_0_SIZE FLASH_PARTITION_SIZE
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/* Secure + Non-secure secondary slot */
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#define FLASH_AREA_2_ID (FLASH_AREA_0_ID + 1)
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#define FLASH_AREA_2_OFFSET (FLASH_AREA_0_OFFSET + \
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FLASH_AREA_0_SIZE)
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#define FLASH_AREA_2_SIZE FLASH_PARTITION_SIZE
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/* Scratch area */
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#define FLASH_AREA_SCRATCH_ID (FLASH_AREA_2_ID + 1)
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#define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_2_OFFSET + \
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FLASH_AREA_2_SIZE)
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#define FLASH_AREA_SCRATCH_SIZE (0x8000) /* 32 KB */
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/* Maximum number of status entries supported by the bootloader. */
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#define BOOT_STATUS_MAX_ENTRIES MAX(2, FLASH_PARTITION_SIZE / \
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FLASH_AREA_SCRATCH_SIZE)
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/** Maximum number of image sectors supported by the bootloader. */
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#define BOOT_MAX_IMG_SECTORS (FLASH_PARTITION_SIZE / \
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FLASH_AREA_IMAGE_SECTOR_SIZE)
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#elif (MCUBOOT_IMAGE_NUMBER == 2)
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/* Secure image primary slot */
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#define FLASH_AREA_0_ID (1)
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#define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + \
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FLASH_AREA_BL2_SIZE)
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#define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE)
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/* Non-secure image primary slot */
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#define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1)
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#define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + \
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FLASH_AREA_0_SIZE)
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#define FLASH_AREA_1_SIZE (FLASH_NS_PARTITION_SIZE)
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/* Secure image secondary slot */
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#define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1)
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#define FLASH_AREA_2_OFFSET (FLASH_AREA_1_OFFSET + \
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FLASH_AREA_1_SIZE)
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#define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE)
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/* Non-secure image secondary slot */
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#define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1)
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#define FLASH_AREA_3_OFFSET (FLASH_AREA_2_OFFSET + \
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FLASH_AREA_2_SIZE)
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#define FLASH_AREA_3_SIZE (FLASH_NS_PARTITION_SIZE)
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/* Scratch area */
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#define FLASH_AREA_SCRATCH_ID (FLASH_AREA_3_ID + 1)
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#define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_3_OFFSET + \
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FLASH_AREA_3_SIZE)
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#define FLASH_AREA_SCRATCH_SIZE (0x8000) /* 32 KB */
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/* The maximum number of status entries supported by the bootloader. */
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/* The maximum number of status entries must be at least 2. For more
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* information see the MCUBoot issue:
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* https://github.com/JuulLabs-OSS/mcuboot/issues/427.
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*/
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#define BOOT_STATUS_MAX_ENTRIES MAX(2, FLASH_MAX_PARTITION_SIZE / \
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FLASH_AREA_SCRATCH_SIZE)
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/* Maximum number of image sectors supported by the bootloader. */
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#define BOOT_MAX_IMG_SECTORS (FLASH_MAX_PARTITION_SIZE / \
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FLASH_AREA_IMAGE_SECTOR_SIZE)
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#else /* MCUBOOT_IMAGE_NUMBER > 2 */
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#error "Only MCUBOOT_IMAGE_NUMBER 1 and 2 are supported!"
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#endif /* MCUBOOT_IMAGE_NUMBER */
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#else /* BL2 */
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/* SST area follows scratch area */
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#define FLASH_AREA_SCRATCH_OFFSET (SECURE_IMAGE_OFFSET + \
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FLASH_S_PARTITION_SIZE)
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#define FLASH_AREA_SCRATCH_SIZE (0) /* None */
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#endif /* BL2 */
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#define FLASH_SST_AREA_OFFSET (FLASH_AREA_SCRATCH_OFFSET + \
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FLASH_AREA_SCRATCH_SIZE)
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#define FLASH_SST_AREA_SIZE (0x5000) /* 20 KB */
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#define FLASH_NV_COUNTERS_AREA_OFFSET (FLASH_SST_AREA_OFFSET + \
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FLASH_SST_AREA_SIZE)
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#define FLASH_NV_COUNTERS_AREA_SIZE (0x18) /* 24 Bytes */
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/* Offset and size definition in flash area, used by assemble.py */
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#ifdef BL2
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#define SECURE_IMAGE_OFFSET 0x0
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#else
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#define SECURE_IMAGE_OFFSET (NON_SECURE_IMAGE_OFFSET + \
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FLASH_NS_PARTITION_SIZE + \
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FLASH_MAX_PARTITION_SIZE)
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#endif
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#define SECURE_IMAGE_MAX_SIZE FLASH_S_PARTITION_SIZE
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#ifdef BL2
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#define NON_SECURE_IMAGE_OFFSET (SECURE_IMAGE_OFFSET + \
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SECURE_IMAGE_MAX_SIZE)
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#else
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#define NON_SECURE_IMAGE_OFFSET 0x0
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#endif
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#define NON_SECURE_IMAGE_MAX_SIZE FLASH_NS_PARTITION_SIZE
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/* Flash device name used by BL2 and SST
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* Name is defined in flash driver file: Driver_Flash.c
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*/
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#define FLASH_DEV_NAME Driver_FLASH0
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/* Secure Storage (SST) Service definitions
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* Note: Further documentation of these definitions can be found in the
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* TF-M SST Integration Guide.
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*/
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#define SST_FLASH_DEV_NAME Driver_FLASH0
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/* In this target the CMSIS driver requires only the offset from the base
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* address instead of the full memory address.
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*/
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#define SST_FLASH_AREA_ADDR FLASH_SST_AREA_OFFSET
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/* Dedicated flash area for SST */
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#define SST_FLASH_AREA_SIZE FLASH_SST_AREA_SIZE
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#define SST_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE
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/* Number of SST_SECTOR_SIZE per block */
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#define SST_SECTORS_PER_BLOCK 0x8
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/* Specifies the smallest flash programmable unit in bytes */
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#define SST_FLASH_PROGRAM_UNIT 0x1
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/* The maximum asset size to be stored in the SST area */
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#define SST_MAX_ASSET_SIZE 2048
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/* The maximum number of assets to be stored in the SST area */
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#define SST_NUM_ASSETS 10
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/* NV Counters definitions */
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#define TFM_NV_COUNTERS_AREA_ADDR FLASH_NV_COUNTERS_AREA_OFFSET
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#define TFM_NV_COUNTERS_AREA_SIZE FLASH_NV_COUNTERS_AREA_SIZE
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#define TFM_NV_COUNTERS_SECTOR_ADDR FLASH_NV_COUNTERS_AREA_OFFSET
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#define TFM_NV_COUNTERS_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE
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/* Use Flash to store Code data */
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#define S_ROM_ALIAS_BASE (0x10000000)
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#define NS_ROM_ALIAS_BASE (0x10000000)
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/* Use SRAM to store RW data */
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#define S_RAM_ALIAS_BASE (0x08000000)
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#define NS_RAM_ALIAS_BASE (0x08000000)
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#endif /* __FLASH_LAYOUT_H__ */
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@ -0,0 +1,208 @@
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/*
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* Copyright (c) 2017-2019 ARM Limited. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __REGION_DEFS_H__
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#define __REGION_DEFS_H__
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#include "flash_layout.h"
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#define TOTAL_ROM_SIZE FLASH_TOTAL_SIZE
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/* 2KB of RAM (at the end of the SRAM) are reserved for system use. Using
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* this memory region for other purposes will lead to unexpected behavior.
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* 94KB of RAM (just before the memory reserved for system use) are
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* allocated and protected by Cypress Bootloader */
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#define TOTAL_RAM_SIZE (0x00030000) /* CY_SRAM0_SIZE - 96KB */
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#define BL2_HEAP_SIZE 0x0001000
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#define BL2_MSP_STACK_SIZE 0x0001000
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#define S_HEAP_SIZE 0x0001000
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#define S_MSP_STACK_SIZE_INIT 0x0000400
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#define S_MSP_STACK_SIZE 0x0000800
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#define S_PSP_STACK_SIZE 0x0000800
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#define NS_HEAP_SIZE 0x0001000
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#define NS_MSP_STACK_SIZE 0x0000400
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#define NS_PSP_STACK_SIZE 0x0000C00
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/* Relocation of vectors to RAM support */
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/* #define RAM_VECTORS_SUPPORT */
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/*
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* This size of buffer is big enough to store an attestation
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* token produced by initial attestation service
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*/
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#define PSA_INITIAL_ATTEST_TOKEN_MAX_SIZE 0x250
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/*
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* MPC granularity is 128 KB on AN519 MPS2 FPGA image. Alignment
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* of partitions is defined in accordance with this constraint.
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*/
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#ifdef BL2
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#ifndef LINK_TO_SECONDARY_PARTITION
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#define S_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET)
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#define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET)
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#define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET + \
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FLASH_S_PARTITION_SIZE)
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#else
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#define S_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET)
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#define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET)
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#define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET + \
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FLASH_S_PARTITION_SIZE)
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#endif /* !LINK_TO_SECONDARY_PARTITION */
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#else
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#define S_IMAGE_PRIMARY_PARTITION_OFFSET SECURE_IMAGE_OFFSET
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#define NS_IMAGE_PRIMARY_PARTITION_OFFSET NON_SECURE_IMAGE_OFFSET
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#endif /* BL2 */
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/* TFM PSoC6 CY8CKIT_064 RAM layout:
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*
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* 0x0800_0000 Non-secure data (NS_DATA_SIZE, 63KB)
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* 0x0800_FC00 Shared memory (NS_DATA_SHARED_SIZE, 1KB)
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* 0x0801_0000 Secure unprivileged data (S_UNPRIV_DATA_SIZE, 32KB)
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* 0x0801_8000 Secure priviliged data (S_PRIV_DATA_SIZE, 92KB)
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* 0x0802_F000 Secure priv code executable from RAM (S_RAM_CODE_SIZE, 4KB)
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* 0x0803_0000 System reserved memory (96KB)
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* 0x0804_8000 End of RAM
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*/
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/*
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* Boot partition structure if MCUBoot is used:
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* 0x0_0000 Bootloader header
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* 0x0_0400 Image area
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* 0x1_FC00 Trailer
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*/
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/* Image code size is the space available for the software binary image.
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* It is less than the FLASH_S_PARTITION_SIZE and FLASH_NS_PARTITION_SIZE
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* because we reserve space for the image header and trailer introduced by the
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* bootloader.
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*/
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#ifdef BL2
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#define BL2_HEADER_SIZE (0x400)
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#define BL2_TRAILER_SIZE (0x400)
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#else
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/* Even though TFM BL2 is excluded from the build,
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* CY BL built externally is used and it needs offsets for header and trailer
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* to be taken in account.
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* */
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#define BL2_HEADER_SIZE (0x400)
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#define BL2_TRAILER_SIZE (0x400)
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#endif /* BL2 */
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#define IMAGE_S_CODE_SIZE \
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(FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
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#define IMAGE_NS_CODE_SIZE \
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(FLASH_NS_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
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/* Alias definitions for secure and non-secure areas*/
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#define S_ROM_ALIAS(x) (S_ROM_ALIAS_BASE + (x))
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#define NS_ROM_ALIAS(x) (NS_ROM_ALIAS_BASE + (x))
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#define S_RAM_ALIAS(x) (S_RAM_ALIAS_BASE + (x))
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#define NS_RAM_ALIAS(x) (NS_RAM_ALIAS_BASE + (x))
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/* Secure regions */
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#define S_IMAGE_PRIMARY_AREA_OFFSET \
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(S_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
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#define S_CODE_START (S_ROM_ALIAS(S_IMAGE_PRIMARY_AREA_OFFSET))
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#define S_CODE_SIZE IMAGE_S_CODE_SIZE
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#define S_CODE_LIMIT (S_CODE_START + S_CODE_SIZE - 1)
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#define S_DATA_START (S_RAM_ALIAS(NS_DATA_SIZE))
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#define S_UNPRIV_DATA_SIZE 0x8000
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#define S_PRIV_DATA_SIZE 0x17000
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/* Reserve 4KB for RAM-based executable code */
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#define S_RAM_CODE_SIZE 0x1000
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/* Secure data area */
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#define S_DATA_SIZE (S_UNPRIV_DATA_SIZE + S_PRIV_DATA_SIZE + S_RAM_CODE_SIZE)
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#define S_DATA_LIMIT (S_DATA_START + S_DATA_SIZE - 1)
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/* We need the privileged data area to be aligned so that an SMPU
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* region can cover it.
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*/
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/* TODO It would be nice to figure this out automatically.
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* In theory, in the linker script, we could determine the amount
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* of secure data space available after all the unprivileged data,
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* round that down to a power of 2 to get the actual size we want
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* to use for privileged data, and then determine this value from
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* that. We'd also potentially have to update the configs for SMPU9
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* and SMPU10.
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* Leave the SMPU alignment check in SMPU configuration file.
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*/
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#define S_DATA_PRIV_OFFSET (NS_DATA_SIZE + S_UNPRIV_DATA_SIZE)
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#define S_DATA_PRIV_START S_RAM_ALIAS(S_DATA_PRIV_OFFSET)
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/* Reserve area for RAM-based executable code right after secure unprivilaged
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* and privilaged data areas*/
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#define S_RAM_CODE_START (S_DATA_START + S_UNPRIV_DATA_SIZE + S_PRIV_DATA_SIZE)
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/* Non-secure regions */
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#define NS_IMAGE_PRIMARY_AREA_OFFSET \
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(NS_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
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#define NS_CODE_START (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_AREA_OFFSET))
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#define NS_CODE_SIZE IMAGE_NS_CODE_SIZE
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||||
#define NS_CODE_LIMIT (NS_CODE_START + NS_CODE_SIZE - 1)
|
||||
|
||||
#define NS_DATA_START (S_RAM_ALIAS(0))
|
||||
#define NS_DATA_SIZE (TOTAL_RAM_SIZE - S_DATA_SIZE)
|
||||
#define NS_DATA_LIMIT (NS_DATA_START + NS_DATA_SIZE - 1)
|
||||
|
||||
/* Shared memory */
|
||||
#define NS_DATA_SHARED_SIZE 0x400
|
||||
#define NS_DATA_SHARED_START (NS_DATA_START + NS_DATA_SIZE - \
|
||||
NS_DATA_SHARED_SIZE)
|
||||
#define NS_DATA_SHARED_LIMIT (NS_DATA_SHARED_START + NS_DATA_SHARED_SIZE - 1)
|
||||
|
||||
/* Shared variables addresses */
|
||||
/* ipcWaitMessageStc, cy_flash.c */
|
||||
#define IPC_WAIT_MESSAGE_STC_ADDR NS_DATA_SHARED_START
|
||||
#define IPC_WAIT_MESSAGE_STC_SIZE 4
|
||||
|
||||
/* NS partition information is used for MPC and SAU configuration */
|
||||
#define NS_PARTITION_START \
|
||||
(NS_ROM_ALIAS(NS_IMAGE_PRIMARY_PARTITION_OFFSET))
|
||||
|
||||
#define NS_PARTITION_SIZE (FLASH_NS_PARTITION_SIZE)
|
||||
|
||||
/* Secondary partition for new images in case of firmware upgrade */
|
||||
#define SECONDARY_PARTITION_START \
|
||||
(NS_ROM_ALIAS(S_IMAGE_SECONDARY_PARTITION_OFFSET))
|
||||
|
||||
#define SECONDARY_PARTITION_SIZE FLASH_PARTITION_SIZE
|
||||
|
||||
#ifdef BL2
|
||||
/* Bootloader regions */
|
||||
#define BL2_CODE_START (S_ROM_ALIAS(FLASH_AREA_BL2_OFFSET))
|
||||
#define BL2_CODE_SIZE (FLASH_AREA_BL2_SIZE)
|
||||
#define BL2_CODE_LIMIT (BL2_CODE_START + BL2_CODE_SIZE - 1)
|
||||
|
||||
#define BL2_DATA_START (S_RAM_ALIAS(S_DATA_PRIV_OFFSET))
|
||||
#define BL2_DATA_SIZE (S_PRIV_DATA_SIZE)
|
||||
#define BL2_DATA_LIMIT (BL2_DATA_START + BL2_DATA_SIZE - 1)
|
||||
#endif /* BL2 */
|
||||
|
||||
/* Shared data area between bootloader and runtime firmware.
|
||||
* Shared data area is allocated at the beginning of the privileged data area,
|
||||
* it is overlapping with TF-M Secure code's MSP stack
|
||||
*/
|
||||
#define BOOT_TFM_SHARED_DATA_BASE (S_RAM_ALIAS(S_DATA_PRIV_OFFSET))
|
||||
#define BOOT_TFM_SHARED_DATA_SIZE 0x400
|
||||
|
||||
#endif /* __REGION_DEFS_H__ */
|
||||
|
||||
Loading…
Reference in New Issue