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STM32L0 baremetal support

pull/12992/head
jeromecoutant 2020-05-15 12:00:10 +02:00
parent 9b819c7f8b
commit b57b12cc9f
8 changed files with 336 additions and 242 deletions
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83
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct
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@ -1,76 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE #include "../cmsis_nvic.h"
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
; STM32L073RZ: 192KB FLASH (0x30000)
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x30000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
; 20KB RAM (0x5000)
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000
#endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM /* Round up VECTORS_SIZE to 8 bytes */
#define VECTOR_SIZE 0xC0 #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
} }
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
} }
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

86
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld
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@ -1,3 +1,46 @@
/* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
}
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
@ -25,28 +68,6 @@
* __stack * __stack
* _estack * _estack
*/ */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x30000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 20K - 0xC0
}
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
SECTIONS SECTIONS
@ -55,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -112,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -128,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -143,9 +177,9 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -161,7 +195,7 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */

71
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf
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@ -1,40 +1,59 @@
/* Linker script to configure memory regions.
*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol HEAP_SIZE = 0x1000;
/* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) { if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = 0x08000000; define symbol MBED_APP_START = MBED_ROM_START;
} }
if (!isdefinedsymbol(MBED_APP_SIZE)) { if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x30000; define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
} }
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 20kb = 0x5000] Vector table dynamic copy: 48 vectors = 192 bytes (0xC0) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200000BF; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x200000C0;
define symbol __region_RAM_end__ = 0x20004FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
block CSTACK, block HEAP };

57
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/cmsis_nvic.h
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@ -1,40 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
******************************************************************************* * SPDX-License-Identifier: BSD-3-Clause
* Copyright (c) 2014, STMicroelectronics ******************************************************************************
* All rights reserved. * @attention
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #if !defined(MBED_ROM_START)
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF #define MBED_ROM_START 0x8000000
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM #endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x30000 // 192 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000 // 20 KB
#endif
#define NVIC_NUM_VECTORS 48 #define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

79
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct
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@ -1,54 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
; STM32L072CZ: 192KB FLASH (0x30000) + 20KB RAM (0x5000) #if !defined(MBED_BOOT_STACK_SIZE)
LR_IROM1 0x08000000 0x30000 { ; load region size_region /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
ER_IROM1 0x08000000 0x30000 { ; load address = execution address /* Round up VECTORS_SIZE to 8 bytes */
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

60
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld
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@ -1,15 +1,44 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
STACK_SIZE = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 192k FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 20K - 0xC0 RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
@ -47,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -104,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -120,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -135,9 +177,9 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -153,7 +195,7 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */

70
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf
View File

@ -1,33 +1,59 @@
/* [ROM = 192kb = 0x30000] */ /* Linker script to configure memory regions.
define symbol __intvec_start__ = 0x08000000; *
define symbol __region_ROM_start__ = 0x08000000; * SPDX-License-Identifier: BSD-3-Clause
define symbol __region_ROM_end__ = 0x0802FFFF; ******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* [RAM = 20kb = 0x5000] Vector table dynamic copy: 48 vectors = 192 bytes (0xC0) to be reserved in RAM */ /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200000BF; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x200000C0;
define symbol __region_RAM_end__ = 0x20004FFF;
/* Memory regions */ define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define memory mem with size = 4G; define symbol HEAP_SIZE = 0x1000;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
block CSTACK, block HEAP };

60
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/cmsis_nvic.h
View File

@ -1,41 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors * SPDX-License-Identifier: BSD-3-Clause
******************************************************************************* ******************************************************************************
* Copyright (c) 2017, STMicroelectronics * @attention
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #if !defined(MBED_ROM_START)
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF #define MBED_ROM_START 0x8000000
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM #endif
#define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x30000 // 192 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000 // 20 KB
#endif
#define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif