mirror of https://github.com/ARMmbed/mbed-os.git
add 11U68 ARM CR
kazu
parent
ebced1c131
commit
b4fb8525ea
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@ -0,0 +1,236 @@
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/*Based on following file*/
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/*
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* GENERATED FILE - DO NOT EDIT
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* (c) Code Red Technologies Ltd, 2008-13
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* (c) NXP Semiconductors 2013-2014
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* Generated linker script file for LPC11U68
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* Created from LibIncTemplate.ld (LPCXpresso v7.2 (0 [Build 153] [2014-05-19] ))
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* By LPCXpresso v7.2.0 [Build 153] [2014-05-19] on Sat Jun 14 15:26:54 JST 2014
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*/
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/*GROUP(libgcc.a libc_s.a libstdc++_s.a libm.a crti.o crtn.o crtbegin.o crtend.o)*/
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MEMORY
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{
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/* Define each memory region */
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MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes */
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Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes */
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Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes */
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Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes */
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}
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/* Define a symbol for the top of each memory region */
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__top_MFlash256 = 0x0 + 0x40000;
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__top_Ram0_32 = 0x10000000 + 0x8000;
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__top_Ram1_2 = 0x20000000 + 0x800;
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__top_Ram2USB_2 = 0x20004000 + 0x800;
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ENTRY(ResetISR)
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SECTIONS
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{
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/* MAIN TEXT SECTION */
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.text : ALIGN(4)
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{
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FILL(0xff)
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__vectors_start__ = ABSOLUTE(.) ;
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KEEP(*(.isr_vector))
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/* Global Section Table */
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. = ALIGN(4) ;
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__section_table_start = .;
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__data_section_table = .;
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LONG(LOADADDR(.data));
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LONG( ADDR(.data));
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LONG( SIZEOF(.data));
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LONG(LOADADDR(.data_RAM2));
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LONG( ADDR(.data_RAM2));
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LONG( SIZEOF(.data_RAM2));
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LONG(LOADADDR(.data_RAM3));
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LONG( ADDR(.data_RAM3));
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LONG( SIZEOF(.data_RAM3));
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__data_section_table_end = .;
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__bss_section_table = .;
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LONG( ADDR(.bss));
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LONG( SIZEOF(.bss));
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LONG( ADDR(.bss_RAM2));
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LONG( SIZEOF(.bss_RAM2));
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LONG( ADDR(.bss_RAM3));
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LONG( SIZEOF(.bss_RAM3));
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__bss_section_table_end = .;
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__section_table_end = . ;
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/* End of Global Section Table */
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*(.after_vectors*)
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*(.text*)
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*(.rodata .rodata.*)
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. = ALIGN(4);
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/* C++ constructors etc */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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KEEP(*(.fini));
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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} > MFlash256
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/*
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* for exception handling/unwind - some Newlib functions (in common
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* with C++ and STDC++) use this.
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*/
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.ARM.extab : ALIGN(4)
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > MFlash256
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__exidx_start = .;
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.ARM.exidx : ALIGN(4)
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > MFlash256
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__exidx_end = .;
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_etext = .;
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/* possible MTB section for Ram1_2 */
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.mtb_buffer_RAM2 (NOLOAD) :
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{
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KEEP(*(.mtb.$RAM2*))
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KEEP(*(.mtb.$RAM1_2*))
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} > Ram1_2
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/* DATA section for Ram1_2 */
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.data_RAM2 : ALIGN(4)
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{
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FILL(0xff)
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*(.ramfunc.$RAM2)
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*(.ramfunc.$Ram1_2)
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*(.data.$RAM2*)
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*(.data.$Ram1_2*)
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. = ALIGN(4) ;
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} > Ram1_2 AT>MFlash256
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/* possible MTB section for Ram2USB_2 */
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.mtb_buffer_RAM3 (NOLOAD) :
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{
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KEEP(*(.mtb.$RAM3*))
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KEEP(*(.mtb.$RAM2USB_2*))
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} > Ram2USB_2
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/* DATA section for Ram2USB_2 */
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.data_RAM3 : ALIGN(4)
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{
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FILL(0xff)
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*(.ramfunc.$RAM3)
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*(.ramfunc.$Ram2USB_2)
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*(.data.$RAM3*)
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*(.data.$Ram2USB_2*)
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. = ALIGN(4) ;
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} > Ram2USB_2 AT>MFlash256
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/* MAIN DATA SECTION */
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/* Default MTB section */
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.mtb_buffer_default (NOLOAD) :
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{
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KEEP(*(.mtb*))
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} > Ram0_32
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.uninit_RESERVED : ALIGN(4)
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{
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KEEP(*(.bss.$RESERVED*))
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. = ALIGN(4) ;
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_end_uninit_RESERVED = .;
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} > Ram0_32
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/* Main DATA section (Ram0_32) */
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.data : ALIGN(4)
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{
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FILL(0xff)
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_data = . ;
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*(vtable)
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*(.ramfunc*)
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*(.data*)
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. = ALIGN(4) ;
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_edata = . ;
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} > Ram0_32 AT>MFlash256
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/* BSS section for Ram1_2 */
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.bss_RAM2 : ALIGN(4)
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{
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*(.bss.$RAM2*)
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*(.bss.$Ram1_2*)
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. = ALIGN(4) ;
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} > Ram1_2
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/* BSS section for Ram2USB_2 */
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.bss_RAM3 : ALIGN(4)
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{
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*(.bss.$RAM3*)
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*(.bss.$Ram2USB_2*)
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. = ALIGN(4) ;
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} > Ram2USB_2
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/* MAIN BSS SECTION */
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.bss : ALIGN(4)
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{
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_bss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4) ;
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_ebss = .;
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PROVIDE(end = .);
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__end__ = .;
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} > Ram0_32
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/* NOINIT section for Ram1_2 */
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.noinit_RAM2 (NOLOAD) : ALIGN(4)
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{
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*(.noinit.$RAM2*)
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*(.noinit.$Ram1_2*)
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. = ALIGN(4) ;
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} > Ram1_2
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/* NOINIT section for Ram2USB_2 */
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.noinit_RAM3 (NOLOAD) : ALIGN(4)
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{
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*(.noinit.$RAM3*)
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*(.noinit.$Ram2USB_2*)
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. = ALIGN(4) ;
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} > Ram2USB_2
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/* DEFAULT NOINIT SECTION */
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.noinit (NOLOAD): ALIGN(4)
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{
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_noinit = .;
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*(.noinit*)
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. = ALIGN(4) ;
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_end_noinit = .;
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} > Ram0_32
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PROVIDE(_pvHeapStart = .);
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PROVIDE(_vStackTop = __top_Ram0_32 - 0);
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}
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@ -0,0 +1,181 @@
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extern "C" {
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#include "LPC11U6x.h"
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#define WEAK __attribute__ ((weak))
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#define ALIAS(f) __attribute__ ((weak, alias (#f)))
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#define AFTER_VECTORS __attribute__ ((section(".after_vectors")))void ResetISR(void);
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extern unsigned int __data_section_table;
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extern unsigned int __data_section_table_end;
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extern unsigned int __bss_section_table;
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extern unsigned int __bss_section_table_end;
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extern void __libc_init_array(void);
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extern int main(void);
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extern void _vStackTop(void);
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extern void (* const g_pfnVectors[])(void);
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void ResetISR(void);
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WEAK void NMI_Handler(void);
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WEAK void HardFault_Handler(void);
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WEAK void SVC_Handler(void);
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WEAK void PendSV_Handler(void);
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WEAK void SysTick_Handler(void);
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WEAK void IntDefaultHandler(void);
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void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
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void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
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void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void I2C1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USART1_4_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USART2_3_IRQHandler (void) ALIAS(IntDefaultHandler);
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void SCT0_1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void I2C0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
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void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USART0_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
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void ADCA_IRQHandler (void) ALIAS(IntDefaultHandler);
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void RTC_IRQHandler (void) ALIAS(IntDefaultHandler);
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void BOD_WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
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void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
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void DMA_IRQHandler (void) ALIAS(IntDefaultHandler);
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void ADCB_IRQHandler (void) ALIAS(IntDefaultHandler);
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void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
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__attribute__ ((section(".isr_vector")))
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void (* const g_pfnVectors[])(void) = {
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// Core Level - CM0
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&_vStackTop, // The initial stack pointer
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ResetISR, // The reset handler
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NMI_Handler, // The NMI handler
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HardFault_Handler, // The hard fault handler
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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SVC_Handler, // SVCall handler
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0, // Reserved
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0, // Reserved
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PendSV_Handler, // The PendSV handler
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SysTick_Handler, // The SysTick handler
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// Chip Level - LPC11U68
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PIN_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
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PIN_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
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PIN_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
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PIN_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
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PIN_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
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PIN_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
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PIN_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
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PIN_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
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GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
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GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
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I2C1_IRQHandler, // 10 - I2C1
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USART1_4_IRQHandler, // 11 - combined USART1 & 4 interrupt
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USART2_3_IRQHandler, // 12 - combined USART2 & 3 interrupt
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SCT0_1_IRQHandler, // 13 - combined SCT0 and 1 interrupt
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SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
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I2C0_IRQHandler, // 15 - I2C0
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TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
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TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
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TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
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TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
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SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
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USART0_IRQHandler, // 21 - USART0
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USB_IRQHandler, // 22 - USB IRQ
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USB_FIQHandler, // 23 - USB FIQ
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ADCA_IRQHandler, // 24 - ADC A(A/D Converter)
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RTC_IRQHandler, // 25 - Real Time CLock interrpt
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BOD_WDT_IRQHandler, // 25 - Combined Brownout/Watchdog interrupt
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FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
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DMA_IRQHandler, // 28 - DMA interrupt
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ADCB_IRQHandler, // 24 - ADC B (A/D Converter)
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USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
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0, // 31 - Reserved
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};
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/* End Vector */
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AFTER_VECTORS void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
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unsigned int *pulDest = (unsigned int*) start;
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unsigned int *pulSrc = (unsigned int*) romstart;
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unsigned int loop;
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for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = *pulSrc++;
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}
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AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) {
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unsigned int *pulDest = (unsigned int*) start;
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unsigned int loop;
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for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = 0;
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}
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/* Reset entry point*/
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extern "C" void software_init_hook(void) __attribute__((weak));
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AFTER_VECTORS void ResetISR(void) {
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unsigned int LoadAddr, ExeAddr, SectionLen;
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unsigned int *SectionTableAddr;
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SectionTableAddr = &__data_section_table;
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while (SectionTableAddr < &__data_section_table_end) {
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LoadAddr = *SectionTableAddr++;
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ExeAddr = *SectionTableAddr++;
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SectionLen = *SectionTableAddr++;
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data_init(LoadAddr, ExeAddr, SectionLen);
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}
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while (SectionTableAddr < &__bss_section_table_end) {
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ExeAddr = *SectionTableAddr++;
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SectionLen = *SectionTableAddr++;
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bss_init(ExeAddr, SectionLen);
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}
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SystemInit();
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if (software_init_hook)
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software_init_hook();
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else {
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__libc_init_array();
|
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main();
|
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}
|
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while (1) {;}
|
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}
|
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|
||||
AFTER_VECTORS void NMI_Handler (void) {}
|
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AFTER_VECTORS void HardFault_Handler (void) {}
|
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AFTER_VECTORS void MemManage_Handler (void) {}
|
||||
AFTER_VECTORS void BusFault_Handler (void) {}
|
||||
AFTER_VECTORS void UsageFault_Handler(void) {}
|
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AFTER_VECTORS void SVC_Handler (void) {}
|
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AFTER_VECTORS void DebugMon_Handler (void) {}
|
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AFTER_VECTORS void PendSV_Handler (void) {}
|
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AFTER_VECTORS void SysTick_Handler (void) {}
|
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AFTER_VECTORS void IntDefaultHandler (void) {}
|
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|
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int __aeabi_atexit(void *object, void (*destructor)(void *), void *dso_handle) {return 0;}
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}
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#include <stdlib.h>
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void *operator new(size_t size) {return malloc(size);}
|
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void *operator new[](size_t size){return malloc(size);}
|
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void operator delete(void *p) {free(p);}
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void operator delete[](void *p) {free(p);}
|
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|
|
@ -0,0 +1,236 @@
|
|||
/*Based on following file*/
|
||||
/*
|
||||
* GENERATED FILE - DO NOT EDIT
|
||||
* (c) Code Red Technologies Ltd, 2008-13
|
||||
* (c) NXP Semiconductors 2013-2014
|
||||
* Generated linker script file for LPC11U68
|
||||
* Created from LibIncTemplate.ld (LPCXpresso v7.2 (0 [Build 153] [2014-05-19] ))
|
||||
* By LPCXpresso v7.2.0 [Build 153] [2014-05-19] on Sat Jun 14 15:26:54 JST 2014
|
||||
*/
|
||||
|
||||
GROUP(libgcc.a libc_s.a libstdc++_s.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
|
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MEMORY
|
||||
{
|
||||
/* Define each memory region */
|
||||
MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes */
|
||||
Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes */
|
||||
Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes */
|
||||
Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes */
|
||||
|
||||
|
||||
}
|
||||
/* Define a symbol for the top of each memory region */
|
||||
__top_MFlash256 = 0x0 + 0x40000;
|
||||
__top_Ram0_32 = 0x10000000 + 0x8000;
|
||||
__top_Ram1_2 = 0x20000000 + 0x800;
|
||||
__top_Ram2USB_2 = 0x20004000 + 0x800;
|
||||
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
/* MAIN TEXT SECTION */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.) ;
|
||||
KEEP(*(.isr_vector))
|
||||
|
||||
/* Global Section Table */
|
||||
. = ALIGN(4) ;
|
||||
__section_table_start = .;
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
LONG(LOADADDR(.data_RAM2));
|
||||
LONG( ADDR(.data_RAM2));
|
||||
LONG( SIZEOF(.data_RAM2));
|
||||
LONG(LOADADDR(.data_RAM3));
|
||||
LONG( ADDR(.data_RAM3));
|
||||
LONG( SIZEOF(.data_RAM3));
|
||||
__data_section_table_end = .;
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
LONG( ADDR(.bss_RAM2));
|
||||
LONG( SIZEOF(.bss_RAM2));
|
||||
LONG( ADDR(.bss_RAM3));
|
||||
LONG( SIZEOF(.bss_RAM3));
|
||||
__bss_section_table_end = .;
|
||||
__section_table_end = . ;
|
||||
/* End of Global Section Table */
|
||||
|
||||
|
||||
*(.after_vectors*)
|
||||
|
||||
*(.text*)
|
||||
*(.rodata .rodata.*)
|
||||
. = ALIGN(4);
|
||||
|
||||
/* C++ constructors etc */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
KEEP(*(.fini));
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
} > MFlash256
|
||||
|
||||
/*
|
||||
* for exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and STDC++) use this.
|
||||
*/
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > MFlash256
|
||||
__exidx_start = .;
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > MFlash256
|
||||
__exidx_end = .;
|
||||
|
||||
_etext = .;
|
||||
|
||||
/* possible MTB section for Ram1_2 */
|
||||
.mtb_buffer_RAM2 (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.mtb.$RAM2*))
|
||||
KEEP(*(.mtb.$RAM1_2*))
|
||||
} > Ram1_2
|
||||
|
||||
/* DATA section for Ram1_2 */
|
||||
.data_RAM2 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
*(.ramfunc.$RAM2)
|
||||
*(.ramfunc.$Ram1_2)
|
||||
*(.data.$RAM2*)
|
||||
*(.data.$Ram1_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram1_2 AT>MFlash256
|
||||
/* possible MTB section for Ram2USB_2 */
|
||||
.mtb_buffer_RAM3 (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.mtb.$RAM3*))
|
||||
KEEP(*(.mtb.$RAM2USB_2*))
|
||||
} > Ram2USB_2
|
||||
|
||||
/* DATA section for Ram2USB_2 */
|
||||
.data_RAM3 : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
*(.ramfunc.$RAM3)
|
||||
*(.ramfunc.$Ram2USB_2)
|
||||
*(.data.$RAM3*)
|
||||
*(.data.$Ram2USB_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram2USB_2 AT>MFlash256
|
||||
|
||||
/* MAIN DATA SECTION */
|
||||
|
||||
/* Default MTB section */
|
||||
.mtb_buffer_default (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.mtb*))
|
||||
} > Ram0_32
|
||||
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4) ;
|
||||
_end_uninit_RESERVED = .;
|
||||
} > Ram0_32
|
||||
|
||||
|
||||
/* Main DATA section (Ram0_32) */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = . ;
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
. = ALIGN(4) ;
|
||||
_edata = . ;
|
||||
} > Ram0_32 AT>MFlash256
|
||||
|
||||
/* BSS section for Ram1_2 */
|
||||
.bss_RAM2 : ALIGN(4)
|
||||
{
|
||||
*(.bss.$RAM2*)
|
||||
*(.bss.$Ram1_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram1_2
|
||||
/* BSS section for Ram2USB_2 */
|
||||
.bss_RAM3 : ALIGN(4)
|
||||
{
|
||||
*(.bss.$RAM3*)
|
||||
*(.bss.$Ram2USB_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram2USB_2
|
||||
|
||||
/* MAIN BSS SECTION */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4) ;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
__end__ = .;
|
||||
} > Ram0_32
|
||||
|
||||
/* NOINIT section for Ram1_2 */
|
||||
.noinit_RAM2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM2*)
|
||||
*(.noinit.$Ram1_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram1_2
|
||||
/* NOINIT section for Ram2USB_2 */
|
||||
.noinit_RAM3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
*(.noinit.$RAM3*)
|
||||
*(.noinit.$Ram2USB_2*)
|
||||
. = ALIGN(4) ;
|
||||
} > Ram2USB_2
|
||||
|
||||
/* DEFAULT NOINIT SECTION */
|
||||
.noinit (NOLOAD): ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
*(.noinit*)
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > Ram0_32
|
||||
|
||||
PROVIDE(_pvHeapStart = .);
|
||||
PROVIDE(_vStackTop = __top_Ram0_32 - 0);
|
||||
}
|
||||
|
|
@ -0,0 +1,180 @@
|
|||
extern "C" {
|
||||
|
||||
#include "LPC11U6x.h"
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
#define AFTER_VECTORS __attribute__ ((section(".after_vectors")))void ResetISR(void);
|
||||
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
|
||||
extern void __libc_init_array(void);
|
||||
extern int main(void);
|
||||
extern void _vStackTop(void);
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USART1_4_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USART2_3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SCT0_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USART0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADCA_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void RTC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void BOD_WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void DMA_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADCB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
|
||||
__attribute__ ((section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM0
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC11U68
|
||||
PIN_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
|
||||
PIN_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
|
||||
PIN_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
|
||||
PIN_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
|
||||
PIN_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
|
||||
PIN_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
|
||||
PIN_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
|
||||
PIN_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
|
||||
GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
|
||||
GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
|
||||
I2C1_IRQHandler, // 10 - I2C1
|
||||
USART1_4_IRQHandler, // 11 - combined USART1 & 4 interrupt
|
||||
USART2_3_IRQHandler, // 12 - combined USART2 & 3 interrupt
|
||||
SCT0_1_IRQHandler, // 13 - combined SCT0 and 1 interrupt
|
||||
SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
|
||||
I2C0_IRQHandler, // 15 - I2C0
|
||||
TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
|
||||
TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
|
||||
TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
|
||||
TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
|
||||
SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
|
||||
USART0_IRQHandler, // 21 - USART0
|
||||
USB_IRQHandler, // 22 - USB IRQ
|
||||
USB_FIQHandler, // 23 - USB FIQ
|
||||
ADCA_IRQHandler, // 24 - ADC A(A/D Converter)
|
||||
RTC_IRQHandler, // 25 - Real Time CLock interrpt
|
||||
BOD_WDT_IRQHandler, // 25 - Combined Brownout/Watchdog interrupt
|
||||
FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
|
||||
DMA_IRQHandler, // 28 - DMA interrupt
|
||||
ADCB_IRQHandler, // 24 - ADC B (A/D Converter)
|
||||
USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
|
||||
0, // 31 - Reserved
|
||||
};
|
||||
/* End Vector */
|
||||
|
||||
AFTER_VECTORS void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = 0;
|
||||
}
|
||||
|
||||
|
||||
/* Reset entry point*/
|
||||
extern "C" void software_init_hook(void) __attribute__((weak));
|
||||
|
||||
AFTER_VECTORS void ResetISR(void) {
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
SystemInit();
|
||||
if (software_init_hook)
|
||||
software_init_hook();
|
||||
else {
|
||||
__libc_init_array();
|
||||
main();
|
||||
}
|
||||
while (1) {;}
|
||||
}
|
||||
|
||||
AFTER_VECTORS void NMI_Handler (void) {}
|
||||
AFTER_VECTORS void HardFault_Handler (void) {}
|
||||
AFTER_VECTORS void MemManage_Handler (void) {}
|
||||
AFTER_VECTORS void BusFault_Handler (void) {}
|
||||
AFTER_VECTORS void UsageFault_Handler(void) {}
|
||||
AFTER_VECTORS void SVC_Handler (void) {}
|
||||
AFTER_VECTORS void DebugMon_Handler (void) {}
|
||||
AFTER_VECTORS void PendSV_Handler (void) {}
|
||||
AFTER_VECTORS void SysTick_Handler (void) {}
|
||||
AFTER_VECTORS void IntDefaultHandler (void) {}
|
||||
|
||||
int __aeabi_atexit(void *object, void (*destructor)(void *), void *dso_handle) {return 0;}
|
||||
}
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
void *operator new(size_t size) {return malloc(size);}
|
||||
void *operator new[](size_t size){return malloc(size);}
|
||||
|
||||
void operator delete(void *p) {free(p);}
|
||||
void operator delete[](void *p) {free(p);}
|
||||
Loading…
Reference in New Issue