diff --git a/README.md b/README.md index 6a9ef02231..d8afa8c8e6 100644 --- a/README.md +++ b/README.md @@ -33,6 +33,7 @@ NXP: * LPC810 (Cortex-M0+) * [LPC812](http://developer.mbed.org/platforms/NXP-LPC800-MAX/) (Cortex-M0+) * [EA LPC4088](http://developer.mbed.org/platforms/EA-LPC4088/) (Cortex-M4F) +* [EA LPC4088 DM](http://developer.mbed.org/platforms/EA-LPC4088-Display-Module/) (Cortex-M4F) * LPC4330 (Cortex-M4F + Cortex-M0) * [LPC1347](http://developer.mbed.org/platforms/DipCortex-M3/) (Cortex-M3) * [LPC1114](http://developer.mbed.org/platforms/LPC1114FN28/) (Cortex-M0) diff --git a/libraries/USBDevice/USBDevice/USBEndpoints.h b/libraries/USBDevice/USBDevice/USBEndpoints.h index fd4b914803..130f49a790 100644 --- a/libraries/USBDevice/USBDevice/USBEndpoints.h +++ b/libraries/USBDevice/USBDevice/USBEndpoints.h @@ -37,7 +37,7 @@ typedef enum { } EP_STATUS; /* Include configuration for specific target */ -#if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) +#if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) #include "USBEndpoints_LPC17_LPC23.h" #elif defined(TARGET_LPC11UXX) || defined(TARGET_LPC1347) || defined (TARGET_LPC11U6X) || defined (TARGET_LPC1549) #include "USBEndpoints_LPC11U.h" diff --git a/libraries/USBDevice/USBDevice/USBHAL_LPC40.cpp b/libraries/USBDevice/USBDevice/USBHAL_LPC40.cpp index 108f402e9c..a5d7b44401 100644 --- a/libraries/USBDevice/USBDevice/USBHAL_LPC40.cpp +++ b/libraries/USBDevice/USBDevice/USBHAL_LPC40.cpp @@ -16,7 +16,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#if defined(TARGET_LPC4088) +#if defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) #include "USBHAL.h" diff --git a/libraries/net/eth/EthernetInterface/EthernetInterface.h b/libraries/net/eth/EthernetInterface/EthernetInterface.h index 5d085d1c16..f68fb9d3ae 100644 --- a/libraries/net/eth/EthernetInterface/EthernetInterface.h +++ b/libraries/net/eth/EthernetInterface/EthernetInterface.h @@ -20,7 +20,7 @@ #ifndef ETHERNETINTERFACE_H_ #define ETHERNETINTERFACE_H_ -#if !defined(TARGET_LPC1768) && !defined(TARGET_LPC4088) && !defined(TARGET_K64F) && !defined(TARGET_RZ_A1H) +#if !defined(TARGET_LPC1768) && !defined(TARGET_LPC4088) && !defined(TARGET_LPC4088_DM) && !defined(TARGET_K64F) && !defined(TARGET_RZ_A1H) #error The Ethernet Interface library is not supported on this target #endif diff --git a/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lpc17_emac.c b/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lpc17_emac.c index ea68e24b0a..82ad9b951c 100644 --- a/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lpc17_emac.c +++ b/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lpc17_emac.c @@ -134,7 +134,7 @@ struct lpc_enetdata { #endif }; -#if defined(TARGET_LPC4088) +#if defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) # if defined (__ICCARM__) # define ETHMEM_SECTION # elif defined(TOOLCHAIN_GCC_CR) @@ -444,7 +444,7 @@ static s32_t lpc_packet_addr_notsafe(void *addr) { /* Check for legal address ranges */ #if defined(TARGET_LPC1768) if ((((u32_t) addr >= 0x2007C000) && ((u32_t) addr < 0x20083FFF))) { -#elif defined(TARGET_LPC4088) +#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) if ((((u32_t) addr >= 0x20000000) && ((u32_t) addr < 0x20007FFF))) { #endif return 0; @@ -804,7 +804,7 @@ static err_t low_level_init(struct netif *netif) #if defined(TARGET_LPC1768) LPC_PINCON->PINSEL2 = 0x50150105; /* Enable P1 Ethernet Pins. */ LPC_PINCON->PINSEL3 = (LPC_PINCON->PINSEL3 & ~0x0000000F) | 0x00000005; -#elif defined(TARGET_LPC4088) +#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) LPC_IOCON->P1_0 &= ~0x07; /* ENET I/O config */ LPC_IOCON->P1_0 |= 0x01; /* ENET_TXD0 */ LPC_IOCON->P1_1 &= ~0x07; diff --git a/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lwipopts_conf.h b/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lwipopts_conf.h index 7be78dc724..a117fa6c93 100644 --- a/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lwipopts_conf.h +++ b/libraries/net/eth/lwip-eth/arch/TARGET_NXP/lwipopts_conf.h @@ -21,7 +21,7 @@ #define LWIP_TRANSPORT_ETHERNET 1 -#if defined(TARGET_LPC4088) +#if defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) #define MEM_SIZE 15360 #elif defined(TARGET_LPC1768) #define MEM_SIZE 16362 diff --git a/libraries/net/lwip/lwip/core/mem.c b/libraries/net/lwip/lwip/core/mem.c index 580fc7759f..7ebe304138 100644 --- a/libraries/net/lwip/lwip/core/mem.c +++ b/libraries/net/lwip/lwip/core/mem.c @@ -178,7 +178,7 @@ struct mem { * how that space is calculated). */ #ifndef LWIP_RAM_HEAP_POINTER -#if defined(TARGET_LPC4088) +#if defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) # if defined (__ICCARM__) # define ETHMEM_SECTION # elif defined(TOOLCHAIN_GCC_CR) diff --git a/libraries/net/lwip/lwip/core/memp.c b/libraries/net/lwip/lwip/core/memp.c index a206c94537..d59c004020 100644 --- a/libraries/net/lwip/lwip/core/memp.c +++ b/libraries/net/lwip/lwip/core/memp.c @@ -168,7 +168,7 @@ static u8_t *const memp_bases[] = { #if defined(TARGET_LPC1768) # define ETHMEM_SECTION __attribute((section("AHBSRAM1"))) -#elif defined(TARGET_LPC4088) || defined(TARGET_K64F) || defined(TARGET_RZ_A1H) +#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_RZ_A1H) # define ETHMEM_SECTION #endif diff --git a/libraries/rpc/parse_pins.cpp b/libraries/rpc/parse_pins.cpp index d0779441f6..e68471e9ac 100644 --- a/libraries/rpc/parse_pins.cpp +++ b/libraries/rpc/parse_pins.cpp @@ -27,13 +27,18 @@ PinName parse_pins(const char *str) { , dp13, dp14, dp15, dp16, dp17, dp18, dp23 , dp24, dp25, dp26, dp27, dp28}; #elif defined(TARGET_LPC4088) - static const PinName pin_names[] = {p5, p6, p7, p8, p9, p10, p11, p12, p13, p14 + static const PinName pin_names[] = {NC, NC, NC, NC, p5, p6, p7, p8, p9, p10, p11, p12, p13, p14 , p15, p16, p17, p18, p19, p20, NC, NC, p23 , p24, p25, p26, p27, p28, p29, p30, p31, p32 - , p33, p34, NC, NC, p37, p38, p39}; + , p33, p34, NC, NC, p37, p38, p39, NC, NC, NC, NC, NC, NC, NC}; +#elif defined(TARGET_LPC4088_DM) + static const PinName pin_names[] = {p1, p2, p3, p4, NC, NC, p7, p8, p9, p10, p11, p12, p13, p14 + , p15, p16, p17, p18, p19, p20, p21, p22, p23 + , p24, p25, p26, NC, NC, p29, p30, NC, NC + , NC, NC, NC, NC, NC, NC, NC, NC, p41, p42, p43, p44, p45, p46}; #endif -#if defined(TARGET_LPC1768) || defined(TARGET_LPC11U24) || defined(TARGET_LPC2368) || defined(TARGET_LPC812) || defined(TARGET_LPC4088)|| defined(TARGET_LPC1114) +#if defined(TARGET_LPC1768) || defined(TARGET_LPC11U24) || defined(TARGET_LPC2368) || defined(TARGET_LPC812) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC1114) if (str[0] == 'P') { // Pn_n uint32_t port = str[1] - '0'; uint32_t pin = str[3] - '0'; // Pn_n @@ -66,17 +71,17 @@ PinName parse_pins(const char *str) { return NC; } return pin_names[pin - 5]; -#elif defined(TARGET_LPC4088) +#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) } else if (str[0] == 'p') { // pn uint32_t pin = str[1] - '0'; // pn uint32_t pin2 = str[2] - '0'; // pnn if (pin2 <= 9) { pin = pin * 10 + pin2; } - if (pin < 5 || pin > 39) { + if (pin < 1 || pin > 46) { return NC; } - return pin_names[pin - 5]; + return pin_names[pin - 1]; #endif } else if (str[0] == 'L') { // LEDn diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h index 1b6e53587b..6c943a5f25 100755 --- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h +++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h @@ -235,7 +235,7 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL} #elif defined(TARGET_KL05Z) #define INITIAL_SP (0x20000C00UL) -#elif defined(TARGET_LPC4088) +#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) #define INITIAL_SP (0x10010000UL) #elif defined(TARGET_LPC4330) diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c index 7f4274d1dd..14204569aa 100755 --- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c +++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c @@ -49,7 +49,7 @@ // counting "main", but not counting "osTimerThread" // Default: 6 #ifndef OS_TASKCNT -# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\ +# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\ || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \ || defined(TARGET_NRF51822) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) # define OS_TASKCNT 14 @@ -65,7 +65,7 @@ // Scheduler (+ interrupts) stack size [bytes] <64-4096:8><#/4> #ifndef OS_SCHEDULERSTKSIZE -# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\ +# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\ || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \ || defined(TARGET_NRF51822) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) # define OS_SCHEDULERSTKSIZE 256 @@ -135,7 +135,7 @@ # elif defined(TARGET_STM32F100RB) # define OS_CLOCK 24000000 -# elif defined(TARGET_LPC4088) || defined(TARGET_K64F) || defined(TARGET_K22F) +# elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K22F) # define OS_CLOCK 120000000 # elif defined(TARGET_LPC4330) diff --git a/libraries/tests/mbed/can/main.cpp b/libraries/tests/mbed/can/main.cpp index 71f90cc455..a05321a907 100644 --- a/libraries/tests/mbed/can/main.cpp +++ b/libraries/tests/mbed/can/main.cpp @@ -11,7 +11,7 @@ CAN can1(D2, D3); CAN can1(p9, p10); #endif -#if defined(TARGET_LPC4088) +#if defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) CAN can2(p34, p33); #elif defined (TARGET_LPC1768) CAN can2(p30, p29); diff --git a/workspace_tools/export/README.md b/workspace_tools/export/README.md index 019adaafdb..bcce4f4ee7 100644 --- a/workspace_tools/export/README.md +++ b/workspace_tools/export/README.md @@ -470,6 +470,18 @@ Exporter IDE/Platform Support ✓ ✓ + + LPC4088_DM + - + - + - + ✓ + ✓ + ✓ + - + ✓ + ✓ + LPC4330_M0 - diff --git a/workspace_tools/export/codered.py b/workspace_tools/export/codered.py index d1ee495d2d..c502096fe3 100755 --- a/workspace_tools/export/codered.py +++ b/workspace_tools/export/codered.py @@ -25,6 +25,7 @@ class CodeRed(Exporter): TARGETS = [ 'LPC1768', 'LPC4088', + 'LPC4088_DM', 'LPC4330_M4', 'LPC1114', 'LPC11U35_401', diff --git a/workspace_tools/export/codered_lpc4088_dm_cproject.tmpl b/workspace_tools/export/codered_lpc4088_dm_cproject.tmpl new file mode 100644 index 0000000000..9d3231cf80 --- /dev/null +++ b/workspace_tools/export/codered_lpc4088_dm_cproject.tmpl @@ -0,0 +1,1922 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + <?xml version="1.0" encoding="UTF-8"?> +<TargetConfig> +<Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/> +<infoList vendor="NXP"><info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"><chip><name>LPC4088</name> +<family>LPC407x_8x</family> +<vendor>NXP (formerly Philips)</vendor> +<reset board="None" core="Real" sys="Real"/> +<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> +<memory can_program="true" id="Flash" is_ro="true" type="Flash"/> +<memory id="RAM" type="RAM"/> +<memory id="Periph" is_volatile="true" type="Peripheral"/> +<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/> +<memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/> +<memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/> +<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/> +<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/> +<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/> +<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/> +<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/> +<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/> +<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/> +<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/> +<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/> +<peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/> +<peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/> +<peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/> +<peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/> +<peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/> +<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/> +<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/> +<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/> +<peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/> +<peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/> +<peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/> +<peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/> +<peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/> +<peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/> +<peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/> +<peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/> +<peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/> +<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/> +<peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/> +<peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/> +<peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/> +<peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/> +<peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/> +<peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/> +<peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/> +<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/> +<peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/> +<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/> +<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/> +<peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/> +<peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/> +<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/> +<peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/> +<peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/> +<peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/> +<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/> +<peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/> +<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/> +<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/> +</chip> +<processor><name gcc_name="cortex-m4">Cortex-M4</name> +<family>Cortex-M</family> +</processor> +<link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/> +</info> +</infoList> +</TargetConfig> + + + diff --git a/workspace_tools/export/codered_lpc4088_dm_project.tmpl b/workspace_tools/export/codered_lpc4088_dm_project.tmpl new file mode 100644 index 0000000000..42ef4384de --- /dev/null +++ b/workspace_tools/export/codered_lpc4088_dm_project.tmpl @@ -0,0 +1,84 @@ + + + {{name}} + This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Code-Red + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/{{name}}/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + diff --git a/workspace_tools/export/gcc_arm_lpc4088_dm.tmpl b/workspace_tools/export/gcc_arm_lpc4088_dm.tmpl new file mode 100644 index 0000000000..19e4aed9a7 --- /dev/null +++ b/workspace_tools/export/gcc_arm_lpc4088_dm.tmpl @@ -0,0 +1,77 @@ +# This file was automagically generated by mbed.org. For more information, +# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded + +GCC_BIN = +PROJECT = {{name}} +OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %} +SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %} +INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %} +LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %} +LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %} +LINKER_SCRIPT = {{linker_script}} + +############################################################################### +AS = $(GCC_BIN)arm-none-eabi-as +CC = $(GCC_BIN)arm-none-eabi-gcc +CPP = $(GCC_BIN)arm-none-eabi-g++ +LD = $(GCC_BIN)arm-none-eabi-gcc +OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy +OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump +SIZE = $(GCC_BIN)arm-none-eabi-size + +CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp +CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer +CC_FLAGS += -MMD -MP +CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} + +LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main +LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref +LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys + +ifeq ($(DEBUG), 1) + CC_FLAGS += -DDEBUG -O0 +else + CC_FLAGS += -DNDEBUG -Os +endif + +all: $(PROJECT).bin $(PROJECT).hex + +clean: + rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS) + +.s.o: + $(AS) $(CPU) -o $@ $< + +.c.o: + $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< + +.cpp.o: + $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $< + + +$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) + $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) + @echo "" + @echo "*****" + @echo "***** You must modify vector checksum value in *.bin and *.hex files." + @echo "*****" + @echo "" + $(SIZE) $@ + +$(PROJECT).bin: $(PROJECT).elf + @$(OBJCOPY) -O binary $< $@ + +$(PROJECT).hex: $(PROJECT).elf + @$(OBJCOPY) -O ihex $< $@ + +$(PROJECT).lst: $(PROJECT).elf + @$(OBJDUMP) -Sdh $< > $@ + +lst: $(PROJECT).lst + +size: + $(SIZE) $(PROJECT).elf + +DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d) +-include $(DEPS) + diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py index 2fe36dda58..c08058e7fe 100644 --- a/workspace_tools/export/gccarm.py +++ b/workspace_tools/export/gccarm.py @@ -33,6 +33,7 @@ class GccArm(Exporter): 'K22F', 'K20D50M', 'LPC4088', + 'LPC4088_DM', 'LPC4330_M4', 'LPC11U24', 'LPC1114', diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py index a3fe1a7be3..37abf2ecf3 100644 --- a/workspace_tools/export/iar.py +++ b/workspace_tools/export/iar.py @@ -32,6 +32,7 @@ class IAREmbeddedWorkbench(Exporter): 'LPC1549', 'LPC812', 'LPC4088', + 'LPC4088_DM', 'UBLOX_C027', 'ARCH_PRO', 'K20D50M', diff --git a/workspace_tools/export/iar_lpc4088_dm.ewp.tmpl b/workspace_tools/export/iar_lpc4088_dm.ewp.tmpl new file mode 100644 index 0000000000..9bd19007cf --- /dev/null +++ b/workspace_tools/export/iar_lpc4088_dm.ewp.tmpl @@ -0,0 +1,958 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 22 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 30 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + {% for files in source_files %} + + $PROJ_DIR$\{{files}} + + {% endfor %} + + + diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py index ccfa42e2aa..8c5f4b734e 100644 --- a/workspace_tools/export/uvision4.py +++ b/workspace_tools/export/uvision4.py @@ -36,6 +36,7 @@ class Uvision4(Exporter): 'LPC1114', 'LPC11C24', 'LPC4088', + 'LPC4088_DM', 'LPC4330_M4', 'LPC4337', 'LPC812', diff --git a/workspace_tools/export/uvision4_lpc4088_dm.uvopt.tmpl b/workspace_tools/export/uvision4_lpc4088_dm.uvopt.tmpl new file mode 100644 index 0000000000..542903f60d --- /dev/null +++ b/workspace_tools/export/uvision4_lpc4088_dm.uvopt.tmpl @@ -0,0 +1,230 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + mbed NXP LPC4088 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 8 + + + 0 + Data Sheet + DATASHTS\NXP\LPC407x_8x\LPC408X_7X.pdf + + + 1 + User Manual + DATASHTS\NXP\LPC407x_8x\UM10562.pdf + + + 2 + Technical Reference Manual + datashts\arm\cortex_m4\r0p1\DDI0439C_CORTEX_M4_R0P1_TRM.PDF + + + 3 + Generic User Guide + datashts\arm\cortex_m4\r0p1\DUI0553A_CORTEX_M4_DGUG.PDF + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 14 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + CMSIS_AGDI + -X"MBED CMSIS-DAP" -UA000000001 -O4559 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -FO15 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 + + + 0 + DLGUARM + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=-1,-1,-1,-1,0)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=-1,-1,-1,-1,0)(291=-1,-1,-1,-1,0)(302=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=-1,-1,-1,-1,0)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=-1,-1,-1,-1,0)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + UL2CM3 + -UV0218BNE -O463 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 + + + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + + + 0 + + + + + + + + src + 1 + 0 + 0 + 0 + + 1 + 1 + 8 + 0 + 0 + 0 + 0 + 1 + 7 + 0 + main.cpp + main.cpp + 0 + 0 + + + + diff --git a/workspace_tools/export/uvision4_lpc4088_dm.uvproj.tmpl b/workspace_tools/export/uvision4_lpc4088_dm.uvproj.tmpl new file mode 100644 index 0000000000..ec0158c9da --- /dev/null +++ b/workspace_tools/export/uvision4_lpc4088_dm.uvproj.tmpl @@ -0,0 +1,425 @@ + + + + 1.1 + +
###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision
+ + + + NXP LPC4088 + 0x4 + ARM-ADS + + + LPC4088_DM + NXP (founded by Philips) + IRAM(0x10000000-0x1000FFFF) IRAM2(0x20000000-0x20007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\NXP\LPC407x_8x_177x_8x\startup_LPC407x_8x_177x_8x.s" ("NXP LPC407x_8x_177x_8x Startup Code") + UL2CM3(-O4303 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000) + 6493 + LPC407x_8x_177x_8x.h + + + + + + + + + + SFD\NXP\LPC407x_8x_177x_8x\LPC408x_7x.SFR + 0 + + + + NXP\LPC407x_8x_177x_8x\ + NXP\LPC407x_8x_177x_8x\ + + 0 + 0 + 0 + 0 + 1 + + .\build\ + {{name}} + 1 + 0 + 0 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin -o build\{{name}}_LPC4088.bin build\{{name}}.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 14 + + + + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4105 + + BIN\CMSIS_AGDI.dll + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x10000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x10000 + + + 0 + 0x20000000 + 0x8000 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + {% for flag in flags %}{{flag}} {% endfor %} + {% for s in symbols %} {{s}}, {% endfor %} + + {% for path in include_paths %} {{path}}; {% endfor %} + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x10000000 + {{scatter_file}} + + + + {% for file in object_files %} + {{file}} + {% endfor %} + --any_placement=first_fit + + + + + + + + {% for group,files in source_files %} + + {{group}} + + {% for file in files %} + + {{file.name}} + {{file.type}} + {{file.path}} + {%if file.type == "1" %} + + + + + --c99 + + + + + {% endif %} + + {% endfor %} + + + {% endfor %} + + + + + diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index 593d52cdb3..25895d2773 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -1003,7 +1003,7 @@ for t in TARGETS: TARGET_NAMES = TARGET_MAP.keys() # Some targets with different name have the same exporters -EXPORT_MAP = { "LPC4088_DM" : "LPC4088"} +EXPORT_MAP = { } # Detection APIs def get_target_detect_codes(): diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py index 1e1552a37b..fd9f8ad9b8 100644 --- a/workspace_tools/toolchains/gcc.py +++ b/workspace_tools/toolchains/gcc.py @@ -175,7 +175,7 @@ class GCC_ARM(GCC): # Use latest gcc nanolib self.ld.append("--specs=nano.specs") - if target.name in ["LPC1768", "LPC4088", "LPC4330", "UBLOX_C027", "LPC2368"]: + if target.name in ["LPC1768", "LPC4088", "LPC4088_DM", "LPC4330", "UBLOX_C027", "LPC2368"]: self.ld.extend(["-u _printf_float", "-u _scanf_float"]) self.sys_libs.append("nosys") @@ -193,7 +193,7 @@ class GCC_CR(GCC): # Use latest gcc nanolib self.ld.append("--specs=nano.specs") - if target.name in ["LPC1768", "LPC4088", "LPC4330", "UBLOX_C027", "LPC2368"]: + if target.name in ["LPC1768", "LPC4088", "LPC4088_DM", "LPC4330", "UBLOX_C027", "LPC2368"]: self.ld.extend(["-u _printf_float", "-u _scanf_float"]) self.ld += ["-nostdlib"]