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Merge pull request #1918 from ARM-software/master 

[BEETLE] Enable RTOS on Beetle
pull/1921/head
Martin Kojtal 2016-06-13 23:06:25 +02:00 committed by GitHub
parent 6167f23da6 f8d7a76128
commit b28f7108f7
6 changed files with 61 additions and 62 deletions
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50
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_ARM_STD/startup_BEETLE.s
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@ -26,28 +26,7 @@
;*/ ;*/
; <h> Stack Configuration __initial_sp EQU 0x20020000 ; Top of RAM
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000C00
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8 PRESERVE8
THUMB THUMB
@ -286,31 +265,4 @@ TRNG_Handler
ALIGN ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END END

43
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_ARM_STD/sys.cpp Normal file
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@ -0,0 +1,43 @@
/*
* PackageLicenseDeclared: Apache-2.0
* Copyright (c) 2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <rt_misc.h>
#include <stdint.h>
/* Get RW_IRAM1 from scatter definition */
extern char Image$$RW_IRAM1$$ZI$$Limit[];
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
uint32_t beetle_zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
uint32_t beetle_sp_limit = __current_sp();
/* beetle_zi_limit has to be 8-byte aligned */
beetle_zi_limit = (beetle_zi_limit + 7) & ~0x7;
struct __initial_stackheap r;
r.heap_base = beetle_zi_limit;
r.heap_limit = beetle_sp_limit;
return r;
}
#ifdef __cplusplus
}
#endif

6
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/systick_timer.c
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@ -30,7 +30,7 @@ static uint32_t clock;
#define SYSTICK_MAX_RELOAD 0xFFFFFFFF #define SYSTICK_MAX_RELOAD 0xFFFFFFFF
#define SYSTICK_DIVIDER_US (SystemCoreClock/1000000) #define SYSTICK_DIVIDER_US (SystemCoreClock/1000000)
void SysTick_Handler(void) void SysTick_IRQ_Handler(void)
{ {
MyTicks++; MyTicks++;
#if 0 #if 0
@ -60,6 +60,10 @@ void SysTick_Initialize(void)
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk
| SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_ENABLE_Msk
| SysTick_CTRL_TICKINT_Msk; | SysTick_CTRL_TICKINT_Msk;
/* Register the Interrupt */
NVIC_SetVector(SysTick_IRQn, (uint32_t)SysTick_IRQ_Handler);
NVIC_EnableIRQ(SysTick_IRQn);
} }
/* /*

2
rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
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@ -495,7 +495,7 @@ osThreadDef_t os_thread_def_main = {(os_pthread)pre_main, osPriorityNormal, 1U,
#elif defined(TARGET_STM32L152RC) #elif defined(TARGET_STM32L152RC)
#define INITIAL_SP (0x20008000UL) #define INITIAL_SP (0x20008000UL)
#elif defined(TARGET_EFM32GG_STK3700) #elif defined(TARGET_EFM32GG_STK3700) || defined(TARGET_BEETLE)
#define INITIAL_SP (0x20020000UL) #define INITIAL_SP (0x20020000UL)
#elif defined(TARGET_EFM32HG_STK3400) #elif defined(TARGET_EFM32HG_STK3400)

6
rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
View File

@ -64,7 +64,7 @@
|| defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) \ || defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) \
|| defined(TARGET_STM32L031K6) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8) || defined(TARGET_STM32L073RZ) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) || defined(TARGET_NZ32_SC151) \ || defined(TARGET_STM32L031K6) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8) || defined(TARGET_STM32L073RZ) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) || defined(TARGET_NZ32_SC151) \
|| defined(TARGET_SSCI824) || defined(TARGET_STM32F030R8) || defined(TARGET_STM32F070RB) \ || defined(TARGET_SSCI824) || defined(TARGET_STM32F030R8) || defined(TARGET_STM32F070RB) \
|| defined(TARGET_EFM32HG_STK3400) || defined(TARGET_MCU_NRF51822) || defined(TARGET_EFM32HG_STK3400) || defined(TARGET_MCU_NRF51822) || defined(TARGET_BEETLE)
# define OS_TASKCNT 6 # define OS_TASKCNT 6
# else # else
# error "no target defined" # error "no target defined"
@ -102,7 +102,7 @@
# define OS_MAINSTKSIZE 128 # define OS_MAINSTKSIZE 128
# elif defined(TARGET_STM32F334R8) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303K8) || defined(TARGET_STM32F334C8) \ # elif defined(TARGET_STM32F334R8) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303K8) || defined(TARGET_STM32F334C8) \
|| defined(TARGET_STM32L031K6) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8) || defined(TARGET_STM32L073RZ) \ || defined(TARGET_STM32L031K6) || defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8) || defined(TARGET_STM32L073RZ) \
|| defined(TARGET_EFM32HG_STK3400) || defined(TARGET_EFM32HG_STK3400) || defined(TARGET_BEETLE)
# define OS_MAINSTKSIZE 112 # define OS_MAINSTKSIZE 112
# elif defined(TARGET_MCU_NRF51822) # elif defined(TARGET_MCU_NRF51822)
# define OS_MAINSTKSIZE 512 # define OS_MAINSTKSIZE 512
@ -188,7 +188,7 @@
# elif defined(TARGET_LPC824) || defined(TARGET_SSCI824) # elif defined(TARGET_LPC824) || defined(TARGET_SSCI824)
# define OS_CLOCK 30000000 # define OS_CLOCK 30000000
# elif defined(TARGET_STM32F100RB) # elif defined(TARGET_STM32F100RB) || defined(TARGET_BEETLE)
# define OS_CLOCK 24000000 # define OS_CLOCK 24000000
# elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K22F) # elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K22F)

16
tools/tests.py
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@ -715,7 +715,7 @@ TESTS = [
"NUCLEO_L031K6", "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L031K6", "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC", "DISCO_L476VG", "NUCLEO_L476RG",
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_2", "description": "Mutex resource lock", "id": "RTOS_2", "description": "Mutex resource lock",
@ -731,7 +731,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG",
"NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_3", "description": "Semaphore resource lock", "id": "RTOS_3", "description": "Semaphore resource lock",
@ -747,7 +747,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG",
"NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_4", "description": "Signals messaging", "id": "RTOS_4", "description": "Signals messaging",
@ -762,7 +762,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG",
"NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_5", "description": "Queue messaging", "id": "RTOS_5", "description": "Queue messaging",
@ -777,7 +777,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
"NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_6", "description": "Mail messaging", "id": "RTOS_6", "description": "Mail messaging",
@ -792,7 +792,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
"NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_7", "description": "Timer", "id": "RTOS_7", "description": "Timer",
@ -809,7 +809,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
"NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_8", "description": "ISR (Queue)", "id": "RTOS_8", "description": "ISR (Queue)",
@ -824,7 +824,7 @@ TESTS = [
"DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE", "DISCO_F401VC", "NUCLEO_F303RE", "NUCLEO_F303K8", "MAXWSNENV", "MAX32600MBED", "NUCLEO_L152RE",
"NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE", "NUCLEO_F446RE", "NUCLEO_F103RB", "DISCO_F746NG", "NUCLEO_F746ZG", "MOTE_L152RC", "B96B_F446VE",
"EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800", "EFM32HG_STK3400", "EFM32PG_STK3401", "EFM32LG_STK3600", "EFM32GG_STK3700", "EFM32WG_STK3800",
"NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE"], "NRF51822", "NRF51_DK", "NRF51_MICROBIT", "SEEED_TINY_BLE", "ARM_BEETLE_SOC"],
}, },
{ {
"id": "RTOS_9", "description": "SD File write-read", "id": "RTOS_9", "description": "SD File write-read",