From b11914c967a2ace9e282779b05e2e58e3b1c8e3a Mon Sep 17 00:00:00 2001
From: Steven Cooreman <steven.cooreman@silabs.com>
Date: Fri, 24 Nov 2017 15:53:44 +0100
Subject: [PATCH] Support USARTs up to USART5 in SPI

---
 .../TARGET_EFM32/spi_api.c                    | 84 +++++++++++++++++++
 1 file changed, 84 insertions(+)

diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c
index 3dab2ecd63..4c3f58f350 100644
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c
@@ -59,6 +59,18 @@ static inline CMU_Clock_TypeDef spi_get_clock_tree(spi_t *obj)
 #ifdef USART2
         case SPI_2:
             return cmuClock_USART2;
+#endif
+#ifdef USART3
+        case SPI_3:
+            return cmuClock_USART3;
+#endif
+#ifdef USART4
+        case SPI_4:
+            return cmuClock_USART4;
+#endif
+#ifdef USART5
+        case SPI_5:
+            return cmuClock_USART5;
 #endif
         default:
             error("Spi module not available.. Out of bound access.");
@@ -84,6 +96,21 @@ static inline uint8_t spi_get_index(spi_t *obj)
         case SPI_2:
             index = 2;
             break;
+#endif
+#ifdef USART3
+        case SPI_3:
+            index = 3;
+            break;
+#endif
+#ifdef USART4
+        case SPI_4:
+            index = 4;
+            break;
+#endif
+#ifdef USART5
+        case SPI_5:
+            index = 5;
+            break;
 #endif
         default:
             error("Spi module not available.. Out of bound access.");
@@ -286,6 +313,21 @@ void spi_enable_interrupt(spi_t *obj, uint32_t handler, uint8_t enable)
         case USART_2:
             IRQvector = USART2_RX_IRQn;
             break;
+#endif
+#ifdef USART3
+        case USART_3:
+            IRQvector = USART3_RX_IRQn;
+            break;
+#endif
+#ifdef USART4
+        case USART_4:
+            IRQvector = USART4_RX_IRQn;
+            break;
+#endif
+#ifdef USART5
+        case USART_5:
+            IRQvector = USART5_RX_IRQn;
+            break;
 #endif
         default:
             error("Undefined SPI peripheral");
@@ -770,6 +812,24 @@ static void spi_master_dma_channel_setup(spi_t *obj, void* callback)
             rxChnlCfg.select = DMAREQ_USART2_RXDATAV;
             txChnlCfg.select = DMAREQ_USART2_TXEMPTY;
             break;
+#endif
+#ifdef USART3
+        case SPI_3:
+            rxChnlCfg.select = DMAREQ_USART3_RXDATAV;
+            txChnlCfg.select = DMAREQ_USART3_TXEMPTY;
+            break;
+#endif
+#ifdef USART4
+        case SPI_4:
+            rxChnlCfg.select = DMAREQ_USART4_RXDATAV;
+            txChnlCfg.select = DMAREQ_USART4_TXEMPTY;
+            break;
+#endif
+#ifdef USART5
+        case SPI_5:
+            rxChnlCfg.select = DMAREQ_USART5_RXDATAV;
+            txChnlCfg.select = DMAREQ_USART5_TXEMPTY;
+            break;
 #endif
         default:
             error("Spi module not available.. Out of bound access.");
@@ -799,12 +859,36 @@ static void spi_activate_dma(spi_t *obj, void* rxdata, const void* txdata, int t
         /* Select RX source address. 9 bit frame length requires to use extended register.
            10 bit and larger frame requires to use RXDOUBLE register. */
         switch((int)obj->spi.spi) {
+#ifdef USART0
             case USART_0:
                 dma_periph = ldmaPeripheralSignal_USART0_RXDATAV;
                 break;
+#endif
+#ifdef USART1
             case USART_1:
                 dma_periph = ldmaPeripheralSignal_USART1_RXDATAV;
                 break;
+#endif
+#ifdef USART2
+            case USART_2:
+                dma_periph = ldmaPeripheralSignal_USART2_RXDATAV;
+                break;
+#endif
+#ifdef USART3
+            case USART_3:
+                dma_periph = ldmaPeripheralSignal_USART3_RXDATAV;
+                break;
+#endif
+#ifdef USART4
+            case USART_4:
+                dma_periph = ldmaPeripheralSignal_USART4_RXDATAV;
+                break;
+#endif
+#ifdef USART5
+            case USART_5:
+                dma_periph = ldmaPeripheralSignal_USART5_RXDATAV;
+                break;
+#endif
             default:
                 EFM_ASSERT(0);
                 while(1);