mirror of https://github.com/ARMmbed/mbed-os.git
Adapt FPGA tests for spi, i2c, analogin, pwm, uart to test direct init (explicit pinmap).
Przemyslaw Stekiel
parent
7b0ceb0140
commit
af0ab802d4
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@ -28,6 +28,7 @@
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#include "greentea-client/test_env.h"
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#include "mbed.h"
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#include "pinmap.h"
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#include "hal/explicit_pinmap.h"
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#include "test_utils.h"
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#include "MbedTester.h"
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#include "analogin_fpga_test.h"
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@ -36,8 +37,8 @@ using namespace utest::v1;
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#define analogin_debug_printf(...)
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#define DELTA_FLOAT 0.05f // 5%
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#define DELTA_U16 3277 // 5%
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#define DELTA_FLOAT (0.1f) // 10%
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#define DELTA_U16 (2*3277) // 10%
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const PinList *form_factor = pinmap_ff_default_pins();
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const PinList *restricted = pinmap_restricted_pins();
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@ -52,6 +53,7 @@ void fpga_analogin_init_test(PinName pin)
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analogin_free(&analogin);
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}
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template<bool init_direct>
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void fpga_analogin_test(PinName pin)
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{
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tester.reset();
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@ -61,7 +63,13 @@ void fpga_analogin_test(PinName pin)
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/* Test analog input */
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analogin_t analogin;
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analogin_init(&analogin, pin);
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if (init_direct) {
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const PinMap pinmap = get_analogin_pinmap(pin);
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analogin_init_direct(&analogin, &pinmap);
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} else {
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analogin_init(&analogin, pin);
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}
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tester.gpio_write(MbedTester::LogicalPinGPIO0, 1, true);
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TEST_ASSERT_FLOAT_WITHIN(DELTA_FLOAT, 1.0f, analogin_read(&analogin));
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@ -81,7 +89,8 @@ Case cases[] = {
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// This will be run for all pins
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Case("AnalogIn - init test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_init_test>),
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// This will be run for single pin
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Case("AnalogIn - read test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_test>),
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Case("AnalogIn - read test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_test<false>>),
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Case("AnalogIn (direct init) - read test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_test<true>>),
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};
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utest::v1::status_t greentea_test_setup(const size_t number_of_cases)
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@ -29,6 +29,7 @@
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#include "mbed.h"
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#include "i2c_api.h"
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#include "pinmap.h"
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#include "hal/explicit_pinmap.h"
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#include "test_utils.h"
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#include "I2CTester.h"
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#include "i2c_fpga_test.h"
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@ -53,6 +54,7 @@ void fpga_test_i2c_init_free(PinName sda, PinName scl)
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i2c_free(&obj);
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}
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template<bool init_direct>
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void fpga_i2c_test_write(PinName sda, PinName scl)
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{
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// Remap pins for test
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@ -66,7 +68,17 @@ void fpga_i2c_test_write(PinName sda, PinName scl)
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// Initialize mbed I2C pins
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i2c_t i2c;
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memset(&i2c, 0, sizeof(i2c));
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i2c_init(&i2c, sda, scl);
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if (init_direct) {
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#if EXPLICIT_PINMAP_READY
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const i2c_pinmap_t pinmap = get_i2c_pinmap(sda, scl);
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i2c_init_direct(&i2c, &pinmap);
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#else
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//skip this test case if explicit pinmap is not supported
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return;
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#endif
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} else {
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i2c_init(&i2c, sda, scl);
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}
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i2c_frequency(&i2c, 100000);
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// Reset tester stats and select I2C
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@ -141,6 +153,7 @@ void fpga_i2c_test_write(PinName sda, PinName scl)
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i2c_free(&i2c);
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}
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template<bool init_direct>
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void fpga_i2c_test_read(PinName sda, PinName scl)
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{
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// Remap pins for test
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@ -154,7 +167,12 @@ void fpga_i2c_test_read(PinName sda, PinName scl)
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// Initialize mbed I2C pins
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i2c_t i2c;
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memset(&i2c, 0, sizeof(i2c));
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i2c_init(&i2c, sda, scl);
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if (init_direct) {
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const i2c_pinmap_t pinmap = get_i2c_pinmap(sda, scl);
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i2c_init_direct(&i2c, &pinmap);
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} else {
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i2c_init(&i2c, sda, scl);
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}
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i2c_frequency(&i2c, 100000);
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// Reset tester stats and select I2C
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@ -428,11 +446,13 @@ void fpga_i2c_test_byte_read(PinName sda, PinName scl)
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}
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Case cases[] = {
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Case("i2c - init/free test all pins", one_peripheral<I2CPort, DefaultFormFactor, fpga_test_i2c_init_free>),
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Case("i2c - test write i2c API", one_peripheral<I2CPort, DefaultFormFactor, fpga_i2c_test_write>),
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Case("i2c - test read i2c API", one_peripheral<I2CPort, DefaultFormFactor, fpga_i2c_test_read>),
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Case("i2c - test single byte write i2c API", one_peripheral<I2CPort, DefaultFormFactor, fpga_i2c_test_byte_write>),
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Case("i2c - test single byte read i2c API", one_peripheral<I2CPort, DefaultFormFactor, fpga_i2c_test_byte_read>)
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Case("i2c - init/free test all pins", all_ports<I2CPort, DefaultFormFactor, fpga_test_i2c_init_free>),
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Case("i2c - test write i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_write<false>>),
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Case("i2c (direct init) - test write i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_write<true>>),
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Case("i2c - test read i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_read<false>>),
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Case("i2c (direct init) - test read i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_read<true>>),
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Case("i2c - test single byte write i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_byte_write>),
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Case("i2c - test single byte read i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_byte_read>)
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};
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utest::v1::status_t greentea_test_setup(const size_t number_of_cases)
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@ -29,12 +29,12 @@
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#include "mbed.h"
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#include "MbedTester.h"
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#include "pinmap.h"
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#include "hal/explicit_pinmap.h"
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#include "test_utils.h"
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#include "pwm_fpga_test.h"
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using namespace utest::v1;
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#define pwm_debug_printf(...)
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typedef enum {
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@ -74,7 +74,7 @@ void fpga_pwm_init_free(PinName pin)
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}
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void fpga_pwm_period_fill_test(PinName pin, uint32_t period_ms, uint32_t fill_prc, pwm_api_test_t api_test)
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void fpga_pwm_period_fill_test(PinName pin, uint32_t period_ms, uint32_t fill_prc, pwm_api_test_t api_test, bool init_direct)
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{
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pwm_debug_printf("PWM test on pin = %s (%i)\r\n", pinmap_ff_default_pin_to_string(pin), pin);
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pwm_debug_printf("Testing period = %lu ms, duty-cycle = %lu %%\r\n", period_ms, fill_prc);
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@ -86,7 +86,12 @@ void fpga_pwm_period_fill_test(PinName pin, uint32_t period_ms, uint32_t fill_pr
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pwmout_t pwm_out;
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pwmout_init(&pwm_out, pin);
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if (init_direct) {
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const PinMap pinmap = get_pwm_pinmap(pin);
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pwmout_init_direct(&pwm_out, &pinmap);
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} else {
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pwmout_init(&pwm_out, pin);
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}
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core_util_critical_section_enter();
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@ -156,10 +161,10 @@ void fpga_pwm_period_fill_test(PinName pin, uint32_t period_ms, uint32_t fill_pr
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pwmout_free(&pwm_out);
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}
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template<uint32_t period_ms, uint32_t fill_prc, pwm_api_test_t api_test>
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template<uint32_t period_ms, uint32_t fill_prc, pwm_api_test_t api_test, bool init_direct>
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void fpga_pwm_period_fill_test(PinName pin)
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{
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fpga_pwm_period_fill_test(pin, period_ms, fill_prc, api_test);
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fpga_pwm_period_fill_test(pin, period_ms, fill_prc, api_test, init_direct);
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}
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@ -168,48 +173,49 @@ Case cases[] = {
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Case("PWM - init/free test", all_ports<PWMPort, DefaultFormFactor, fpga_pwm_init_free>),
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// This will be run for single pin
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Case("PWM - period: 10 ms, fill: 10%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_WRITE> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_WRITE, false> >),
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Case("PWM (direct init) - period: 10 ms, fill: 10%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_WRITE, true> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_MS_WRITE> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_US_WRITE> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_PULSEWIDTH> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_PULSEWIDTH_MS> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_PULSEWIDTH_US> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_MS_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_US_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_PULSEWIDTH, false> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_PULSEWIDTH_MS, false> >),
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Case("PWM - period: 10 ms, fill: 10%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 10, PERIOD_PULSEWIDTH_US, false> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_WRITE> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_MS_WRITE> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_US_WRITE> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_PULSEWIDTH> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_PULSEWIDTH_MS> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_PULSEWIDTH_US> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_MS_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_US_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_PULSEWIDTH, false> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_PULSEWIDTH_MS, false> >),
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Case("PWM - period: 10 ms, fill: 50%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 50, PERIOD_PULSEWIDTH_US, false> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_WRITE> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_MS_WRITE> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_US_WRITE> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_PULSEWIDTH> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_PULSEWIDTH_MS> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_PULSEWIDTH_US> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_MS_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_US_WRITE, false> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_PULSEWIDTH, false> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_PULSEWIDTH_MS, false> >),
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Case("PWM - period: 10 ms, fill: 90%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<10, 90, PERIOD_PULSEWIDTH_US, false> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_WRITE> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_MS_WRITE> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_US_WRITE> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_PULSEWIDTH> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_PULSEWIDTH_MS> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_PULSEWIDTH_US> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_WRITE, false> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_MS_WRITE, false> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_US_WRITE, false> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_PULSEWIDTH, false> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_PULSEWIDTH_MS, false> >),
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Case("PWM - period: 30 ms, fill: 10%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 10, PERIOD_PULSEWIDTH_US, false> >),
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Case("PWM - period: 30 ms, fill: 50%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_WRITE> >),
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Case("PWM - period: 30 ms, fill: 50%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_MS_WRITE> >),
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Case("PWM - period: 30 ms, fill: 50%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_US_WRITE> >),
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Case("PWM - period: 30 ms, fill: 50%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_PULSEWIDTH> >),
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Case("PWM - period: 30 ms, fill: 50%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_PULSEWIDTH_MS> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_PULSEWIDTH_US> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_WRITE, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_MS_WRITE, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_US_WRITE, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_PULSEWIDTH, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_PULSEWIDTH_MS, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 50%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 50, PERIOD_PULSEWIDTH_US, false> >),
|
||||
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_WRITE> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_MS_WRITE> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_US_WRITE> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_PULSEWIDTH> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_PULSEWIDTH_MS> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_PULSEWIDTH_US> >)
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_WRITE, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period_ms/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_MS_WRITE, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period_us/write", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_US_WRITE, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/pulse_width", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_PULSEWIDTH, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/pulse_width_ms", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_PULSEWIDTH_MS, false> >),
|
||||
Case("PWM - period: 30 ms, fill: 90%, api: period/pulse_width_us", one_peripheral<PWMPort, DefaultFormFactor, fpga_pwm_period_fill_test<30, 90, PERIOD_PULSEWIDTH_US, false> >)
|
||||
};
|
||||
|
||||
utest::v1::status_t greentea_test_setup(const size_t number_of_cases)
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
#include "mbed.h"
|
||||
#include "SPIMasterTester.h"
|
||||
#include "pinmap.h"
|
||||
#include "hal/explicit_pinmap.h"
|
||||
#include "test_utils.h"
|
||||
#include "spi_fpga_test.h"
|
||||
|
||||
|
|
@ -104,7 +105,7 @@ void fpga_spi_test_init_free(PinName mosi, PinName miso, PinName sclk, PinName s
|
|||
spi_free(&spi);
|
||||
}
|
||||
|
||||
void fpga_spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel, SPITester::SpiMode spi_mode, uint32_t sym_size, transfer_type_t transfer_type, uint32_t frequency)
|
||||
void fpga_spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel, SPITester::SpiMode spi_mode, uint32_t sym_size, transfer_type_t transfer_type, uint32_t frequency, bool init_direct)
|
||||
{
|
||||
spi_capabilities_t capabilities;
|
||||
|
||||
|
|
@ -126,7 +127,13 @@ void fpga_spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
|
||||
// Initialize mbed SPI pins
|
||||
|
||||
spi_init(&spi, mosi, miso, sclk, ssel);
|
||||
if (init_direct) {
|
||||
const spi_pinmap_t pinmap = get_spi_pinmap(mosi, miso, sclk, ssel);
|
||||
spi_init_direct(&spi, &pinmap);
|
||||
} else {
|
||||
spi_init(&spi, mosi, miso, sclk, ssel);
|
||||
}
|
||||
|
||||
spi_format(&spi, sym_size, spi_mode, 0);
|
||||
spi_frequency(&spi, frequency);
|
||||
|
||||
|
|
@ -204,10 +211,10 @@ void fpga_spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
tester.reset();
|
||||
}
|
||||
|
||||
template<SPITester::SpiMode spi_mode, uint32_t sym_size, transfer_type_t transfer_type, uint32_t frequency>
|
||||
template<SPITester::SpiMode spi_mode, uint32_t sym_size, transfer_type_t transfer_type, uint32_t frequency, bool init_direct>
|
||||
void fpga_spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
fpga_spi_test_common(mosi, miso, sclk, ssel, spi_mode, sym_size, transfer_type, frequency);
|
||||
fpga_spi_test_common(mosi, miso, sclk, ssel, spi_mode, sym_size, transfer_type, frequency, init_direct);
|
||||
}
|
||||
|
||||
Case cases[] = {
|
||||
|
|
@ -215,18 +222,23 @@ Case cases[] = {
|
|||
Case("SPI - init/free test all pins", all_ports<SPIPort, DefaultFormFactor, fpga_spi_test_init_free>),
|
||||
|
||||
// This will be run for all peripherals
|
||||
Case("SPI - basic test", all_peripherals<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
|
||||
Case("SPI - basic test", all_peripherals<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ, false> >),
|
||||
Case("SPI - basic test (direct init)", all_peripherals<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ, true> >),
|
||||
|
||||
// This will be run for single pin configuration
|
||||
Case("SPI - mode testing (MODE_1)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode1, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
|
||||
Case("SPI - mode testing (MODE_2)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode2, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
|
||||
Case("SPI - mode testing (MODE_3)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode3, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
|
||||
Case("SPI - symbol size testing (16)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 16, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ> >),
|
||||
Case("SPI - frequency testing (500 kHz)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_500_KHZ> >),
|
||||
Case("SPI - frequency testing (2 MHz)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_2_MHZ> >),
|
||||
Case("SPI - block write", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_BLOCK_WRITE_SYNC, FREQ_1_MHZ> >),
|
||||
Case("SPI - mode testing (MODE_1)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode1, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ, false> >),
|
||||
Case("SPI - mode testing (MODE_2)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode2, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ, false> >),
|
||||
Case("SPI - mode testing (MODE_3)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode3, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ, false> >),
|
||||
|
||||
Case("SPI - symbol size testing (16)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 16, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_1_MHZ, false> >),
|
||||
|
||||
Case("SPI - frequency testing (500 kHz)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_500_KHZ, false> >),
|
||||
Case("SPI - frequency testing (2 MHz)", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_WRITE_SYNC, FREQ_2_MHZ, false> >),
|
||||
|
||||
Case("SPI - block write", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_BLOCK_WRITE_SYNC, FREQ_1_MHZ, false> >),
|
||||
|
||||
#if DEVICE_SPI_ASYNCH
|
||||
Case("SPI - async mode", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_TRANSFER_ASYNC, FREQ_1_MHZ> >)
|
||||
Case("SPI - async mode", one_peripheral<SPIPort, DefaultFormFactor, fpga_spi_test_common<SPITester::Mode0, 8, TRANSFER_SPI_MASTER_TRANSFER_ASYNC, FREQ_1_MHZ, false> >)
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
#include "serial_api.h"
|
||||
#include "us_ticker_api.h"
|
||||
#include "uart_fpga_test.h"
|
||||
#include "hal/explicit_pinmap.h"
|
||||
|
||||
using namespace utest::v1;
|
||||
|
||||
|
|
@ -81,7 +82,7 @@ static void test_irq_handler(uint32_t id, SerialIrq event)
|
|||
}
|
||||
}
|
||||
|
||||
static void uart_test_common(int baudrate, int data_bits, SerialParity parity, int stop_bits, PinName tx, PinName rx, PinName cts, PinName rts)
|
||||
static void uart_test_common(int baudrate, int data_bits, SerialParity parity, int stop_bits, bool init_direct, PinName tx, PinName rx, PinName cts, PinName rts)
|
||||
{
|
||||
// The FPGA CI shield only supports None, Odd & Even.
|
||||
// Forced parity is not supported on Atmel, Freescale, Nordic & STM targets.
|
||||
|
|
@ -116,12 +117,27 @@ static void uart_test_common(int baudrate, int data_bits, SerialParity parity, i
|
|||
|
||||
// Initialize mbed UART pins
|
||||
serial_t serial;
|
||||
serial_init(&serial, tx, rx);
|
||||
if (init_direct) {
|
||||
const serial_pinmap_t pinmap = get_uart_pinmap(tx, rx);
|
||||
serial_init_direct(&serial, &pinmap);
|
||||
} else {
|
||||
serial_init(&serial, tx, rx);
|
||||
}
|
||||
serial_baud(&serial, baudrate);
|
||||
serial_format(&serial, data_bits, parity, stop_bits);
|
||||
#if DEVICE_SERIAL_FC
|
||||
if (use_flow_control) {
|
||||
serial_set_flow_control(&serial, FlowControlRTSCTS, rts, cts);
|
||||
if (init_direct) {
|
||||
#if EXPLICIT_PINMAP_READY
|
||||
const serial_fc_pinmap_t pinmap = get_uart_fc_pinmap(rts, cts);
|
||||
serial_set_flow_control_direct(&serial, FlowControlRTSCTS, &pinmap);
|
||||
#else
|
||||
//skip this test case if explicit pinmap is not supported
|
||||
return;
|
||||
#endif
|
||||
} else {
|
||||
serial_set_flow_control(&serial, FlowControlRTSCTS, rts, cts);
|
||||
}
|
||||
} else {
|
||||
serial_set_flow_control(&serial, FlowControlNone, NC, NC);
|
||||
}
|
||||
|
|
@ -293,16 +309,16 @@ void fpga_uart_init_free_test_no_fc(PinName tx, PinName rx)
|
|||
fpga_uart_init_free_test(tx, rx);
|
||||
}
|
||||
|
||||
template<int BAUDRATE, int DATA_BITS, SerialParity PARITY, int STOP_BITS>
|
||||
template<int BAUDRATE, int DATA_BITS, SerialParity PARITY, int STOP_BITS, bool INIT_DIRECT>
|
||||
void fpga_uart_test_common(PinName tx, PinName rx, PinName cts, PinName rts)
|
||||
{
|
||||
uart_test_common(BAUDRATE, DATA_BITS, PARITY, STOP_BITS, tx, rx, cts, rts);
|
||||
uart_test_common(BAUDRATE, DATA_BITS, PARITY, STOP_BITS, INIT_DIRECT, tx, rx, cts, rts);
|
||||
}
|
||||
|
||||
template<int BAUDRATE, int DATA_BITS, SerialParity PARITY, int STOP_BITS>
|
||||
template<int BAUDRATE, int DATA_BITS, SerialParity PARITY, int STOP_BITS, bool INIT_DIRECT>
|
||||
void fpga_uart_test_common_no_fc(PinName tx, PinName rx)
|
||||
{
|
||||
uart_test_common(BAUDRATE, DATA_BITS, PARITY, STOP_BITS, tx, rx);
|
||||
uart_test_common(BAUDRATE, DATA_BITS, PARITY, STOP_BITS, INIT_DIRECT, tx, rx);
|
||||
}
|
||||
|
||||
Case cases[] = {
|
||||
|
|
@ -310,34 +326,36 @@ Case cases[] = {
|
|||
Case("init/free, FC off", all_ports<UARTNoFCPort, DefaultFormFactor, fpga_uart_init_free_test_no_fc>),
|
||||
|
||||
// One set of pins from every peripheral.
|
||||
Case("basic, 9600, 8N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 1> >),
|
||||
Case("basic, 9600, 8N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 1, false> >),
|
||||
Case("basic (direct init), 9600, 8N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 1, true> >),
|
||||
|
||||
// One set of pins from one peripheral.
|
||||
// baudrate
|
||||
Case("19200, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<19200, 8, ParityNone, 1> >),
|
||||
Case("38400, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<38400, 8, ParityNone, 1> >),
|
||||
Case("115200, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<115200, 8, ParityNone, 1> >),
|
||||
Case("19200, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<19200, 8, ParityNone, 1, false> >),
|
||||
Case("38400, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<38400, 8, ParityNone, 1, false> >),
|
||||
Case("115200, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<115200, 8, ParityNone, 1, false> >),
|
||||
// stop bits
|
||||
Case("9600, 8N2, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 2> >),
|
||||
Case("9600, 8N2, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 2, false> >),
|
||||
|
||||
#if DEVICE_SERIAL_FC
|
||||
// Every set of pins from every peripheral.
|
||||
Case("init/free, FC on", all_ports<UARTPort, DefaultFormFactor, fpga_uart_init_free_test>),
|
||||
|
||||
// One set of pins from every peripheral.
|
||||
Case("basic, 9600, 8N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 1> >),
|
||||
Case("basic, 9600, 8N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 1, false> >),
|
||||
Case("basic (direct init), 9600, 8N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 1, true> >),
|
||||
|
||||
// One set of pins from one peripheral.
|
||||
// baudrate
|
||||
Case("19200, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<19200, 8, ParityNone, 1> >),
|
||||
Case("38400, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<38400, 8, ParityNone, 1> >),
|
||||
Case("115200, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<115200, 8, ParityNone, 1> >),
|
||||
Case("19200, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<19200, 8, ParityNone, 1, false> >),
|
||||
Case("38400, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<38400, 8, ParityNone, 1, false> >),
|
||||
Case("115200, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<115200, 8, ParityNone, 1, false> >),
|
||||
// data bits: not tested (some platforms support 8 bits only)
|
||||
// parity
|
||||
Case("9600, 8O1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityOdd, 1> >),
|
||||
Case("9600, 8E1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityEven, 1> >),
|
||||
Case("9600, 8O1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityOdd, 1, false> >),
|
||||
Case("9600, 8E1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityEven, 1, false> >),
|
||||
// stop bits
|
||||
Case("9600, 8N2, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 2> >),
|
||||
Case("9600, 8N2, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 2, false> >),
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ void fpga_uart_test_common(PinName tx, PinName rx, PinName cts = NC, PinName rts
|
|||
void fpga_uart_test_common_no_fc(PinName tx, PinName rx);
|
||||
|
||||
/* Common test function. */
|
||||
static void uart_test_common(int baudrate, int data_bits, SerialParity parity, int stop_bits, PinName tx, PinName rx, PinName cts = NC, PinName rts = NC);
|
||||
static void uart_test_common(int baudrate, int data_bits, SerialParity parity, int stop_bits, bool init_direct, PinName tx, PinName rx, PinName cts = NC, PinName rts = NC);
|
||||
|
||||
/**@}*/
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue