mirror of https://github.com/ARMmbed/mbed-os.git
commit
ae2bef48cf
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@ -402,6 +402,27 @@ typedef enum {
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SYS_PWR_WKUP8_ALT0 = PA_7,
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SYS_PWR_WKUP8_ALT1 = PB_10,
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/**** OSPI FLASH pins ****/
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OSPI_FLASH1_IO0 = PF_0,
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OSPI_FLASH1_IO1 = PF_1,
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OSPI_FLASH1_IO2 = PF_2,
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OSPI_FLASH1_IO3 = PF_3,
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OSPI_FLASH1_IO4 = PH_9,
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OSPI_FLASH1_IO5 = PH_10,
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OSPI_FLASH1_IO6 = PH_11,
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OSPI_FLASH1_IO7 = PH_12,
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OSPI_FLASH1_DQS = PF_12,
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OSPI_FLASH1_SCK = PF_4,
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OSPI_FLASH1_CSN = PI_5,
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/**** QSPI FLASH pins ****/
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QSPI_FLASH1_IO0 = OSPI_FLASH1_IO0,
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QSPI_FLASH1_IO1 = OSPI_FLASH1_IO1,
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QSPI_FLASH1_IO2 = OSPI_FLASH1_IO2,
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QSPI_FLASH1_IO3 = OSPI_FLASH1_IO3,
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QSPI_FLASH1_SCK = OSPI_FLASH1_SCK,
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QSPI_FLASH1_CSN = OSPI_FLASH1_CSN,
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// Not connected
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NC = (int)0xFFFFFFFF
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} PinName;
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@ -55,7 +55,7 @@ static uint32_t get_alt_bytes_size(const uint32_t num_bytes)
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ospi_status_t ospi_prepare_command(const ospi_command_t *command, OSPI_RegularCmdTypeDef *st_command)
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{
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debug_if(ospi_api_c_debug, "ospi_prepare_command In: instruction.value %x dummy_count %x address.bus_width %x address.disabled %x address.value %x address.size %x\n",
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debug_if(ospi_api_c_debug, "ospi_prepare_command In: instruction.value %x dummy_count %u address.bus_width %x address.disabled %x address.value %x address.size %x\n",
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command->instruction.value, command->dummy_count, command->address.bus_width, command->address.disabled, command->address.value, command->address.size);
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st_command->FlashId = HAL_OSPI_FLASH_ID_1;
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@ -255,18 +255,21 @@ static ospi_status_t _ospi_init_direct(ospi_t *obj, const ospi_pinmap_t *pinmap,
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obj->handle.Init.DeviceSize = 32;
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obj->handle.Init.ChipSelectHighTime = 3;
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obj->handle.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
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#if defined(HAL_OSPI_WRAP_NOT_SUPPORTED) // removed in STM32L4
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#if defined(HAL_OSPI_WRAP_NOT_SUPPORTED)
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obj->handle.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED;
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#endif
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obj->handle.Init.ClockMode = mode == 0 ? HAL_OSPI_CLOCK_MODE_0 : HAL_OSPI_CLOCK_MODE_3;
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obj->handle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;
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obj->handle.Init.ChipSelectBoundary = 0;
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#if defined(HAL_OSPI_DELAY_BLOCK_USED) // STM32L5
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#if defined(HAL_OSPI_DELAY_BLOCK_USED)
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obj->handle.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_USED;
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#endif
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#if defined(TARGET_STM32L5)
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#if defined(TARGET_STM32L5) || defined(TARGET_STM32U5)
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obj->handle.Init.Refresh = 0;
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#endif
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#if defined(OCTOSPI_DCR3_MAXTRAN)
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obj->handle.Init.MaxTran = 0;
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#endif
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// tested all combinations, take first
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obj->ospi = pinmap->peripheral;
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@ -371,13 +374,13 @@ ospi_status_t ospi_init(ospi_t *obj, PinName io0, PinName io1, PinName io2, PinN
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OSPIName ospiio1name = (OSPIName)pinmap_peripheral(io1, PinMap_OSPI_DATA1);
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OSPIName ospiio2name = (OSPIName)pinmap_peripheral(io2, PinMap_OSPI_DATA2);
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OSPIName ospiio3name = (OSPIName)pinmap_peripheral(io3, PinMap_OSPI_DATA3);
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OSPIName ospiio4name = (OSPIName)pinmap_peripheral(io4, PinMap_OSPI_DATA4);
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OSPIName ospiio5name = (OSPIName)pinmap_peripheral(io5, PinMap_OSPI_DATA5);
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OSPIName ospiio6name = (OSPIName)pinmap_peripheral(io6, PinMap_OSPI_DATA6);
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OSPIName ospiio7name = (OSPIName)pinmap_peripheral(io7, PinMap_OSPI_DATA7);
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// OSPIName ospiio4name = (OSPIName)pinmap_peripheral(io4, PinMap_OSPI_DATA4); // IO4 pin not checked
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// OSPIName ospiio5name = (OSPIName)pinmap_peripheral(io5, PinMap_OSPI_DATA5); // IO5 pin not checked
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// OSPIName ospiio6name = (OSPIName)pinmap_peripheral(io6, PinMap_OSPI_DATA6); // IO6 pin not checked
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// OSPIName ospiio7name = (OSPIName)pinmap_peripheral(io7, PinMap_OSPI_DATA7); // IO7 pin not checked
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OSPIName ospiclkname = (OSPIName)pinmap_peripheral(sclk, PinMap_OSPI_SCLK);
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OSPIName ospisselname = (OSPIName)pinmap_peripheral(ssel, PinMap_OSPI_SSEL);
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OSPIName ospidqsname = (OSPIName)pinmap_peripheral(dqs, PinMap_OSPI_DQS);
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// OSPIName ospidqsname = (OSPIName)pinmap_peripheral(dqs, PinMap_OSPI_DQS); // DQS pin not checked
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OSPIName ospi_data_first = (OSPIName)pinmap_merge(ospiio0name, ospiio1name);
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OSPIName ospi_data_second = (OSPIName)pinmap_merge(ospiio2name, ospiio3name);
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@ -451,24 +454,29 @@ ospi_status_t ospi_free(ospi_t *obj)
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ospi_status_t ospi_frequency(ospi_t *obj, int hz)
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{
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tr_debug("ospi_frequency hz %d", hz);
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ospi_status_t status = OSPI_STATUS_OK;
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/* HCLK drives OSPI. OSPI clock depends on prescaler value:
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/* OSPI clock depends on prescaler value:
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* 0: Freq = HCLK
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* 1: Freq = HCLK/2
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* ...
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* 255: Freq = HCLK/256 (minimum value)
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*/
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int div = HAL_RCC_GetHCLKFreq() / hz;
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#if defined(TARGET_STM32L5)
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uint32_t OSPI_clock_source = HAL_RCC_GetSysClockFreq();
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#else
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uint32_t OSPI_clock_source = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_OSPI);
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#endif
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int div = OSPI_clock_source / hz;
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if (div > 255) {
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div = 255;
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} else {
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if (div == 1) {
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if (OSPI_clock_source % hz != 0) {
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div = div + 1;
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}
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}
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tr_debug("ospi_frequency hz %d source %d Prescaler %d", hz, OSPI_clock_source, div);
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obj->handle.Init.ClockPrescaler = div;
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@ -4631,6 +4631,16 @@
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"ARDUINO_UNO"
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],
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"device_name": "STM32U585AIIx",
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"extra_labels_add": [
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"MX25LM51245G"
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],
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"components_add": [
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"OSPIF"
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],
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"device_has_add": [
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"QSPI",
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"OSPI"
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],
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"components_add": ["EMW3080B"],
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"overrides": {
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"network-default-interface-type": "WIFI"
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