mirror of https://github.com/ARMmbed/mbed-os.git
NUCLEO_F031K6 : add new target
adustm
parent
d9384660dc
commit
ae0891878a
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;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
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;* File Name : startup_stm32f031x6.s
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;* Author : MCD Application Team
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;* Version : V2.2.2
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;* Date : 26-June-2015
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;* Description : STM32F031x4/STM32F031x6 devices vector table for MDK-ARM toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == Reset_Handler
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;* - Set the vector table entries with the exceptions ISR address
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;* - Branches to __main in the C library (which eventually
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;* calls main()).
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;* After Reset the CortexM0 processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;* <<< Use Configuration Wizard in Context Menu >>>
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;*******************************************************************************
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;
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;* Redistribution and use in source and binary forms, with or without modification,
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;* are permitted provided that the following conditions are met:
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;* 1. Redistributions of source code must retain the above copyright notice,
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;* this list of conditions and the following disclaimer.
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;* 2. Redistributions in binary form must reproduce the above copyright notice,
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;* this list of conditions and the following disclaimer in the documentation
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;* and/or other materials provided with the distribution.
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;* 3. Neither the name of STMicroelectronics nor the names of its contributors
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;* may be used to endorse or promote products derived from this software
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;* without specific prior written permission.
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;*
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;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;
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;*******************************************************************************
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; Amount of memory (in bytes) allocated for Stack
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; Tailor this value to your application needs
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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EXPORT __initial_sp
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20001000 ; Top of RAM
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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EXPORT __heap_base
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EXPORT __heap_limit
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit EQU (__initial_sp - Stack_Size)
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDG_IRQHandler ; Window Watchdog
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DCD PVD_IRQHandler ; PVD through EXTI Line detect
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DCD RTC_IRQHandler ; RTC through EXTI Line
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DCD FLASH_IRQHandler ; FLASH
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DCD RCC_IRQHandler ; RCC
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DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
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DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
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DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
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DCD 0 ; Reserved
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DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
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DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
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DCD ADC1_IRQHandler ; ADC1
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DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
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DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
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DCD TIM2_IRQHandler ; TIM2
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DCD TIM3_IRQHandler ; TIM3
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD TIM14_IRQHandler ; TIM14
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DCD 0 ; Reserved
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DCD TIM16_IRQHandler ; TIM16
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DCD TIM17_IRQHandler ; TIM17
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DCD I2C1_IRQHandler ; I2C1
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DCD 0 ; Reserved
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DCD SPI1_IRQHandler ; SPI1
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DCD 0 ; Reserved
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DCD USART1_IRQHandler ; USART1
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler routine
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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IMPORT SystemInit
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WWDG_IRQHandler [WEAK]
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EXPORT PVD_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT FLASH_IRQHandler [WEAK]
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EXPORT RCC_IRQHandler [WEAK]
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EXPORT EXTI0_1_IRQHandler [WEAK]
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EXPORT EXTI2_3_IRQHandler [WEAK]
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EXPORT EXTI4_15_IRQHandler [WEAK]
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EXPORT DMA1_Channel1_IRQHandler [WEAK]
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EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
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EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
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EXPORT ADC1_IRQHandler [WEAK]
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EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
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EXPORT TIM1_CC_IRQHandler [WEAK]
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EXPORT TIM2_IRQHandler [WEAK]
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EXPORT TIM3_IRQHandler [WEAK]
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EXPORT TIM14_IRQHandler [WEAK]
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EXPORT TIM16_IRQHandler [WEAK]
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EXPORT TIM17_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT USART1_IRQHandler [WEAK]
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WWDG_IRQHandler
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PVD_IRQHandler
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RTC_IRQHandler
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FLASH_IRQHandler
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RCC_IRQHandler
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EXTI0_1_IRQHandler
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EXTI2_3_IRQHandler
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EXTI4_15_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_3_IRQHandler
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DMA1_Channel4_5_IRQHandler
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ADC1_IRQHandler
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TIM1_BRK_UP_TRG_COM_IRQHandler
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TIM1_CC_IRQHandler
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TIM2_IRQHandler
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TIM3_IRQHandler
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TIM14_IRQHandler
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TIM16_IRQHandler
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TIM17_IRQHandler
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I2C1_IRQHandler
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SPI1_IRQHandler
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USART1_IRQHandler
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B .
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ENDP
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ALIGN
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END
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;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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@ -0,0 +1,45 @@
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; Scatter-Loading Description File
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright (c) 2014, STMicroelectronics
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; 1. Redistributions of source code must retain the above copyright notice,
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; this list of conditions and the following disclaimer.
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; 2. Redistributions in binary form must reproduce the above copyright notice,
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; this list of conditions and the following disclaimer in the documentation
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; and/or other materials provided with the distribution.
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; 3. Neither the name of STMicroelectronics nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; 32KB FLASH (0x8000) + 4KB RAM (0x1000)
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LR_IROM1 0x08000000 0x8000 { ; load region size_region
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ER_IROM1 0x08000000 0x8000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; 44 vectors = 176 bytes (0xB0) to be reserved in RAM
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RW_IRAM1 (0x20000000+0xB0) (0x1000-0xB0) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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@ -0,0 +1,56 @@
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/* mbed Microcontroller Library - stackheap
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* Setup a fixed single stack/heap memory model,
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* between the top of the RW/ZI region and the stackpointer
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*******************************************************************************
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* Copyright (c) 2014, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rt_misc.h>
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#include <stdint.h>
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extern char Image$$RW_IRAM1$$ZI$$Limit[];
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
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uint32_t sp_limit = __current_sp();
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
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struct __initial_stackheap r;
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r.heap_base = zi_limit;
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r.heap_limit = sp_limit;
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return r;
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}
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#ifdef __cplusplus
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}
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#endif
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@ -0,0 +1,199 @@
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;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
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;* File Name : startup_stm32f031x6.s
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;* Author : MCD Application Team
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;* Version : V2.2.2
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;* Date : 26-June-2015
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;* Description : STM32F031x4/STM32F031x6 devices vector table for MDK-ARM toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == Reset_Handler
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;* - Set the vector table entries with the exceptions ISR address
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;* - Branches to __main in the C library (which eventually
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;* calls main()).
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;* After Reset the CortexM0 processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;* <<< Use Configuration Wizard in Context Menu >>>
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;*******************************************************************************
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;
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;* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
;* are permitted provided that the following conditions are met:
|
||||||
|
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer.
|
||||||
|
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer in the documentation
|
||||||
|
;* and/or other materials provided with the distribution.
|
||||||
|
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
;* may be used to endorse or promote products derived from this software
|
||||||
|
;* without specific prior written permission.
|
||||||
|
;*
|
||||||
|
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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|
;
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;*******************************************************************************
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|
|
||||||
|
__initial_sp EQU 0x20001000 ; Top of RAM
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
|
||||||
|
; Vector Table Mapped to Address 0 at Reset
|
||||||
|
AREA RESET, DATA, READONLY
|
||||||
|
EXPORT __Vectors
|
||||||
|
EXPORT __Vectors_End
|
||||||
|
EXPORT __Vectors_Size
|
||||||
|
|
||||||
|
__Vectors DCD __initial_sp ; Top of Stack
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WWDG_IRQHandler ; Window Watchdog
|
||||||
|
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||||
|
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||||
|
DCD FLASH_IRQHandler ; FLASH
|
||||||
|
DCD RCC_IRQHandler ; RCC
|
||||||
|
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||||
|
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||||
|
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||||
|
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||||
|
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
|
||||||
|
DCD ADC1_IRQHandler ; ADC1
|
||||||
|
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
|
||||||
|
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||||
|
DCD TIM2_IRQHandler ; TIM2
|
||||||
|
DCD TIM3_IRQHandler ; TIM3
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM14_IRQHandler ; TIM14
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM16_IRQHandler ; TIM16
|
||||||
|
DCD TIM17_IRQHandler ; TIM17
|
||||||
|
DCD I2C1_IRQHandler ; I2C1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SPI1_IRQHandler ; SPI1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD USART1_IRQHandler ; USART1
|
||||||
|
|
||||||
|
|
||||||
|
__Vectors_End
|
||||||
|
|
||||||
|
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||||
|
|
||||||
|
AREA |.text|, CODE, READONLY
|
||||||
|
|
||||||
|
; Reset handler routine
|
||||||
|
Reset_Handler PROC
|
||||||
|
EXPORT Reset_Handler [WEAK]
|
||||||
|
IMPORT __main
|
||||||
|
IMPORT SystemInit
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__main
|
||||||
|
BX R0
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||||
|
|
||||||
|
NMI_Handler PROC
|
||||||
|
EXPORT NMI_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
HardFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT HardFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SVC_Handler PROC
|
||||||
|
EXPORT SVC_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
PendSV_Handler PROC
|
||||||
|
EXPORT PendSV_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SysTick_Handler PROC
|
||||||
|
EXPORT SysTick_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
Default_Handler PROC
|
||||||
|
|
||||||
|
EXPORT WWDG_IRQHandler [WEAK]
|
||||||
|
EXPORT PVD_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_IRQHandler [WEAK]
|
||||||
|
EXPORT FLASH_IRQHandler [WEAK]
|
||||||
|
EXPORT RCC_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
|
||||||
|
EXPORT ADC1_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM2_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM3_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM14_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM16_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM17_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI1_IRQHandler [WEAK]
|
||||||
|
EXPORT USART1_IRQHandler [WEAK]
|
||||||
|
|
||||||
|
|
||||||
|
WWDG_IRQHandler
|
||||||
|
PVD_IRQHandler
|
||||||
|
RTC_IRQHandler
|
||||||
|
FLASH_IRQHandler
|
||||||
|
RCC_IRQHandler
|
||||||
|
EXTI0_1_IRQHandler
|
||||||
|
EXTI2_3_IRQHandler
|
||||||
|
EXTI4_15_IRQHandler
|
||||||
|
DMA1_Channel1_IRQHandler
|
||||||
|
DMA1_Channel2_3_IRQHandler
|
||||||
|
DMA1_Channel4_5_IRQHandler
|
||||||
|
ADC1_IRQHandler
|
||||||
|
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||||
|
TIM1_CC_IRQHandler
|
||||||
|
TIM2_IRQHandler
|
||||||
|
TIM3_IRQHandler
|
||||||
|
TIM14_IRQHandler
|
||||||
|
TIM16_IRQHandler
|
||||||
|
TIM17_IRQHandler
|
||||||
|
I2C1_IRQHandler
|
||||||
|
SPI1_IRQHandler
|
||||||
|
USART1_IRQHandler
|
||||||
|
|
||||||
|
B .
|
||||||
|
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
END
|
||||||
|
|
||||||
|
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||||
|
|
@ -0,0 +1,45 @@
|
||||||
|
; Scatter-Loading Description File
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; Copyright (c) 2014, STMicroelectronics
|
||||||
|
; All rights reserved.
|
||||||
|
;
|
||||||
|
; Redistribution and use in source and binary forms, with or without
|
||||||
|
; modification, are permitted provided that the following conditions are met:
|
||||||
|
;
|
||||||
|
; 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
; this list of conditions and the following disclaimer.
|
||||||
|
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
; this list of conditions and the following disclaimer in the documentation
|
||||||
|
; and/or other materials provided with the distribution.
|
||||||
|
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
; may be used to endorse or promote products derived from this software
|
||||||
|
; without specific prior written permission.
|
||||||
|
;
|
||||||
|
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
; 32KB FLASH (0x8000) + 4KB RAM (0x1000)
|
||||||
|
|
||||||
|
LR_IROM1 0x08000000 0x8000 { ; load region size_region
|
||||||
|
ER_IROM1 0x08000000 0x8000 { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
|
||||||
|
; 44 vectors = 176 bytes (0xB0) to be reserved in RAM
|
||||||
|
RW_IRAM1 (0x20000000+0xB0) (0x1000-0xB0) { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,56 @@
|
||||||
|
/* mbed Microcontroller Library - stackheap
|
||||||
|
* Setup a fixed single stack/heap memory model,
|
||||||
|
* between the top of the RW/ZI region and the stackpointer
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <rt_misc.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||||
|
|
||||||
|
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||||
|
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||||
|
uint32_t sp_limit = __current_sp();
|
||||||
|
|
||||||
|
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||||
|
|
||||||
|
struct __initial_stackheap r;
|
||||||
|
r.heap_base = zi_limit;
|
||||||
|
r.heap_limit = sp_limit;
|
||||||
|
return r;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,153 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32k
|
||||||
|
RAM (xrw) : ORIGIN = 0x200000B0, LENGTH = 4k - 0x0B0
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
|
* It references following symbols, which must be defined in code:
|
||||||
|
* Reset_Handler : Entry of reset handler
|
||||||
|
*
|
||||||
|
* It defines following symbols, which code can use without definition:
|
||||||
|
* __exidx_start
|
||||||
|
* __exidx_end
|
||||||
|
* __etext
|
||||||
|
* __data_start__
|
||||||
|
* __preinit_array_start
|
||||||
|
* __preinit_array_end
|
||||||
|
* __init_array_start
|
||||||
|
* __init_array_end
|
||||||
|
* __fini_array_start
|
||||||
|
* __fini_array_end
|
||||||
|
* __data_end__
|
||||||
|
* __bss_start__
|
||||||
|
* __bss_end__
|
||||||
|
* __end__
|
||||||
|
* end
|
||||||
|
* __HeapLimit
|
||||||
|
* __StackLimit
|
||||||
|
* __StackTop
|
||||||
|
* __stack
|
||||||
|
* _estack
|
||||||
|
*/
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
KEEP(*(.isr_vector))
|
||||||
|
*(.text*)
|
||||||
|
KEEP(*(.init))
|
||||||
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
/* .ctors */
|
||||||
|
*crtbegin.o(.ctors)
|
||||||
|
*crtbegin?.o(.ctors)
|
||||||
|
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||||
|
*(SORT(.ctors.*))
|
||||||
|
*(.ctors)
|
||||||
|
|
||||||
|
/* .dtors */
|
||||||
|
*crtbegin.o(.dtors)
|
||||||
|
*crtbegin?.o(.dtors)
|
||||||
|
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||||
|
*(SORT(.dtors.*))
|
||||||
|
*(.dtors)
|
||||||
|
|
||||||
|
*(.rodata*)
|
||||||
|
|
||||||
|
KEEP(*(.eh_frame*))
|
||||||
|
} > FLASH
|
||||||
|
|
||||||
|
.ARM.extab :
|
||||||
|
{
|
||||||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
|
} > FLASH
|
||||||
|
|
||||||
|
__exidx_start = .;
|
||||||
|
.ARM.exidx :
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
} > FLASH
|
||||||
|
__exidx_end = .;
|
||||||
|
|
||||||
|
__etext = .;
|
||||||
|
_sidata = .;
|
||||||
|
|
||||||
|
.data : AT (__etext)
|
||||||
|
{
|
||||||
|
__data_start__ = .;
|
||||||
|
_sdata = .;
|
||||||
|
*(vtable)
|
||||||
|
*(.data*)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* preinit data */
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||||
|
KEEP(*(.preinit_array))
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* init data */
|
||||||
|
PROVIDE_HIDDEN (__init_array_start = .);
|
||||||
|
KEEP(*(SORT(.init_array.*)))
|
||||||
|
KEEP(*(.init_array))
|
||||||
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* finit data */
|
||||||
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
KEEP(*(SORT(.fini_array.*)))
|
||||||
|
KEEP(*(.fini_array))
|
||||||
|
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||||
|
|
||||||
|
KEEP(*(.jcr*))
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* All data end */
|
||||||
|
__data_end__ = .;
|
||||||
|
_edata = .;
|
||||||
|
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
__bss_start__ = .;
|
||||||
|
_sbss = .;
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
. = ALIGN(4);
|
||||||
|
__bss_end__ = .;
|
||||||
|
_ebss = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
.heap (COPY):
|
||||||
|
{
|
||||||
|
__end__ = .;
|
||||||
|
end = __end__;
|
||||||
|
*(.heap*)
|
||||||
|
__HeapLimit = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||||
|
* used for linker to calculate size of stack sections, and assign
|
||||||
|
* values to stack symbols later */
|
||||||
|
.stack_dummy (COPY):
|
||||||
|
{
|
||||||
|
*(.stack*)
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
/* Set stack top to end of RAM, and stack limit move down by
|
||||||
|
* size of stack_dummy section */
|
||||||
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
_estack = __StackTop;
|
||||||
|
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||||
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,279 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file startup_stm32f031x6.s
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.2.2
|
||||||
|
* @date 26-June-2015
|
||||||
|
* @brief STM32F031x4/STM32F031x6 devices vector table for Atollic TrueSTUDIO toolchain.
|
||||||
|
* This module performs:
|
||||||
|
* - Set the initial SP
|
||||||
|
* - Set the initial PC == Reset_Handler,
|
||||||
|
* - Set the vector table entries with the exceptions ISR address
|
||||||
|
* - Branches to main in the C library (which eventually
|
||||||
|
* calls main()).
|
||||||
|
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||||
|
* priority is Privileged, and the Stack is set to Main.
|
||||||
|
******************************************************************************
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.cpu cortex-m0
|
||||||
|
.fpu softvfp
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.global g_pfnVectors
|
||||||
|
.global Default_Handler
|
||||||
|
|
||||||
|
/* start address for the initialization values of the .data section.
|
||||||
|
defined in linker script */
|
||||||
|
.word _sidata
|
||||||
|
/* start address for the .data section. defined in linker script */
|
||||||
|
.word _sdata
|
||||||
|
/* end address for the .data section. defined in linker script */
|
||||||
|
.word _edata
|
||||||
|
/* start address for the .bss section. defined in linker script */
|
||||||
|
.word _sbss
|
||||||
|
/* end address for the .bss section. defined in linker script */
|
||||||
|
.word _ebss
|
||||||
|
|
||||||
|
.section .text.Reset_Handler
|
||||||
|
.weak Reset_Handler
|
||||||
|
.type Reset_Handler, %function
|
||||||
|
Reset_Handler:
|
||||||
|
ldr r0, =_estack
|
||||||
|
mov sp, r0 /* set stack pointer */
|
||||||
|
|
||||||
|
/* Copy the data segment initializers from flash to SRAM */
|
||||||
|
movs r1, #0
|
||||||
|
b LoopCopyDataInit
|
||||||
|
|
||||||
|
CopyDataInit:
|
||||||
|
ldr r3, =_sidata
|
||||||
|
ldr r3, [r3, r1]
|
||||||
|
str r3, [r0, r1]
|
||||||
|
adds r1, r1, #4
|
||||||
|
|
||||||
|
LoopCopyDataInit:
|
||||||
|
ldr r0, =_sdata
|
||||||
|
ldr r3, =_edata
|
||||||
|
adds r2, r0, r1
|
||||||
|
cmp r2, r3
|
||||||
|
bcc CopyDataInit
|
||||||
|
ldr r2, =_sbss
|
||||||
|
b LoopFillZerobss
|
||||||
|
/* Zero fill the bss segment. */
|
||||||
|
FillZerobss:
|
||||||
|
movs r3, #0
|
||||||
|
str r3, [r2]
|
||||||
|
adds r2, r2, #4
|
||||||
|
|
||||||
|
|
||||||
|
LoopFillZerobss:
|
||||||
|
ldr r3, = _ebss
|
||||||
|
cmp r2, r3
|
||||||
|
bcc FillZerobss
|
||||||
|
|
||||||
|
/* Call the clock system intitialization function.*/
|
||||||
|
bl SystemInit
|
||||||
|
/* Call static constructors */
|
||||||
|
bl __libc_init_array
|
||||||
|
/* Call the application's entry point.*/
|
||||||
|
// bl main
|
||||||
|
bl _start
|
||||||
|
|
||||||
|
LoopForever:
|
||||||
|
b LoopForever
|
||||||
|
|
||||||
|
|
||||||
|
.size Reset_Handler, .-Reset_Handler
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor receives an
|
||||||
|
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||||
|
* the system state for examination by a debugger.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
.section .text.Default_Handler,"ax",%progbits
|
||||||
|
Default_Handler:
|
||||||
|
Infinite_Loop:
|
||||||
|
b Infinite_Loop
|
||||||
|
.size Default_Handler, .-Default_Handler
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||||
|
* must be placed on this to ensure that it ends up at physical address
|
||||||
|
* 0x0000.0000.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
.section .isr_vector,"a",%progbits
|
||||||
|
.type g_pfnVectors, %object
|
||||||
|
.size g_pfnVectors, .-g_pfnVectors
|
||||||
|
|
||||||
|
|
||||||
|
g_pfnVectors:
|
||||||
|
.word _estack
|
||||||
|
.word Reset_Handler
|
||||||
|
.word NMI_Handler
|
||||||
|
.word HardFault_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SVC_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word PendSV_Handler
|
||||||
|
.word SysTick_Handler
|
||||||
|
.word WWDG_IRQHandler /* Window WatchDog */
|
||||||
|
.word PVD_IRQHandler /* PVD through EXTI Line detect */
|
||||||
|
.word RTC_IRQHandler /* RTC through the EXTI line */
|
||||||
|
.word FLASH_IRQHandler /* FLASH */
|
||||||
|
.word RCC_IRQHandler /* RCC */
|
||||||
|
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
|
||||||
|
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
|
||||||
|
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
||||||
|
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
|
||||||
|
.word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
|
||||||
|
.word ADC1_IRQHandler /* ADC1 */
|
||||||
|
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
|
||||||
|
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||||
|
.word TIM2_IRQHandler /* TIM2 */
|
||||||
|
.word TIM3_IRQHandler /* TIM3 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word TIM14_IRQHandler /* TIM14 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word TIM16_IRQHandler /* TIM16 */
|
||||||
|
.word TIM17_IRQHandler /* TIM17 */
|
||||||
|
.word I2C1_IRQHandler /* I2C1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word SPI1_IRQHandler /* SPI1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word USART1_IRQHandler /* USART1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
*
|
||||||
|
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||||
|
* As they are weak aliases, any function with the same name will override
|
||||||
|
* this definition.
|
||||||
|
*
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
.weak NMI_Handler
|
||||||
|
.thumb_set NMI_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak HardFault_Handler
|
||||||
|
.thumb_set HardFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SVC_Handler
|
||||||
|
.thumb_set SVC_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak PendSV_Handler
|
||||||
|
.thumb_set PendSV_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SysTick_Handler
|
||||||
|
.thumb_set SysTick_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak WWDG_IRQHandler
|
||||||
|
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak PVD_IRQHandler
|
||||||
|
.thumb_set PVD_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_IRQHandler
|
||||||
|
.thumb_set RTC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FLASH_IRQHandler
|
||||||
|
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RCC_IRQHandler
|
||||||
|
.thumb_set RCC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI0_1_IRQHandler
|
||||||
|
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI2_3_IRQHandler
|
||||||
|
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI4_15_IRQHandler
|
||||||
|
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel1_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel2_3_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel4_5_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak ADC1_IRQHandler
|
||||||
|
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||||
|
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_CC_IRQHandler
|
||||||
|
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM2_IRQHandler
|
||||||
|
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM3_IRQHandler
|
||||||
|
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM14_IRQHandler
|
||||||
|
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM16_IRQHandler
|
||||||
|
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM17_IRQHandler
|
||||||
|
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_IRQHandler
|
||||||
|
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI1_IRQHandler
|
||||||
|
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART1_IRQHandler
|
||||||
|
.thumb_set USART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
|
|
@ -0,0 +1,272 @@
|
||||||
|
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||||
|
;* File Name : startup_stm32f031x6.s
|
||||||
|
;* Author : MCD Application Team
|
||||||
|
;* Version : V2.2.2
|
||||||
|
;* Date : 26-June-2015
|
||||||
|
;* Description : STM32F031x4/STM32F031x6 devices vector table for EWARM toolchain.
|
||||||
|
;* This module performs:
|
||||||
|
;* - Set the initial SP
|
||||||
|
;* - Set the initial PC == __iar_program_start,
|
||||||
|
;* - Set the vector table entries with the exceptions ISR
|
||||||
|
;* address,
|
||||||
|
;* - Branches to main in the C library (which eventually
|
||||||
|
;* calls main()).
|
||||||
|
;* After Reset the Cortex-M0 processor is in Thread mode,
|
||||||
|
;* priority is Privileged, and the Stack is set to Main.
|
||||||
|
;*******************************************************************************
|
||||||
|
;*
|
||||||
|
;* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||||
|
;*
|
||||||
|
;* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
;* are permitted provided that the following conditions are met:
|
||||||
|
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer.
|
||||||
|
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer in the documentation
|
||||||
|
;* and/or other materials provided with the distribution.
|
||||||
|
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
;* may be used to endorse or promote products derived from this software
|
||||||
|
;* without specific prior written permission.
|
||||||
|
;*
|
||||||
|
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;*
|
||||||
|
;*******************************************************************************
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; The modules in this file are included in the libraries, and may be replaced
|
||||||
|
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||||
|
; a user defined start symbol.
|
||||||
|
; To override the cstartup defined in the library, simply add your modified
|
||||||
|
; version to the workbench project.
|
||||||
|
;
|
||||||
|
; The vector table is normally located at address 0.
|
||||||
|
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||||
|
; The name "__vector_table" has special meaning for C-SPY:
|
||||||
|
; it is where the SP start value is found, and the NVIC vector
|
||||||
|
; table register (VTOR) is initialized to this address if != 0.
|
||||||
|
;
|
||||||
|
; Cortex-M version
|
||||||
|
;
|
||||||
|
|
||||||
|
MODULE ?cstartup
|
||||||
|
|
||||||
|
;; Forward declaration of sections.
|
||||||
|
SECTION CSTACK:DATA:NOROOT(3)
|
||||||
|
|
||||||
|
SECTION .intvec:CODE:NOROOT(2)
|
||||||
|
|
||||||
|
EXTERN __iar_program_start
|
||||||
|
EXTERN SystemInit
|
||||||
|
PUBLIC __vector_table
|
||||||
|
|
||||||
|
DATA
|
||||||
|
__vector_table
|
||||||
|
DCD sfe(CSTACK)
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WWDG_IRQHandler ; Window Watchdog
|
||||||
|
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||||
|
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||||
|
DCD FLASH_IRQHandler ; FLASH
|
||||||
|
DCD RCC_IRQHandler ; RCC
|
||||||
|
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||||
|
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||||
|
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||||
|
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||||
|
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
|
||||||
|
DCD ADC1_IRQHandler ; ADC1
|
||||||
|
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
|
||||||
|
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||||
|
DCD TIM2_IRQHandler ; TIM2
|
||||||
|
DCD TIM3_IRQHandler ; TIM3
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM14_IRQHandler ; TIM14
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM16_IRQHandler ; TIM16
|
||||||
|
DCD TIM17_IRQHandler ; TIM17
|
||||||
|
DCD I2C1_IRQHandler ; I2C1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SPI1_IRQHandler ; SPI1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD USART1_IRQHandler ; USART1
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
;;
|
||||||
|
;; Default interrupt handlers.
|
||||||
|
;;
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
PUBWEAK Reset_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||||
|
Reset_Handler
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__iar_program_start
|
||||||
|
BX R0
|
||||||
|
|
||||||
|
PUBWEAK NMI_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
NMI_Handler
|
||||||
|
B NMI_Handler
|
||||||
|
|
||||||
|
PUBWEAK HardFault_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
HardFault_Handler
|
||||||
|
B HardFault_Handler
|
||||||
|
|
||||||
|
PUBWEAK SVC_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
SVC_Handler
|
||||||
|
B SVC_Handler
|
||||||
|
|
||||||
|
PUBWEAK PendSV_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
PendSV_Handler
|
||||||
|
B PendSV_Handler
|
||||||
|
|
||||||
|
PUBWEAK SysTick_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
SysTick_Handler
|
||||||
|
B SysTick_Handler
|
||||||
|
|
||||||
|
PUBWEAK WWDG_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
WWDG_IRQHandler
|
||||||
|
B WWDG_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK PVD_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
PVD_IRQHandler
|
||||||
|
B PVD_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK RTC_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
RTC_IRQHandler
|
||||||
|
B RTC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK FLASH_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
FLASH_IRQHandler
|
||||||
|
B FLASH_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK RCC_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
RCC_IRQHandler
|
||||||
|
B RCC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK EXTI0_1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
EXTI0_1_IRQHandler
|
||||||
|
B EXTI0_1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK EXTI2_3_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
EXTI2_3_IRQHandler
|
||||||
|
B EXTI2_3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK EXTI4_15_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
EXTI4_15_IRQHandler
|
||||||
|
B EXTI4_15_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Channel1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
DMA1_Channel1_IRQHandler
|
||||||
|
B DMA1_Channel1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Channel2_3_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
DMA1_Channel2_3_IRQHandler
|
||||||
|
B DMA1_Channel2_3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Channel4_5_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
DMA1_Channel4_5_IRQHandler
|
||||||
|
B DMA1_Channel4_5_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK ADC1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
ADC1_IRQHandler
|
||||||
|
B ADC1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||||
|
B TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM1_CC_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM1_CC_IRQHandler
|
||||||
|
B TIM1_CC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM2_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM2_IRQHandler
|
||||||
|
B TIM2_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM3_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM3_IRQHandler
|
||||||
|
B TIM3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM14_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM14_IRQHandler
|
||||||
|
B TIM14_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM16_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM16_IRQHandler
|
||||||
|
B TIM16_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM17_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM17_IRQHandler
|
||||||
|
B TIM17_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
I2C1_IRQHandler
|
||||||
|
B I2C1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK SPI1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
SPI1_IRQHandler
|
||||||
|
B SPI1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK USART1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
USART1_IRQHandler
|
||||||
|
B USART1_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
END
|
||||||
|
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||||
|
|
@ -0,0 +1,33 @@
|
||||||
|
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||||
|
/*-Editor annotation file-*/
|
||||||
|
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||||
|
/*-Specials-*/
|
||||||
|
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||||
|
/*-Memory Regions-*/
|
||||||
|
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||||
|
define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
|
||||||
|
define symbol __ICFEDIT_region_RAM_start__ = 0x200000B0;
|
||||||
|
define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF;
|
||||||
|
/*-Sizes-*/
|
||||||
|
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||||
|
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||||
|
/**** End of ICF editor section. ###ICF###*/
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||||
|
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||||
|
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
|
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||||
|
|
||||||
|
place in ROM_region { readonly };
|
||||||
|
place in RAM_region { readwrite,
|
||||||
|
block CSTACK, block HEAP };
|
||||||
|
|
||||||
|
export symbol __ICFEDIT_region_RAM_start__;
|
||||||
|
export symbol __ICFEDIT_region_RAM_end__;
|
||||||
|
|
@ -0,0 +1,38 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* A generic CMSIS include header
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2015, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_CMSIS_H
|
||||||
|
#define MBED_CMSIS_H
|
||||||
|
|
||||||
|
#include "stm32f0xx.h"
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,61 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* CMSIS-style functionality to support dynamic vectors
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2015, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
||||||
|
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
|
||||||
|
|
||||||
|
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||||
|
int i;
|
||||||
|
// To keep track that the vectors remap is done
|
||||||
|
static volatile uint32_t vtor_remap = 0;
|
||||||
|
// Space for dynamic vectors, initialised to allocate in R/W
|
||||||
|
static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
|
||||||
|
|
||||||
|
// Copy and switch to dynamic vectors if first time called
|
||||||
|
if (vtor_remap == 0) {
|
||||||
|
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
|
||||||
|
for (i = 0; i < NVIC_NUM_VECTORS; i++) {
|
||||||
|
vectors[i] = old_vectors[i];
|
||||||
|
}
|
||||||
|
SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
|
||||||
|
vtor_remap = 1; // The vectors remap is done
|
||||||
|
}
|
||||||
|
|
||||||
|
// Set the vector
|
||||||
|
vectors[IRQn + 16] = vector;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||||
|
uint32_t *vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
|
||||||
|
// Return the vector
|
||||||
|
return vectors[IRQn + 16];
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* CMSIS-style functionality to support dynamic vectors
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2015, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
|
// STM32F031K6
|
||||||
|
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
||||||
|
// MCU Peripherals: 28 vectors = 112 bytes from 0x40 to 0xAF
|
||||||
|
// Total: 44 vectors = 176 bytes (0xB0) to be reserved in RAM
|
||||||
|
#define NVIC_NUM_VECTORS 44
|
||||||
|
#define NVIC_USER_IRQ_OFFSET 16
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
|
||||||
|
uint32_t NVIC_GetVector(IRQn_Type IRQn);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,122 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file hal_tick.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Initialization of HAL tick
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "hal_tick.h"
|
||||||
|
|
||||||
|
TIM_HandleTypeDef TimMasterHandle;
|
||||||
|
uint32_t PreviousVal = 0;
|
||||||
|
|
||||||
|
void us_ticker_irq_handler(void);
|
||||||
|
|
||||||
|
void timer_irq_handler(void) {
|
||||||
|
// Channel 1 for mbed timeout
|
||||||
|
if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC1) == SET) {
|
||||||
|
us_ticker_irq_handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Channel 2 for HAL tick
|
||||||
|
if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC2) == SET) {
|
||||||
|
__HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||||
|
uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||||
|
if ((val - PreviousVal) >= HAL_TICK_DELAY) {
|
||||||
|
// Increment HAL variable
|
||||||
|
HAL_IncTick();
|
||||||
|
// Prepare next interrupt
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
|
||||||
|
PreviousVal = val;
|
||||||
|
#if 0 // For DEBUG only
|
||||||
|
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Reconfigure the HAL tick using a standard timer instead of systick.
|
||||||
|
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
|
||||||
|
// Enable timer clock
|
||||||
|
TIM_MST_RCC;
|
||||||
|
|
||||||
|
// Reset timer
|
||||||
|
TIM_MST_RESET_ON;
|
||||||
|
TIM_MST_RESET_OFF;
|
||||||
|
|
||||||
|
// Update the SystemCoreClock variable
|
||||||
|
SystemCoreClockUpdate();
|
||||||
|
|
||||||
|
// Configure time base
|
||||||
|
TimMasterHandle.Instance = TIM_MST;
|
||||||
|
TimMasterHandle.Init.Period = 0xFFFFFFFF;
|
||||||
|
TimMasterHandle.Init.Prescaler = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
|
||||||
|
TimMasterHandle.Init.ClockDivision = 0;
|
||||||
|
TimMasterHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
TimMasterHandle.Init.RepetitionCounter = 0;
|
||||||
|
HAL_TIM_OC_Init(&TimMasterHandle);
|
||||||
|
|
||||||
|
NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
|
||||||
|
NVIC_EnableIRQ(TIM_MST_IRQ);
|
||||||
|
|
||||||
|
// Channel 1 for mbed timeout
|
||||||
|
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
|
||||||
|
|
||||||
|
// Channel 2 for HAL tick
|
||||||
|
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
|
||||||
|
PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
|
||||||
|
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||||
|
|
||||||
|
#if 0 // For DEBUG only
|
||||||
|
__GPIOB_CLK_ENABLE();
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct;
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,60 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file hal_tick.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Initialization of HAL tick
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef __HAL_TICK_H
|
||||||
|
#define __HAL_TICK_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "stm32f0xx.h"
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#define TIM_MST TIM2
|
||||||
|
#define TIM_MST_IRQ TIM2_IRQn
|
||||||
|
#define TIM_MST_RCC __TIM2_CLK_ENABLE()
|
||||||
|
|
||||||
|
#define TIM_MST_RESET_ON __TIM2_FORCE_RESET()
|
||||||
|
#define TIM_MST_RESET_OFF __TIM2_RELEASE_RESET()
|
||||||
|
|
||||||
|
#define HAL_TICK_DELAY (1000) // 1 ms
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HAL_TICK_H
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,244 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f0xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.2.2
|
||||||
|
* @date 26-June-2015
|
||||||
|
* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
|
||||||
|
*
|
||||||
|
* The file is the unique include file that the application programmer
|
||||||
|
* is using in the C source code, usually in main.c. This file contains:
|
||||||
|
* - Configuration section that allows to select:
|
||||||
|
* - The STM32F0xx device used in the target application
|
||||||
|
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||||
|
* code will be based on direct access to peripheral’s registers
|
||||||
|
* rather than drivers API), this option is controlled by
|
||||||
|
* "#define USE_HAL_DRIVER"
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f0xx
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __STM32F0xx_H
|
||||||
|
#define __STM32F0xx_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
/** @addtogroup Library_configuration_section
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32 Family
|
||||||
|
*/
|
||||||
|
#if !defined (STM32F0)
|
||||||
|
#define STM32F0
|
||||||
|
#endif /* STM32F0 */
|
||||||
|
|
||||||
|
/* Uncomment the line below according to the target STM32 device used in your
|
||||||
|
application
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined (STM32F030x6) && !defined (STM32F030x8) && \
|
||||||
|
!defined (STM32F031x6) && !defined (STM32F038xx) && \
|
||||||
|
!defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
|
||||||
|
!defined (STM32F051x8) && !defined (STM32F058xx) && \
|
||||||
|
!defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
|
||||||
|
!defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
|
||||||
|
/* #define STM32F030x6 */ /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
|
||||||
|
/* #define STM32F030x8 */ /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes) */
|
||||||
|
#define STM32F031x6 /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
|
||||||
|
/* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */
|
||||||
|
/* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
|
||||||
|
/* #define STM32F048x6 */ /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes) */
|
||||||
|
/* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
|
||||||
|
/* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */
|
||||||
|
/* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
|
||||||
|
/* #define STM32F070xB */ /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
|
||||||
|
/* #define STM32F071xB */ /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
|
||||||
|
/* #define STM32F072xB */ /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes) */
|
||||||
|
/* #define STM32F078xx */ /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes) */
|
||||||
|
/* #define STM32F030xC */ /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes) */
|
||||||
|
/* #define STM32F091xC */ /*!< STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory is 256 Kbytes) */
|
||||||
|
/* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||||
|
devices, you can define the device in your toolchain compiler preprocessor.
|
||||||
|
*/
|
||||||
|
#if !defined (USE_HAL_DRIVER)
|
||||||
|
/**
|
||||||
|
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||||
|
In this case, these drivers will not be included and the application code will
|
||||||
|
be based on direct access to peripherals registers
|
||||||
|
*/
|
||||||
|
#define USE_HAL_DRIVER
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CMSIS Device version number V2.2.2
|
||||||
|
*/
|
||||||
|
#define __STM32F0xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
|
||||||
|
#define __STM32F0xx_CMSIS_DEVICE_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
|
||||||
|
#define __STM32F0xx_CMSIS_DEVICE_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
|
||||||
|
#define __STM32F0xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||||
|
#define __STM32F0xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||||
|
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||||
|
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||||
|
|(__CMSIS_DEVICE_HAL_VERSION_RC))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Device_Included
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "stm32f072xb.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
RESET = 0,
|
||||||
|
SET = !RESET
|
||||||
|
} FlagStatus, ITStatus;
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DISABLE = 0,
|
||||||
|
ENABLE = !DISABLE
|
||||||
|
} FunctionalState;
|
||||||
|
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
ERROR = 0,
|
||||||
|
SUCCESS = !ERROR
|
||||||
|
} ErrorStatus;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup Exported_macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||||
|
|
||||||
|
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||||
|
|
||||||
|
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||||
|
|
||||||
|
#define READ_REG(REG) ((REG))
|
||||||
|
|
||||||
|
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (USE_HAL_DRIVER)
|
||||||
|
#include "stm32f0xx_hal.h"
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
#endif /* __STM32F0xx_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,454 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f0xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.2.2
|
||||||
|
* @date 26-June-2015
|
||||||
|
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
|
||||||
|
*
|
||||||
|
* 1. This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32f0xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||||
|
* Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
|
||||||
|
* configure the system clock before to branch to main program.
|
||||||
|
*
|
||||||
|
* 3. This file configures the system clock as follows:
|
||||||
|
*=============================================================================
|
||||||
|
* System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
|
||||||
|
* | (external 8 MHz clock) | (internal 48 MHz)
|
||||||
|
* | 2- PLL_HSE_XTAL |
|
||||||
|
* | (external 8 MHz xtal) |
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(MHz) | 48 | 48
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* AHBCLK (MHz) | 48 | 48
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB1CLK (MHz) | 48 | 48
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* USB capable (48 MHz precise clock) | YES | YES
|
||||||
|
*=============================================================================
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f0xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32f0xx.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
|
||||||
|
This value can be provided and adapted by the user application. */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
|
||||||
|
This value can be provided and adapted by the user application. */
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
|
||||||
|
#define USE_PLL_HSE_EXTC (1) /* Use external clock */
|
||||||
|
#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock there is no need to
|
||||||
|
call the 2 first functions listed above, since SystemCoreClock variable is
|
||||||
|
updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = 48000000;
|
||||||
|
|
||||||
|
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system.
|
||||||
|
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
/* Set HSION bit */
|
||||||
|
RCC->CR |= (uint32_t)0x00000001;
|
||||||
|
|
||||||
|
#if defined (STM32F051x8) || defined (STM32F058x8)
|
||||||
|
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
|
||||||
|
RCC->CFGR &= (uint32_t)0xF8FFB80C;
|
||||||
|
#else
|
||||||
|
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */
|
||||||
|
RCC->CFGR &= (uint32_t)0x08FFB80C;
|
||||||
|
#endif /* STM32F051x8 or STM32F058x8 */
|
||||||
|
|
||||||
|
/* Reset HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||||
|
|
||||||
|
/* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
|
||||||
|
RCC->CFGR &= (uint32_t)0xFFC0FFFF;
|
||||||
|
|
||||||
|
/* Reset PREDIV[3:0] bits */
|
||||||
|
RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
|
||||||
|
|
||||||
|
#if defined (STM32F072xB) || defined (STM32F078xx)
|
||||||
|
/* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFFCFE2C;
|
||||||
|
#elif defined (STM32F071xB)
|
||||||
|
/* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFFFCEAC;
|
||||||
|
#elif defined (STM32F091xC) || defined (STM32F098xx)
|
||||||
|
/* Reset USART3SW[1:0], USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFF0FEAC;
|
||||||
|
#elif defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6) || defined (STM32F038xx) || defined (STM32F030xC)
|
||||||
|
/* Reset USART1SW[1:0], I2C1SW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFFFFEEC;
|
||||||
|
#elif defined (STM32F051x8) || defined (STM32F058xx)
|
||||||
|
/* Reset USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;
|
||||||
|
#elif defined (STM32F042x6) || defined (STM32F048xx)
|
||||||
|
/* Reset USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFFFFE2C;
|
||||||
|
#elif defined (STM32F070x6) || defined (STM32F070xB)
|
||||||
|
/* Reset USART1SW[1:0], I2C1SW, USBSW and ADCSW bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFFFFFE6C;
|
||||||
|
/* Set default USB clock to PLLCLK, since there is no HSI48 */
|
||||||
|
RCC->CFGR3 |= (uint32_t)0x00000080;
|
||||||
|
#else
|
||||||
|
#warning "No target selected"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Reset HSI14 bit */
|
||||||
|
RCC->CR2 &= (uint32_t)0xFFFFFFFE;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIR = 0x00000000;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value
|
||||||
|
* 8 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value
|
||||||
|
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||||
|
* frequency of the crystal used. Otherwise, this function may
|
||||||
|
* have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate (void)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||||
|
|
||||||
|
switch (tmp)
|
||||||
|
{
|
||||||
|
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
|
||||||
|
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||||
|
pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||||
|
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||||
|
pllmull = ( pllmull >> 18) + 2;
|
||||||
|
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
|
||||||
|
|
||||||
|
if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
|
||||||
|
{
|
||||||
|
/* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
|
||||||
|
SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
|
||||||
|
}
|
||||||
|
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
|
||||||
|
else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
|
||||||
|
{
|
||||||
|
/* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
|
||||||
|
SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
|
||||||
|
}
|
||||||
|
#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */
|
||||||
|
else
|
||||||
|
{
|
||||||
|
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \
|
||||||
|
|| defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \
|
||||||
|
|| defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
|
||||||
|
/* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
|
||||||
|
SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
|
||||||
|
#else
|
||||||
|
/* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
|
||||||
|
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
|
||||||
|
#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
|
||||||
|
STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
|
||||||
|
STM32F091xC || STM32F098xx || STM32F030xC */
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default: /* HSI used as system clock */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Compute HCLK clock frequency ----------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
* @note This function should be called only once the RCC clock configuration
|
||||||
|
* is reset to the default reset state (done in SystemInit() function).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SetSysClock(void)
|
||||||
|
{
|
||||||
|
/* 1- Try to start with HSE and external clock */
|
||||||
|
#if USE_PLL_HSE_EXTC != 0
|
||||||
|
if (SetSysClock_PLL_HSE(1) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
/* 2- If fail try to start with HSE and external xtal */
|
||||||
|
#if USE_PLL_HSE_XTAL != 0
|
||||||
|
if (SetSysClock_PLL_HSE(0) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
/* 3- If fail start with HSI clock */
|
||||||
|
if (SetSysClock_PLL_HSI() == 0)
|
||||||
|
{
|
||||||
|
while(1)
|
||||||
|
{
|
||||||
|
// [TODO] Put something here to tell the user that a problem occured...
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Output clock on MCO pin(PA8) for debugging purpose
|
||||||
|
// HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_DIV1); // 48 MHz
|
||||||
|
}
|
||||||
|
|
||||||
|
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSE) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
//Select HSI as system clock source to allow modification of the PLL configuration
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
|
||||||
|
if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||||
|
{
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// Select HSE oscillator as PLL source
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
if (bypass == 0) {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
||||||
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN only
|
||||||
|
}
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// Select PLL as system clock source and configure the HCLK and PCLK1 clocks dividers
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 48 MHz
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 48 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 48 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV2); // 8/2 = 4 MHz
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSI) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
|
// Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12)
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2
|
||||||
|
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
|
||||||
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
// Select PLL as system clock source and configure the HCLK and PCLK1 clocks dividers
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 48 MHz
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 48 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 48 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSI, RCC_MCO_DIV4); // 8/4 = 2 MHz
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
|
|
@ -0,0 +1,123 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f0xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.2.2
|
||||||
|
* @date 26-June-2015
|
||||||
|
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f0xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32F0XX_H
|
||||||
|
#define __SYSTEM_STM32F0XX_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
3) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) by calling HAL API function HAL_RCC_ClockConfig()
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F0xx_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
extern void SetSysClock(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32F0XX_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,72 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2015, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PERIPHERALNAMES_H
|
||||||
|
#define MBED_PERIPHERALNAMES_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
ADC_1 = (int)ADC1_BASE
|
||||||
|
} ADCName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
UART_1 = (int)USART1_BASE
|
||||||
|
} UARTName;
|
||||||
|
|
||||||
|
#define STDIO_UART_TX PA_2
|
||||||
|
#define STDIO_UART_RX PA_15
|
||||||
|
#define STDIO_UART UART_1
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
SPI_1 = (int)SPI1_BASE
|
||||||
|
} SPIName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
I2C_1 = (int)I2C1_BASE
|
||||||
|
} I2CName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PWM_1 = (int)TIM1_BASE,
|
||||||
|
PWM_2 = (int)TIM2_BASE,
|
||||||
|
PWM_3 = (int)TIM3_BASE,
|
||||||
|
PWM_14 = (int)TIM14_BASE,
|
||||||
|
PWM_16 = (int)TIM16_BASE,
|
||||||
|
PWM_17 = (int)TIM17_BASE
|
||||||
|
} PWMName;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,142 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "PeripheralPins.h"
|
||||||
|
|
||||||
|
// =====
|
||||||
|
// Note: Commented lines are alternative possibilities which are not used per default.
|
||||||
|
// If you change them, you will have also to modify the corresponding xxx_api.c file
|
||||||
|
// for pwmout, analogin, analogout, ...
|
||||||
|
// =====
|
||||||
|
|
||||||
|
//*** ADC ***
|
||||||
|
|
||||||
|
const PinMap PinMap_ADC[] = {
|
||||||
|
{PA_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN0
|
||||||
|
{PA_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN1
|
||||||
|
{PA_2, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN2
|
||||||
|
{PA_3, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN3
|
||||||
|
{PA_4, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN4
|
||||||
|
{PA_5, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN5
|
||||||
|
{PA_6, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN6
|
||||||
|
{PA_7, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN7
|
||||||
|
{PB_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN8
|
||||||
|
{PB_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN9
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** I2C ***
|
||||||
|
|
||||||
|
const PinMap PinMap_I2C_SDA[] = {
|
||||||
|
{PA_10, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
|
||||||
|
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_I2C_SCL[] = {
|
||||||
|
{PA_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
|
||||||
|
{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** PWM ***
|
||||||
|
|
||||||
|
// TIM2 cannot be used because already used by the us_ticker
|
||||||
|
const PinMap PinMap_PWM[] = {
|
||||||
|
// {PA_1, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2)}, // TIM2_CH2
|
||||||
|
// {PA_2, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2)}, // TIM2_CH3
|
||||||
|
// {PA_3, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2)}, // TIM2_CH4
|
||||||
|
{PA_4, PWM_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM14)}, // TIM14_CH1
|
||||||
|
{PA_6, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM3)}, // TIM3_CH1
|
||||||
|
// {PA_6, PWM_16, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_TIM16)}, // TIM16_CH1
|
||||||
|
{PA_7, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM3)}, // TIM3_CH2
|
||||||
|
// {PA_7, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH1N
|
||||||
|
// {PA_7, PWM_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM14)}, // TIM14_CH1
|
||||||
|
// {PA_7, PWM_17, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_TIM17)}, // TIM17_CH1
|
||||||
|
{PA_8, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH1
|
||||||
|
{PA_9, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH2
|
||||||
|
{PA_10, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH3
|
||||||
|
{PA_11, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH4
|
||||||
|
{PB_0, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM3)}, // TIM3_CH3
|
||||||
|
// {PB_0, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH2N
|
||||||
|
// {PB_1, PWM_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_TIM14)}, // TIM14_CH1
|
||||||
|
{PB_1, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM3)}, // TIM3_CH4
|
||||||
|
// {PB_1, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM1)}, // TIM1_CH3N
|
||||||
|
// {PB_3, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM2)}, // TIM2_CH2
|
||||||
|
{PB_4, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM3)}, // TIM3_CH1
|
||||||
|
{PB_5, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM3)}, // TIM3_CH2
|
||||||
|
{PB_6, PWM_16, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM16)}, // TIM16_CH1N
|
||||||
|
{PB_7, PWM_17, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM17)}, // TIM17_CH1N
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** SERIAL ***
|
||||||
|
|
||||||
|
const PinMap PinMap_UART_TX[] = {
|
||||||
|
{PA_1, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||||
|
{PA_2, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, // STDIO TX
|
||||||
|
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||||
|
{PA_14, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||||
|
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_UART_RX[] = {
|
||||||
|
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
|
||||||
|
{PA_15, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, // STDIO RX
|
||||||
|
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** SPI ***
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_MOSI[] = {
|
||||||
|
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_MISO[] = {
|
||||||
|
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_SCLK[] = {
|
||||||
|
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_SSEL[] = {
|
||||||
|
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,156 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PINNAMES_H
|
||||||
|
#define MBED_PINNAMES_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// See stm32f0xx_hal_gpio.h and stm32f0xx_hal_gpio_ex.h for values of MODE, PUPD and AFNUM
|
||||||
|
#define STM_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((AFNUM) << 7) | ((PUPD) << 4) | ((MODE) << 0)))
|
||||||
|
#define STM_PIN_MODE(X) (((X) >> 0) & 0x0F)
|
||||||
|
#define STM_PIN_PUPD(X) (((X) >> 4) & 0x07)
|
||||||
|
#define STM_PIN_AFNUM(X) (((X) >> 7) & 0x0F)
|
||||||
|
#define STM_MODE_INPUT (0)
|
||||||
|
#define STM_MODE_OUTPUT_PP (1)
|
||||||
|
#define STM_MODE_OUTPUT_OD (2)
|
||||||
|
#define STM_MODE_AF_PP (3)
|
||||||
|
#define STM_MODE_AF_OD (4)
|
||||||
|
#define STM_MODE_ANALOG (5)
|
||||||
|
#define STM_MODE_IT_RISING (6)
|
||||||
|
#define STM_MODE_IT_FALLING (7)
|
||||||
|
#define STM_MODE_IT_RISING_FALLING (8)
|
||||||
|
#define STM_MODE_EVT_RISING (9)
|
||||||
|
#define STM_MODE_EVT_FALLING (10)
|
||||||
|
#define STM_MODE_EVT_RISING_FALLING (11)
|
||||||
|
#define STM_MODE_IT_EVT_RESET (12)
|
||||||
|
|
||||||
|
// High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
|
||||||
|
// Low nibble = pin number
|
||||||
|
#define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
|
||||||
|
#define STM_PIN(X) ((uint32_t)(X) & 0xF)
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PIN_INPUT,
|
||||||
|
PIN_OUTPUT
|
||||||
|
} PinDirection;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PA_0 = 0x00,
|
||||||
|
PA_1 = 0x01,
|
||||||
|
PA_2 = 0x02,
|
||||||
|
PA_3 = 0x03,
|
||||||
|
PA_4 = 0x04,
|
||||||
|
PA_5 = 0x05,
|
||||||
|
PA_6 = 0x06,
|
||||||
|
PA_7 = 0x07,
|
||||||
|
PA_8 = 0x08,
|
||||||
|
PA_9 = 0x09,
|
||||||
|
PA_10 = 0x0A,
|
||||||
|
PA_11 = 0x0B,
|
||||||
|
PA_12 = 0x0C,
|
||||||
|
PA_13 = 0x0D,
|
||||||
|
PA_14 = 0x0E,
|
||||||
|
PA_15 = 0x0F,
|
||||||
|
|
||||||
|
PB_0 = 0x10,
|
||||||
|
PB_1 = 0x11,
|
||||||
|
PB_3 = 0x13,
|
||||||
|
PB_4 = 0x14,
|
||||||
|
PB_5 = 0x15,
|
||||||
|
PB_6 = 0x16,
|
||||||
|
PB_7 = 0x17,
|
||||||
|
PB_8 = 0x18,
|
||||||
|
PB_9 = 0x19,
|
||||||
|
|
||||||
|
PF_0 = 0x50,
|
||||||
|
PF_1 = 0x51,
|
||||||
|
|
||||||
|
// Arduino connector namings
|
||||||
|
A0 = PA_0,
|
||||||
|
A1 = PA_1,
|
||||||
|
A2 = PA_3,
|
||||||
|
A3 = PA_4,
|
||||||
|
A4 = PA_5,
|
||||||
|
A5 = PA_6,
|
||||||
|
A6 = PA_7,
|
||||||
|
A7 = PA_2,
|
||||||
|
D0 = PA_10,
|
||||||
|
D1 = PA_9,
|
||||||
|
D2 = PA_12,
|
||||||
|
D3 = PB_0,
|
||||||
|
D4 = PB_7,
|
||||||
|
D5 = PB_6,
|
||||||
|
D6 = PB_1,
|
||||||
|
D7 = PF_0,
|
||||||
|
D8 = PF_1,
|
||||||
|
D9 = PA_8,
|
||||||
|
D10 = PA_11,
|
||||||
|
D11 = PB_5,
|
||||||
|
D12 = PB_4,
|
||||||
|
D13 = PB_3,
|
||||||
|
|
||||||
|
// Generic signals namings
|
||||||
|
LED1 = PB_3,
|
||||||
|
LED2 = PB_3,
|
||||||
|
LED3 = PB_3,
|
||||||
|
LED4 = PB_3,
|
||||||
|
SERIAL_TX = PA_2,
|
||||||
|
SERIAL_RX = PA_15,
|
||||||
|
USBTX = PA_2,
|
||||||
|
USBRX = PA_15,
|
||||||
|
I2C_SCL = PA_9,
|
||||||
|
I2C_SDA = PA_10,
|
||||||
|
SPI_MOSI = PB_5,
|
||||||
|
SPI_MISO = PB_4,
|
||||||
|
SPI_SCK = PB_3,
|
||||||
|
SPI_CS = PB_1,
|
||||||
|
PWM_OUT = PB_0,
|
||||||
|
|
||||||
|
// Not connected
|
||||||
|
NC = (int)0xFFFFFFFF
|
||||||
|
} PinName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PullNone = 0,
|
||||||
|
PullUp = 1,
|
||||||
|
PullDown = 2,
|
||||||
|
OpenDrain = 3,
|
||||||
|
PullDefault = PullNone
|
||||||
|
} PinMode;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,47 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PORTNAMES_H
|
||||||
|
#define MBED_PORTNAMES_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PortA = 0,
|
||||||
|
PortB = 1,
|
||||||
|
PortC = 2, /* used for compilation needs */
|
||||||
|
PortF = 5
|
||||||
|
} PortName;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,70 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2015, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_DEVICE_H
|
||||||
|
#define MBED_DEVICE_H
|
||||||
|
|
||||||
|
#define DEVICE_PORTIN 1
|
||||||
|
#define DEVICE_PORTOUT 1
|
||||||
|
#define DEVICE_PORTINOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_INTERRUPTIN 1
|
||||||
|
|
||||||
|
#define DEVICE_ANALOGIN 1
|
||||||
|
#define DEVICE_ANALOGOUT 0 // Not present on this device
|
||||||
|
|
||||||
|
#define DEVICE_SERIAL 1
|
||||||
|
|
||||||
|
#define DEVICE_I2C 1
|
||||||
|
#define DEVICE_I2CSLAVE 1
|
||||||
|
|
||||||
|
#define DEVICE_SPI 1
|
||||||
|
#define DEVICE_SPISLAVE 1
|
||||||
|
|
||||||
|
#define DEVICE_RTC 1
|
||||||
|
|
||||||
|
#define DEVICE_PWMOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_SLEEP 1
|
||||||
|
|
||||||
|
//=======================================
|
||||||
|
|
||||||
|
#define DEVICE_SEMIHOST 0
|
||||||
|
#define DEVICE_LOCALFILESYSTEM 0
|
||||||
|
#define DEVICE_ID_LENGTH 24
|
||||||
|
|
||||||
|
#define DEVICE_DEBUG_AWARENESS 0
|
||||||
|
|
||||||
|
#define DEVICE_STDIO_MESSAGES 1
|
||||||
|
|
||||||
|
#define DEVICE_ERROR_RED 0
|
||||||
|
|
||||||
|
#include "objects.h"
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,104 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2015, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_OBJECTS_H
|
||||||
|
#define MBED_OBJECTS_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "PortNames.h"
|
||||||
|
#include "PeripheralNames.h"
|
||||||
|
#include "PinNames.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
struct gpio_irq_s {
|
||||||
|
IRQn_Type irq_n;
|
||||||
|
uint32_t irq_index;
|
||||||
|
uint32_t event;
|
||||||
|
PinName pin;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct port_s {
|
||||||
|
PortName port;
|
||||||
|
uint32_t mask;
|
||||||
|
PinDirection direction;
|
||||||
|
__IO uint32_t *reg_in;
|
||||||
|
__IO uint32_t *reg_out;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct analogin_s {
|
||||||
|
ADCName adc;
|
||||||
|
PinName pin;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct serial_s {
|
||||||
|
UARTName uart;
|
||||||
|
int index; // Used by irq
|
||||||
|
uint32_t baudrate;
|
||||||
|
uint32_t databits;
|
||||||
|
uint32_t stopbits;
|
||||||
|
uint32_t parity;
|
||||||
|
PinName pin_tx;
|
||||||
|
PinName pin_rx;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct spi_s {
|
||||||
|
SPIName spi;
|
||||||
|
uint32_t bits;
|
||||||
|
uint32_t cpol;
|
||||||
|
uint32_t cpha;
|
||||||
|
uint32_t mode;
|
||||||
|
uint32_t nss;
|
||||||
|
uint32_t br_presc;
|
||||||
|
PinName pin_miso;
|
||||||
|
PinName pin_mosi;
|
||||||
|
PinName pin_sclk;
|
||||||
|
PinName pin_ssel;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct i2c_s {
|
||||||
|
I2CName i2c;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct pwmout_s {
|
||||||
|
PWMName pwm;
|
||||||
|
PinName pin;
|
||||||
|
uint32_t period;
|
||||||
|
uint32_t pulse;
|
||||||
|
};
|
||||||
|
|
||||||
|
#include "gpio_object.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,218 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>mbed NUCLEO_F031K6</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>48000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>1</RunSim>
|
||||||
|
<RunTarget>0</RunTarget>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>255</CpuCode>
|
||||||
|
<DllOpt>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> </SimDllArguments>
|
||||||
|
<SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
|
||||||
|
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> </TargetDllArguments>
|
||||||
|
<TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
|
||||||
|
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
|
||||||
|
</DllOpt>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>0</tRtrace>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<nTsel>13</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGTARM</Key>
|
||||||
|
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ARMDBGFLAGS</Key>
|
||||||
|
<Name></Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGUARM</Key>
|
||||||
|
<Name>(105=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||||
|
<Name>-U-O206 -O206 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F0xx_64.FLM -FS08000000 -FL010000 -FP0($$Device:STM32F030R8$Flash\STM32F0xx_64.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC1000 -FD20000000 -FF0STM32F0xx_64 -FL010000 -FS08000000 -FP0($$Device:STM32F030R8$Flash\STM32F0xx_64.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ULP2CM3</Key>
|
||||||
|
<Name>-U -O207 -S8 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32L1xx_256 -FS08000000 -FL040000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>CMSIS_AGDI</Key>
|
||||||
|
<Name>-X"MBED CMSIS-DAP" -UA000000001 -O462 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BC11477) -L00(0) -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P128_48MHZ -FS00 -FL020000</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>src</GroupName>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>1</FileNumber>
|
||||||
|
<FileType>0</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<Focus>0</Focus>
|
||||||
|
<ColumnNumber>0</ColumnNumber>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<TopLine>0</TopLine>
|
||||||
|
<CurrentLine>0</CurrentLine>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>main.cpp</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
|
|
@ -0,0 +1,438 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>mbed NUCLEO_F031K6</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>STM32F030R8</Device>
|
||||||
|
<Vendor>STMicroelectronics</Vendor>
|
||||||
|
<Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x2000) CPUTYPE("Cortex-M0") CLOCK(48000000) ELITTLE</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile></StartupFile>
|
||||||
|
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32F030R8$Flash\STM32F0xx_64.FLM))</FlashDriverDll>
|
||||||
|
<DeviceId>7309</DeviceId>
|
||||||
|
<RegisterFile>$$Device:STM32F030R8$Device\Include\stm32f0xx.h</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>$$Device:STM32F030R8$SVD\STM32F030.svd</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath></RegisterFilePath>
|
||||||
|
<DBRegisterFilePath></DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\build\</OutputDirectory>
|
||||||
|
<OutputName>{{name}}</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>0</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>1</BrowseInformation>
|
||||||
|
<ListingPath>.\build\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>1</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin -o build\{{name}}_NUCLEO_F031K6.bin build\{{name}}.axf</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> </SimDllArguments>
|
||||||
|
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> </TargetDllArguments>
|
||||||
|
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
<Simulator>
|
||||||
|
<UseSimulator>0</UseSimulator>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>1</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||||
|
</Simulator>
|
||||||
|
<Target>
|
||||||
|
<UseTarget>1</UseTarget>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>0</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<RestoreTracepoints>0</RestoreTracepoints>
|
||||||
|
</Target>
|
||||||
|
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||||
|
<TargetSelection>13</TargetSelection>
|
||||||
|
<SimDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
</SimDlls>
|
||||||
|
<TargetDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
|
||||||
|
</TargetDlls>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4103</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||||
|
<Flash3>"" ()</Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M0"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>0</RvdsVP>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>1</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x2000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x2000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>0</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>0</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls>{% for flag in flags %}{{flag}} {% endfor %}</MiscControls>
|
||||||
|
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x00000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x10000000</DataAddressRange>
|
||||||
|
<ScatterFile>{{scatter_file}}</ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc>
|
||||||
|
{% for file in object_files %}
|
||||||
|
{{file}}
|
||||||
|
{% endfor %}
|
||||||
|
</Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
{% for group,files in source_files %}
|
||||||
|
<Group>
|
||||||
|
<GroupName>{{group}}</GroupName>
|
||||||
|
<Files>
|
||||||
|
{% for file in files %}
|
||||||
|
<File>
|
||||||
|
<FileName>{{file.name}}</FileName>
|
||||||
|
<FileType>{{file.type}}</FileType>
|
||||||
|
<FilePath>{{file.path}}</FilePath>
|
||||||
|
<FileOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>2</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
</CommonProperty>
|
||||||
|
<FileArmAds/>
|
||||||
|
</FileOption>
|
||||||
|
</File>
|
||||||
|
{% endfor %}
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
{% endfor %}
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
</Project>
|
||||||
Loading…
Reference in New Issue