mirror of https://github.com/ARMmbed/mbed-os.git
Enable new HAL us_ticker API on fast model MPS2 platform
parent
74aec930e6
commit
ad668a74dd
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@ -270,7 +270,7 @@ typedef struct {
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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@ -306,7 +306,7 @@ typedef struct {
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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@ -329,12 +329,12 @@ typedef struct {
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typedef struct {
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typedef struct {
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
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__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
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__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
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__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
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__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
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__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
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__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
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__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
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__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
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__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
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@ -271,7 +271,7 @@ typedef struct {
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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@ -307,7 +307,7 @@ typedef struct {
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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@ -330,12 +330,12 @@ typedef struct {
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typedef struct {
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typedef struct {
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
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__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
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__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
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__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
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__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
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__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
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__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
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__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
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__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
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__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
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@ -272,7 +272,7 @@ typedef struct {
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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@ -308,7 +308,7 @@ typedef struct {
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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@ -331,12 +331,12 @@ typedef struct {
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typedef struct {
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typedef struct {
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
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__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
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__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
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__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
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__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
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__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
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__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
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__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
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__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
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__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
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typedef struct {
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typedef struct {
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
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__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
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__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
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__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
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__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
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/* <o.7> TimerEn: Timer Enable */
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/* <o.7> TimerEn: Timer Enable */
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/* <o.6> TimerMode: Timer Mode */
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/* <o.6> TimerMode: Timer Mode */
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/* <0=> Freerunning-mode */
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/* <0=> Freerunning-mode */
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/* <0=> Wrapping mode */
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/* <0=> Wrapping mode */
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/* <1=> One-shot mode */
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/* <1=> One-shot mode */
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/* </h> */
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/* </h> */
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__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
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__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
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__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
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__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
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__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
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__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
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__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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} CMSDK_DUALTIMER_SINGLE_TypeDef;
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /*!< CMSDK_DUALTIMER LOAD: LOAD Position */
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#define CMSDK_DUALTIMER_LOAD_Pos 0 /*!< CMSDK_DUALTIMER LOAD: LOAD Position */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
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||||||
|
|
||||||
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
|
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
|
||||||
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
|
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
|
||||||
|
|
||||||
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
|
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
|
||||||
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
|
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
|
||||||
|
@ -314,7 +314,7 @@ typedef struct {
|
||||||
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
|
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
|
||||||
|
|
||||||
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
|
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
|
||||||
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
|
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
|
||||||
|
|
||||||
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
|
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
|
||||||
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
|
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
|
||||||
|
@ -337,12 +337,12 @@ typedef struct {
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
|
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
|
||||||
__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
|
__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
|
||||||
__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
|
__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
|
||||||
__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
|
__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
|
||||||
__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
|
__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
|
||||||
__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
|
__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
|
||||||
__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
|
__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
|
||||||
} CMSDK_DUALTIMER_SINGLE_TypeDef;
|
} CMSDK_DUALTIMER_SINGLE_TypeDef;
|
||||||
|
|
||||||
#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
|
#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */
|
||||||
|
|
|
@ -16,43 +16,69 @@
|
||||||
#include <stddef.h>
|
#include <stddef.h>
|
||||||
#include "us_ticker_api.h"
|
#include "us_ticker_api.h"
|
||||||
#include "PeripheralNames.h"
|
#include "PeripheralNames.h"
|
||||||
|
|
||||||
#define US_TICKER_TIMER1 CMSDK_DUALTIMER1
|
#define US_TICKER_TIMER1 CMSDK_DUALTIMER1
|
||||||
#define US_TICKER_TIMER2 CMSDK_DUALTIMER2
|
#define US_TICKER_TIMER2 CMSDK_DUALTIMER2
|
||||||
#define US_TICKER_TIMER_IRQn DUALTIMER_IRQn
|
#define US_TICKER_TIMER_IRQn DUALTIMER_IRQn
|
||||||
|
|
||||||
|
/** mbed OS HAL API defined us_ticker as an increment ticker
|
||||||
|
* MPS2 platform provided in SSE-200 are decrement tickers
|
||||||
|
* with interrupt fired counter reaches 0.
|
||||||
|
*
|
||||||
|
* So 2 Timers are used to construct mbed OS HAL ticker.
|
||||||
|
* TIMER1 is for counting, and returns inverted binary when read from it
|
||||||
|
* TIMER2 is for generate interrupts
|
||||||
|
*/
|
||||||
int us_ticker_inited = 0;
|
int us_ticker_inited = 0;
|
||||||
|
|
||||||
void us_ticker_init(void)
|
void us_ticker_init(void)
|
||||||
{
|
{
|
||||||
if (us_ticker_inited) {
|
if (us_ticker_inited) {
|
||||||
|
us_ticker_disable_interrupt();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
us_ticker_inited = 1;
|
|
||||||
|
|
||||||
US_TICKER_TIMER1->TimerControl = 0x0; // disable timer
|
US_TICKER_TIMER1->TimerControl = 0x0ul; // disable TIMER1 and reset all control
|
||||||
US_TICKER_TIMER2->TimerControl = 0x00; // disable timer
|
US_TICKER_TIMER2->TimerControl = 0x0ul; // disable TIMER2 and reset all control
|
||||||
US_TICKER_TIMER1->TimerLoad = 0xFFFFFFFF;
|
|
||||||
US_TICKER_TIMER2->TimerLoad = 0xFFFFFFFF;
|
|
||||||
|
|
||||||
US_TICKER_TIMER1->TimerControl = 0x62; // enable interrupt and set to 32 bit counter and set to periodic mode
|
US_TICKER_TIMER1->TimerLoad = 0xFFFFFFFFul;
|
||||||
US_TICKER_TIMER2->TimerControl = 0x42; // enable interrupt and set to 32 bit counter
|
US_TICKER_TIMER2->TimerLoad = 0xFFFFFFFFul;
|
||||||
|
|
||||||
US_TICKER_TIMER1->TimerControl |= 0x80; // enable counter
|
US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_SIZE_Msk; // set TIMER1 to 32 bit counter
|
||||||
US_TICKER_TIMER2->TimerControl |= 0x80; // enable counter
|
US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_SIZE_Msk; // set TIMER2 to 32 bit counter
|
||||||
|
|
||||||
|
US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk; // set TIMER1 with 4 stages prescale
|
||||||
|
US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk; // set TIMER2 with 4 stages prescale
|
||||||
|
|
||||||
|
US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_MODE_Msk; // set TIMER2 periodic mode
|
||||||
|
|
||||||
|
US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_ONESHOOT_Msk; // set TIMER2 one-shot mode
|
||||||
|
|
||||||
|
US_TICKER_TIMER1->TimerControl |= CMSDK_DUALTIMER1_CTRL_EN_Msk; // enable TIMER1 counter
|
||||||
|
US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_EN_Msk; // enable TIMER2 counter
|
||||||
|
|
||||||
NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
|
NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
|
||||||
NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
|
NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
|
||||||
|
us_ticker_inited = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void us_ticker_free(void)
|
||||||
|
{
|
||||||
|
if (!us_ticker_inited) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
US_TICKER_TIMER1->TimerControl &= ~CMSDK_DUALTIMER1_CTRL_EN_Msk; // disable TIMER1
|
||||||
|
US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_EN_Msk; // disable TIMER2
|
||||||
|
us_ticker_inited = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t us_ticker_read()
|
uint32_t us_ticker_read()
|
||||||
{
|
{
|
||||||
uint32_t return_value = 0;
|
|
||||||
if (!us_ticker_inited) {
|
if (!us_ticker_inited) {
|
||||||
us_ticker_init();
|
us_ticker_init();
|
||||||
}
|
}
|
||||||
return_value = ((~US_TICKER_TIMER2->TimerValue) / 25);
|
|
||||||
return return_value;
|
return ~US_TICKER_TIMER1->TimerValue;
|
||||||
}
|
}
|
||||||
|
|
||||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||||
|
@ -62,11 +88,9 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t delta = timestamp - us_ticker_read();
|
uint32_t delta = timestamp - us_ticker_read();
|
||||||
// enable interrupt
|
US_TICKER_TIMER2->TimerLoad = delta; // Set TIMER2 load value
|
||||||
US_TICKER_TIMER1->TimerControl = 0x0; // disable timer
|
US_TICKER_TIMER2->TimerControl |= CMSDK_DUALTIMER2_CTRL_INTEN_Msk; // enable TIMER2 interrupt
|
||||||
US_TICKER_TIMER1->TimerControl = 0x62; // enable interrupt and set to 32 bit counter and set to periodic mode
|
|
||||||
US_TICKER_TIMER1->TimerLoad = (delta) * 25; //initialise the timer value
|
|
||||||
US_TICKER_TIMER1->TimerControl |= 0x80; //enable timer
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void us_ticker_fire_interrupt(void)
|
void us_ticker_fire_interrupt(void)
|
||||||
|
@ -77,16 +101,19 @@ void us_ticker_fire_interrupt(void)
|
||||||
|
|
||||||
void us_ticker_disable_interrupt(void)
|
void us_ticker_disable_interrupt(void)
|
||||||
{
|
{
|
||||||
|
US_TICKER_TIMER2->TimerControl &= ~CMSDK_DUALTIMER2_CTRL_INTEN_Msk;
|
||||||
US_TICKER_TIMER1->TimerControl &= 0xDF;
|
|
||||||
US_TICKER_TIMER2->TimerControl &= 0xDF;
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void us_ticker_clear_interrupt(void)
|
void us_ticker_clear_interrupt(void)
|
||||||
{
|
{
|
||||||
|
US_TICKER_TIMER2->TimerIntClr = CMSDK_DUALTIMER2_INTCLR_Msk;
|
||||||
US_TICKER_TIMER1->TimerIntClr = 0x1;
|
}
|
||||||
US_TICKER_TIMER2->TimerIntClr = 0x1;
|
|
||||||
|
const ticker_info_t *us_ticker_get_info(void)
|
||||||
|
{
|
||||||
|
static const ticker_info_t info = {
|
||||||
|
1562500, // 4 stages prescale from 25MHz (dived by 16)
|
||||||
|
32 // 32 bit counter
|
||||||
|
};
|
||||||
|
return &info;
|
||||||
}
|
}
|
||||||
|
|
|
@ -4128,7 +4128,7 @@
|
||||||
"public": false,
|
"public": false,
|
||||||
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
|
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
|
||||||
"OUTPUT_EXT": "elf",
|
"OUTPUT_EXT": "elf",
|
||||||
"device_has": ["AACI", "ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
|
"device_has": ["AACI", "ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC", "USTICKER"],
|
||||||
"release_versions": ["5"]
|
"release_versions": ["5"]
|
||||||
},
|
},
|
||||||
"FVP_MPS2_M0": {
|
"FVP_MPS2_M0": {
|
||||||
|
|
Loading…
Reference in New Issue