diff --git a/drivers/QSPI.cpp b/drivers/QSPI.cpp index 36cad333e1..e1d0abdd69 100644 --- a/drivers/QSPI.cpp +++ b/drivers/QSPI.cpp @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2006-2018 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -45,7 +45,8 @@ QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, Pin _initialized = false; //Go ahead init the device here with the default config - _initialize(); + bool success = _initialize(); + MBED_ASSERT(success); } qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width_t address_width, qspi_address_size_t address_size, qspi_bus_width_t alt_width, qspi_alt_size_t alt_size, qspi_bus_width_t data_width, int dummy_cycles) @@ -217,8 +218,10 @@ void QSPI::unlock() // Note: Private helper function to initialize qspi HAL bool QSPI::_initialize() { - if (_mode != 0 && _mode != 1) - return QSPI_STATUS_INVALID_PARAMETER; + if (_mode != 0 && _mode != 1) { + _initialized = false; + return _initialized; + } qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode ); if (QSPI_STATUS_OK == ret) { diff --git a/drivers/QSPI.h b/drivers/QSPI.h index ecf2d43e12..70fa88596e 100644 --- a/drivers/QSPI.h +++ b/drivers/QSPI.h @@ -1,5 +1,5 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2015 ARM Limited + * Copyright (c) 2006-2018 ARM Limited * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,7 +33,7 @@ namespace mbed { /** A QSPI Driver, used for communicating with QSPI slave devices * - * The default format is set to Quad-SPI(4-4-4), and a clock frequency of 1MHz + * The default format is set to Quad-SPI(1-1-1), and a clock frequency of 1MHz * Most QSPI devices will also require Chip Select which is indicated by ssel. * * @note Synchronization level: Thread safe @@ -45,7 +45,7 @@ namespace mbed { * #include "mbed.h" * * // hardware ssel (where applicable) - * QSPI qspi_device(p5, p6, p7, p8, p9, p10); // io0, io1, io2, io3, sclk, ssel + * QSPI qspi_device(QSPI_PIN_IO0, QSPI_PIN_IO1, QSPI_PIN_IO2, QSPI_PIN_IO3, QSPI_PIN_SCK, QSPI_PIN_CSN); // io0, io1, io2, io3, sclk, ssel * * * int main() { @@ -84,12 +84,12 @@ public: /** Configure the data transmission format * - * @param inst_width Bus width used by instruction phase(Valid values are 1,2,4) - * @param address_width Bus width used by address phase(Valid values are 1,2,4) - * @param address_size Size in bits used by address phase(Valid values are 8,16,24,32) - * @param alt_width Bus width used by alt phase(Valid values are 1,2,4) - * @param alt_size Size in bits used by alt phase(Valid values are 8,16,24,32) - * @param data_width Bus width used by data phase(Valid values are 1,2,4) + * @param inst_width Bus width used by instruction phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD) + * @param address_width Bus width used by address phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD) + * @param address_size Size in bits used by address phase(Valid values are QSPI_CFG_ADDR_SIZE_8, QSPI_CFG_ADDR_SIZE_16, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_ADDR_SIZE_32) + * @param alt_width Bus width used by alt phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD) + * @param alt_size Size in bits used by alt phase(Valid values are QSPI_CFG_ADDR_SIZE_8, QSPI_CFG_ADDR_SIZE_16, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_ADDR_SIZE_32) + * @param data_width Bus width used by data phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD) * @param dummy_cycles Number of dummy clock cycles to be used after alt phase * */ @@ -171,6 +171,7 @@ public: */ qspi_status_t command_transfer(unsigned int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length); +protected: /** Acquire exclusive access to this SPI bus */ virtual void lock(void);