mirror of https://github.com/ARMmbed/mbed-os.git
[TARGET_STM] IPV4 feature hal files factorisation
Same code was duplicated for all STM32 targetspull/2731/head
parent
5d1d8b4033
commit
acbc3e1e09
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@ -1,452 +0,0 @@
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#include "stm32f2xx_hal.h"
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#include "lwip/opt.h"
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#include "lwip/timers.h"
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#include "netif/etharp.h"
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#include "lwip/tcpip.h"
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#include <string.h>
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#include "cmsis_os.h"
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#include "mbed_interface.h"
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#define RECV_TASK_PRI (osPriorityHigh)
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#define PHY_TASK_PRI (osPriorityLow)
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#define PHY_TASK_WAIT (200)
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#define ETH_ARCH_PHY_ADDRESS (0x00)
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ETH_HandleTypeDef EthHandle;
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx DMA Descriptor */
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
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#if defined (__ICCARM__) /*!< IAR Compiler */
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#pragma data_alignment=4
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#endif
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__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
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static sys_sem_t rx_ready_sem; /* receive ready semaphore */
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static sys_mutex_t tx_lock_mutex;
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/* function */
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static void _eth_arch_rx_task(void *arg);
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static void _eth_arch_phy_task(void *arg);
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static err_t _eth_arch_netif_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr);
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static err_t _eth_arch_low_level_output(struct netif *netif, struct pbuf *p);
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static struct pbuf * _eth_arch_low_level_input(struct netif *netif);
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/**
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* Ethernet Rx Transfer completed callback
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*
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* @param heth: ETH handle
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* @retval None
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*/
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void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
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{
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sys_sem_signal(&rx_ready_sem);
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}
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/**
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* Ethernet IRQ Handler
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*
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* @param None
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* @retval None
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*/
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void ETH_IRQHandler(void)
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{
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HAL_ETH_IRQHandler(&EthHandle);
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}
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/**
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* In this function, the hardware should be initialized.
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* Called from eth_arch_enetif_init().
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*
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* @param netif the already initialized lwip network interface structure
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* for this ethernetif
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*/
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static void _eth_arch_low_level_init(struct netif *netif)
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{
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uint32_t regvalue = 0;
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HAL_StatusTypeDef hal_eth_init_status;
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/* Init ETH */
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uint8_t MACAddr[6];
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EthHandle.Instance = ETH;
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EthHandle.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
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EthHandle.Init.Speed = ETH_SPEED_100M;
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EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
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EthHandle.Init.PhyAddress = ETH_ARCH_PHY_ADDRESS;
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#if (MBED_MAC_ADDRESS_SUM != MBED_MAC_ADDR_INTERFACE)
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MACAddr[0] = MBED_MAC_ADDR_0;
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MACAddr[1] = MBED_MAC_ADDR_1;
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MACAddr[2] = MBED_MAC_ADDR_2;
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MACAddr[3] = MBED_MAC_ADDR_3;
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MACAddr[4] = MBED_MAC_ADDR_4;
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MACAddr[5] = MBED_MAC_ADDR_5;
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#else
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mbed_mac_address((char *)MACAddr);
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#endif
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EthHandle.Init.MACAddr = &MACAddr[0];
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EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
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EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
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EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
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hal_eth_init_status = HAL_ETH_Init(&EthHandle);
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/* Initialize Tx Descriptors list: Chain Mode */
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HAL_ETH_DMATxDescListInit(&EthHandle, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
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/* Initialize Rx Descriptors list: Chain Mode */
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HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
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#if LWIP_ARP || LWIP_ETHERNET
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/* set MAC hardware address length */
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netif->hwaddr_len = ETHARP_HWADDR_LEN;
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/* set MAC hardware address */
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netif->hwaddr[0] = EthHandle.Init.MACAddr[0];
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netif->hwaddr[1] = EthHandle.Init.MACAddr[1];
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netif->hwaddr[2] = EthHandle.Init.MACAddr[2];
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netif->hwaddr[3] = EthHandle.Init.MACAddr[3];
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netif->hwaddr[4] = EthHandle.Init.MACAddr[4];
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netif->hwaddr[5] = EthHandle.Init.MACAddr[5];
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/* maximum transfer unit */
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netif->mtu = 1500;
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/* device capabilities */
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/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
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netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
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/* Enable MAC and DMA transmission and reception */
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HAL_ETH_Start(&EthHandle);
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/**** Configure PHY to generate an interrupt when Eth Link state changes ****/
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/* Read Register Configuration */
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HAL_ETH_ReadPHYRegister(&EthHandle, PHY_MICR, ®value);
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regvalue |= (PHY_MICR_INT_EN | PHY_MICR_INT_OE);
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/* Enable Interrupts */
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HAL_ETH_WritePHYRegister(&EthHandle, PHY_MICR, regvalue);
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/* Read Register Configuration */
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HAL_ETH_ReadPHYRegister(&EthHandle, PHY_MISR, ®value);
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regvalue |= PHY_MISR_LINK_INT_EN;
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/* Enable Interrupt on change of link status */
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HAL_ETH_WritePHYRegister(&EthHandle, PHY_MISR, regvalue);
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#endif
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}
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/**
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* This function should do the actual transmission of the packet. The packet is
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* contained in the pbuf that is passed to the function. This pbuf
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* might be chained.
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*
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* @param netif the lwip network interface structure for this ethernetif
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* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
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* @return ERR_OK if the packet could be sent
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* an err_t value if the packet couldn't be sent
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*
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* @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
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* strange results. You might consider waiting for space in the DMA queue
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* to become availale since the stack doesn't retry to send a packet
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* dropped because of memory failure (except for the TCP timers).
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*/
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static err_t _eth_arch_low_level_output(struct netif *netif, struct pbuf *p)
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{
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err_t errval;
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struct pbuf *q;
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uint8_t *buffer = (uint8_t*)(EthHandle.TxDesc->Buffer1Addr);
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__IO ETH_DMADescTypeDef *DmaTxDesc;
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uint32_t framelength = 0;
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uint32_t bufferoffset = 0;
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uint32_t byteslefttocopy = 0;
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uint32_t payloadoffset = 0;
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DmaTxDesc = EthHandle.TxDesc;
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bufferoffset = 0;
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sys_mutex_lock(&tx_lock_mutex);
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/* copy frame from pbufs to driver buffers */
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for (q = p; q != NULL; q = q->next) {
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/* Is this buffer available? If not, goto error */
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if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
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errval = ERR_USE;
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goto error;
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}
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/* Get bytes in current lwIP buffer */
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byteslefttocopy = q->len;
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payloadoffset = 0;
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/* Check if the length of data to copy is bigger than Tx buffer size*/
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while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE) {
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/* Copy data to Tx buffer*/
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memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
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/* Point to next descriptor */
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DmaTxDesc = (ETH_DMADescTypeDef*)(DmaTxDesc->Buffer2NextDescAddr);
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/* Check if the buffer is available */
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if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
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errval = ERR_USE;
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goto error;
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}
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buffer = (uint8_t*)(DmaTxDesc->Buffer1Addr);
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byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
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payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
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framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
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bufferoffset = 0;
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}
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/* Copy the remaining bytes */
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memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy);
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bufferoffset = bufferoffset + byteslefttocopy;
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framelength = framelength + byteslefttocopy;
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}
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/* Prepare transmit descriptors to give to DMA */
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HAL_ETH_TransmitFrame(&EthHandle, framelength);
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errval = ERR_OK;
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error:
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/* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
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if ((EthHandle.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET) {
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/* Clear TUS ETHERNET DMA flag */
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EthHandle.Instance->DMASR = ETH_DMASR_TUS;
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/* Resume DMA transmission*/
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EthHandle.Instance->DMATPDR = 0;
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}
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sys_mutex_unlock(&tx_lock_mutex);
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return errval;
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}
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/**
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* Should allocate a pbuf and transfer the bytes of the incoming
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* packet from the interface into the pbuf.
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*
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* @param netif the lwip network interface structure for this ethernetif
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* @return a pbuf filled with the received packet (including MAC header)
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* NULL on memory error
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*/
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static struct pbuf * _eth_arch_low_level_input(struct netif *netif)
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{
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struct pbuf *p = NULL;
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struct pbuf *q;
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uint16_t len = 0;
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uint8_t *buffer;
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__IO ETH_DMADescTypeDef *dmarxdesc;
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uint32_t bufferoffset = 0;
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uint32_t payloadoffset = 0;
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uint32_t byteslefttocopy = 0;
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uint32_t i = 0;
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/* get received frame */
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if (HAL_ETH_GetReceivedFrame(&EthHandle) != HAL_OK)
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return NULL;
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/* Obtain the size of the packet and put it into the "len" variable. */
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len = EthHandle.RxFrameInfos.length;
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buffer = (uint8_t*)EthHandle.RxFrameInfos.buffer;
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if (len > 0) {
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/* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
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p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
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}
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if (p != NULL) {
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dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
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bufferoffset = 0;
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for (q = p; q != NULL; q = q->next) {
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byteslefttocopy = q->len;
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payloadoffset = 0;
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/* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
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while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE) {
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/* Copy data to pbuf */
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memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
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/* Point to next descriptor */
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dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
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buffer = (uint8_t*)(dmarxdesc->Buffer1Addr);
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byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
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payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
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bufferoffset = 0;
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}
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/* Copy remaining data in pbuf */
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memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
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bufferoffset = bufferoffset + byteslefttocopy;
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}
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/* Release descriptors to DMA */
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/* Point to first descriptor */
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dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
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/* Set Own bit in Rx descriptors: gives the buffers back to DMA */
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for (i = 0; i < EthHandle.RxFrameInfos.SegCount; i++) {
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dmarxdesc->Status |= ETH_DMARXDESC_OWN;
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dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
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}
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/* Clear Segment_Count */
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EthHandle.RxFrameInfos.SegCount = 0;
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}
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/* When Rx Buffer unavailable flag is set: clear it and resume reception */
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if ((EthHandle.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) {
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/* Clear RBUS ETHERNET DMA flag */
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EthHandle.Instance->DMASR = ETH_DMASR_RBUS;
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/* Resume DMA reception */
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EthHandle.Instance->DMARPDR = 0;
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}
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return p;
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}
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/**
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* This task receives input data
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*
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* \param[in] netif the lwip network interface structure
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*/
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static void _eth_arch_rx_task(void *arg)
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{
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struct netif *netif = (struct netif*)arg;
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struct pbuf *p;
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while (1) {
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sys_arch_sem_wait(&rx_ready_sem, 0);
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p = _eth_arch_low_level_input(netif);
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if (p != NULL) {
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if (netif->input(p, netif) != ERR_OK) {
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pbuf_free(p);
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p = NULL;
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}
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}
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}
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}
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/**
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* This task checks phy link status and updates net status
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*
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* \param[in] netif the lwip network interface structure
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*/
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static void _eth_arch_phy_task(void *arg)
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{
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struct netif *netif = (struct netif*)arg;
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uint32_t phy_status = 0;
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while (1) {
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uint32_t status;
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if (HAL_ETH_ReadPHYRegister(&EthHandle, PHY_SR, &status) == HAL_OK) {
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if ((status & PHY_LINK_STATUS) && !(phy_status & PHY_LINK_STATUS)) {
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tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1);
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} else if (!(status & PHY_LINK_STATUS) && (phy_status & PHY_LINK_STATUS)) {
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tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1);
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}
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phy_status = status;
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}
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osDelay(PHY_TASK_WAIT);
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}
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}
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/**
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* This function is the ethernet packet send function. It calls
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* etharp_output after checking link status.
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*
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* \param[in] netif the lwip network interface structure for this lpc_enetif
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* \param[in] q Pointer to pbug to send
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* \param[in] ipaddr IP address
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* \return ERR_OK or error code
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*/
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static err_t _eth_arch_netif_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr)
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{
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/* Only send packet is link is up */
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if (netif->flags & NETIF_FLAG_LINK_UP) {
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return etharp_output(netif, q, ipaddr);
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}
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return ERR_CONN;
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}
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/**
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* Should be called at the beginning of the program to set up the
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* network interface.
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*
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* This function should be passed as a parameter to netif_add().
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*
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* @param[in] netif the lwip network interface structure for this lpc_enetif
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* @return ERR_OK if the loopif is initialized
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* ERR_MEM if private data couldn't be allocated
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* any other err_t on error
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*/
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err_t eth_arch_enetif_init(struct netif *netif)
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{
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/* set MAC hardware address */
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netif->hwaddr_len = ETHARP_HWADDR_LEN;
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/* maximum transfer unit */
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netif->mtu = 1500;
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/* device capabilities */
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netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP;
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#if LWIP_NETIF_HOSTNAME
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/* Initialize interface hostname */
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netif->hostname = "lwipstm32";
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#endif /* LWIP_NETIF_HOSTNAME */
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netif->name[0] = 'e';
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netif->name[1] = 'n';
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netif->output = _eth_arch_netif_output;
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netif->linkoutput = _eth_arch_low_level_output;
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/* semaphore */
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sys_sem_new(&rx_ready_sem, 0);
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sys_mutex_new(&tx_lock_mutex);
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/* task */
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sys_thread_new("_eth_arch_rx_task", _eth_arch_rx_task, netif, DEFAULT_THREAD_STACKSIZE, RECV_TASK_PRI);
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sys_thread_new("_eth_arch_phy_task", _eth_arch_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI);
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/* initialize the hardware */
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_eth_arch_low_level_init(netif);
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return ERR_OK;
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}
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void eth_arch_enable_interrupts(void)
|
||||
{
|
||||
HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
|
||||
HAL_NVIC_EnableIRQ(ETH_IRQn);
|
||||
}
|
||||
|
||||
void eth_arch_disable_interrupts(void)
|
||||
{
|
||||
NVIC_DisableIRQ(ETH_IRQn);
|
||||
}
|
|
@ -1,436 +0,0 @@
|
|||
#include "stm32f4xx_hal.h"
|
||||
#include "lwip/opt.h"
|
||||
|
||||
#include "lwip/timers.h"
|
||||
#include "netif/etharp.h"
|
||||
#include "lwip/tcpip.h"
|
||||
#include <string.h>
|
||||
#include "cmsis_os.h"
|
||||
#include "mbed_interface.h"
|
||||
|
||||
#define RECV_TASK_PRI (osPriorityHigh)
|
||||
#define PHY_TASK_PRI (osPriorityLow)
|
||||
#define PHY_TASK_WAIT (200)
|
||||
#define ETH_ARCH_PHY_ADDRESS (0x00)
|
||||
|
||||
ETH_HandleTypeDef EthHandle;
|
||||
|
||||
#if defined (__ICCARM__) /*!< IAR Compiler */
|
||||
#pragma data_alignment=4
|
||||
#endif
|
||||
__ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx DMA Descriptor */
|
||||
|
||||
#if defined (__ICCARM__) /*!< IAR Compiler */
|
||||
#pragma data_alignment=4
|
||||
#endif
|
||||
__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
|
||||
|
||||
#if defined (__ICCARM__) /*!< IAR Compiler */
|
||||
#pragma data_alignment=4
|
||||
#endif
|
||||
__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
|
||||
|
||||
#if defined (__ICCARM__) /*!< IAR Compiler */
|
||||
#pragma data_alignment=4
|
||||
#endif
|
||||
__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
|
||||
|
||||
static sys_sem_t rx_ready_sem; /* receive ready semaphore */
|
||||
static sys_mutex_t tx_lock_mutex;
|
||||
|
||||
/* function */
|
||||
static void _eth_arch_rx_task(void *arg);
|
||||
static void _eth_arch_phy_task(void *arg);
|
||||
static err_t _eth_arch_netif_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr);
|
||||
static err_t _eth_arch_low_level_output(struct netif *netif, struct pbuf *p);
|
||||
static struct pbuf * _eth_arch_low_level_input(struct netif *netif);
|
||||
|
||||
/**
|
||||
* Ethernet Rx Transfer completed callback
|
||||
*
|
||||
* @param heth: ETH handle
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
|
||||
{
|
||||
sys_sem_signal(&rx_ready_sem);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Ethernet IRQ Handler
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void ETH_IRQHandler(void)
|
||||
{
|
||||
HAL_ETH_IRQHandler(&EthHandle);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* In this function, the hardware should be initialized.
|
||||
* Called from eth_arch_enetif_init().
|
||||
*
|
||||
* @param netif the already initialized lwip network interface structure
|
||||
* for this ethernetif
|
||||
*/
|
||||
static void _eth_arch_low_level_init(struct netif *netif)
|
||||
{
|
||||
uint32_t regvalue = 0;
|
||||
HAL_StatusTypeDef hal_eth_init_status;
|
||||
|
||||
/* Init ETH */
|
||||
uint8_t MACAddr[6];
|
||||
EthHandle.Instance = ETH;
|
||||
EthHandle.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
|
||||
EthHandle.Init.Speed = ETH_SPEED_100M;
|
||||
EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
|
||||
EthHandle.Init.PhyAddress = ETH_ARCH_PHY_ADDRESS;
|
||||
#if (MBED_MAC_ADDRESS_SUM != MBED_MAC_ADDR_INTERFACE)
|
||||
MACAddr[0] = MBED_MAC_ADDR_0;
|
||||
MACAddr[1] = MBED_MAC_ADDR_1;
|
||||
MACAddr[2] = MBED_MAC_ADDR_2;
|
||||
MACAddr[3] = MBED_MAC_ADDR_3;
|
||||
MACAddr[4] = MBED_MAC_ADDR_4;
|
||||
MACAddr[5] = MBED_MAC_ADDR_5;
|
||||
#else
|
||||
mbed_mac_address((char *)MACAddr);
|
||||
#endif
|
||||
EthHandle.Init.MACAddr = &MACAddr[0];
|
||||
EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
|
||||
EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
|
||||
EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
|
||||
hal_eth_init_status = HAL_ETH_Init(&EthHandle);
|
||||
|
||||
/* Initialize Tx Descriptors list: Chain Mode */
|
||||
HAL_ETH_DMATxDescListInit(&EthHandle, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
|
||||
|
||||
/* Initialize Rx Descriptors list: Chain Mode */
|
||||
HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
|
||||
|
||||
#if LWIP_ARP || LWIP_ETHERNET
|
||||
/* set MAC hardware address length */
|
||||
netif->hwaddr_len = ETHARP_HWADDR_LEN;
|
||||
|
||||
/* set MAC hardware address */
|
||||
netif->hwaddr[0] = EthHandle.Init.MACAddr[0];
|
||||
netif->hwaddr[1] = EthHandle.Init.MACAddr[1];
|
||||
netif->hwaddr[2] = EthHandle.Init.MACAddr[2];
|
||||
netif->hwaddr[3] = EthHandle.Init.MACAddr[3];
|
||||
netif->hwaddr[4] = EthHandle.Init.MACAddr[4];
|
||||
netif->hwaddr[5] = EthHandle.Init.MACAddr[5];
|
||||
|
||||
/* maximum transfer unit */
|
||||
netif->mtu = 1500;
|
||||
|
||||
/* device capabilities */
|
||||
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
|
||||
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
|
||||
|
||||
/* Enable MAC and DMA transmission and reception */
|
||||
HAL_ETH_Start(&EthHandle);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This function should do the actual transmission of the packet. The packet is
|
||||
* contained in the pbuf that is passed to the function. This pbuf
|
||||
* might be chained.
|
||||
*
|
||||
* @param netif the lwip network interface structure for this ethernetif
|
||||
* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
|
||||
* @return ERR_OK if the packet could be sent
|
||||
* an err_t value if the packet couldn't be sent
|
||||
*
|
||||
* @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
|
||||
* strange results. You might consider waiting for space in the DMA queue
|
||||
* to become availale since the stack doesn't retry to send a packet
|
||||
* dropped because of memory failure (except for the TCP timers).
|
||||
*/
|
||||
|
||||
static err_t _eth_arch_low_level_output(struct netif *netif, struct pbuf *p)
|
||||
{
|
||||
err_t errval;
|
||||
struct pbuf *q;
|
||||
uint8_t *buffer = (uint8_t*)(EthHandle.TxDesc->Buffer1Addr);
|
||||
__IO ETH_DMADescTypeDef *DmaTxDesc;
|
||||
uint32_t framelength = 0;
|
||||
uint32_t bufferoffset = 0;
|
||||
uint32_t byteslefttocopy = 0;
|
||||
uint32_t payloadoffset = 0;
|
||||
DmaTxDesc = EthHandle.TxDesc;
|
||||
bufferoffset = 0;
|
||||
|
||||
|
||||
sys_mutex_lock(&tx_lock_mutex);
|
||||
|
||||
/* copy frame from pbufs to driver buffers */
|
||||
for (q = p; q != NULL; q = q->next) {
|
||||
/* Is this buffer available? If not, goto error */
|
||||
if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
|
||||
errval = ERR_USE;
|
||||
goto error;
|
||||
}
|
||||
|
||||
/* Get bytes in current lwIP buffer */
|
||||
byteslefttocopy = q->len;
|
||||
payloadoffset = 0;
|
||||
|
||||
/* Check if the length of data to copy is bigger than Tx buffer size*/
|
||||
while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE) {
|
||||
/* Copy data to Tx buffer*/
|
||||
memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
|
||||
|
||||
/* Point to next descriptor */
|
||||
DmaTxDesc = (ETH_DMADescTypeDef*)(DmaTxDesc->Buffer2NextDescAddr);
|
||||
|
||||
/* Check if the buffer is available */
|
||||
if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
|
||||
errval = ERR_USE;
|
||||
goto error;
|
||||
}
|
||||
|
||||
buffer = (uint8_t*)(DmaTxDesc->Buffer1Addr);
|
||||
|
||||
byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
|
||||
payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
|
||||
framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
|
||||
bufferoffset = 0;
|
||||
}
|
||||
|
||||
/* Copy the remaining bytes */
|
||||
memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy);
|
||||
bufferoffset = bufferoffset + byteslefttocopy;
|
||||
framelength = framelength + byteslefttocopy;
|
||||
}
|
||||
|
||||
/* Prepare transmit descriptors to give to DMA */
|
||||
HAL_ETH_TransmitFrame(&EthHandle, framelength);
|
||||
|
||||
errval = ERR_OK;
|
||||
|
||||
error:
|
||||
|
||||
/* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
|
||||
if ((EthHandle.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET) {
|
||||
/* Clear TUS ETHERNET DMA flag */
|
||||
EthHandle.Instance->DMASR = ETH_DMASR_TUS;
|
||||
|
||||
/* Resume DMA transmission*/
|
||||
EthHandle.Instance->DMATPDR = 0;
|
||||
}
|
||||
|
||||
sys_mutex_unlock(&tx_lock_mutex);
|
||||
|
||||
return errval;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Should allocate a pbuf and transfer the bytes of the incoming
|
||||
* packet from the interface into the pbuf.
|
||||
*
|
||||
* @param netif the lwip network interface structure for this ethernetif
|
||||
* @return a pbuf filled with the received packet (including MAC header)
|
||||
* NULL on memory error
|
||||
*/
|
||||
static struct pbuf * _eth_arch_low_level_input(struct netif *netif)
|
||||
{
|
||||
struct pbuf *p = NULL;
|
||||
struct pbuf *q;
|
||||
uint16_t len = 0;
|
||||
uint8_t *buffer;
|
||||
__IO ETH_DMADescTypeDef *dmarxdesc;
|
||||
uint32_t bufferoffset = 0;
|
||||
uint32_t payloadoffset = 0;
|
||||
uint32_t byteslefttocopy = 0;
|
||||
uint32_t i = 0;
|
||||
|
||||
|
||||
/* get received frame */
|
||||
if (HAL_ETH_GetReceivedFrame(&EthHandle) != HAL_OK)
|
||||
return NULL;
|
||||
|
||||
/* Obtain the size of the packet and put it into the "len" variable. */
|
||||
len = EthHandle.RxFrameInfos.length;
|
||||
buffer = (uint8_t*)EthHandle.RxFrameInfos.buffer;
|
||||
|
||||
if (len > 0) {
|
||||
/* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
|
||||
p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
|
||||
}
|
||||
|
||||
if (p != NULL) {
|
||||
dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
|
||||
bufferoffset = 0;
|
||||
for (q = p; q != NULL; q = q->next) {
|
||||
byteslefttocopy = q->len;
|
||||
payloadoffset = 0;
|
||||
|
||||
/* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
|
||||
while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE) {
|
||||
/* Copy data to pbuf */
|
||||
memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
|
||||
|
||||
/* Point to next descriptor */
|
||||
dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
|
||||
buffer = (uint8_t*)(dmarxdesc->Buffer1Addr);
|
||||
|
||||
byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
|
||||
payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
|
||||
bufferoffset = 0;
|
||||
}
|
||||
/* Copy remaining data in pbuf */
|
||||
memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
|
||||
bufferoffset = bufferoffset + byteslefttocopy;
|
||||
}
|
||||
|
||||
/* Release descriptors to DMA */
|
||||
/* Point to first descriptor */
|
||||
dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
|
||||
/* Set Own bit in Rx descriptors: gives the buffers back to DMA */
|
||||
for (i = 0; i < EthHandle.RxFrameInfos.SegCount; i++) {
|
||||
dmarxdesc->Status |= ETH_DMARXDESC_OWN;
|
||||
dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
|
||||
}
|
||||
|
||||
/* Clear Segment_Count */
|
||||
EthHandle.RxFrameInfos.SegCount = 0;
|
||||
}
|
||||
|
||||
/* When Rx Buffer unavailable flag is set: clear it and resume reception */
|
||||
if ((EthHandle.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) {
|
||||
/* Clear RBUS ETHERNET DMA flag */
|
||||
EthHandle.Instance->DMASR = ETH_DMASR_RBUS;
|
||||
/* Resume DMA reception */
|
||||
EthHandle.Instance->DMARPDR = 0;
|
||||
}
|
||||
return p;
|
||||
}
|
||||
|
||||
/**
|
||||
* This task receives input data
|
||||
*
|
||||
* \param[in] netif the lwip network interface structure
|
||||
*/
|
||||
static void _eth_arch_rx_task(void *arg)
|
||||
{
|
||||
struct netif *netif = (struct netif*)arg;
|
||||
struct pbuf *p;
|
||||
|
||||
while (1) {
|
||||
sys_arch_sem_wait(&rx_ready_sem, 0);
|
||||
p = _eth_arch_low_level_input(netif);
|
||||
if (p != NULL) {
|
||||
if (netif->input(p, netif) != ERR_OK) {
|
||||
pbuf_free(p);
|
||||
p = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* This task checks phy link status and updates net status
|
||||
*
|
||||
* \param[in] netif the lwip network interface structure
|
||||
*/
|
||||
static void _eth_arch_phy_task(void *arg)
|
||||
{
|
||||
struct netif *netif = (struct netif*)arg;
|
||||
uint32_t phy_status = 0;
|
||||
|
||||
while (1) {
|
||||
uint32_t status;
|
||||
if (HAL_ETH_ReadPHYRegister(&EthHandle, PHY_BSR, &status) == HAL_OK) {
|
||||
if ((status & PHY_LINKED_STATUS) && !(phy_status & PHY_LINKED_STATUS)) {
|
||||
tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1);
|
||||
} else if (!(status & PHY_LINKED_STATUS) && (phy_status & PHY_LINKED_STATUS)) {
|
||||
tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1);
|
||||
}
|
||||
phy_status = status;
|
||||
}
|
||||
osDelay(PHY_TASK_WAIT);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* This function is the ethernet packet send function. It calls
|
||||
* etharp_output after checking link status.
|
||||
*
|
||||
* \param[in] netif the lwip network interface structure for this lpc_enetif
|
||||
* \param[in] q Pointer to pbug to send
|
||||
* \param[in] ipaddr IP address
|
||||
* \return ERR_OK or error code
|
||||
*/
|
||||
static err_t _eth_arch_netif_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr)
|
||||
{
|
||||
/* Only send packet is link is up */
|
||||
if (netif->flags & NETIF_FLAG_LINK_UP) {
|
||||
return etharp_output(netif, q, ipaddr);
|
||||
}
|
||||
return ERR_CONN;
|
||||
}
|
||||
|
||||
/**
|
||||
* Should be called at the beginning of the program to set up the
|
||||
* network interface.
|
||||
*
|
||||
* This function should be passed as a parameter to netif_add().
|
||||
*
|
||||
* @param[in] netif the lwip network interface structure for this lpc_enetif
|
||||
* @return ERR_OK if the loopif is initialized
|
||||
* ERR_MEM if private data couldn't be allocated
|
||||
* any other err_t on error
|
||||
*/
|
||||
err_t eth_arch_enetif_init(struct netif *netif)
|
||||
{
|
||||
/* set MAC hardware address */
|
||||
netif->hwaddr_len = ETHARP_HWADDR_LEN;
|
||||
|
||||
/* maximum transfer unit */
|
||||
netif->mtu = 1500;
|
||||
|
||||
/* device capabilities */
|
||||
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP;
|
||||
|
||||
#if LWIP_NETIF_HOSTNAME
|
||||
/* Initialize interface hostname */
|
||||
netif->hostname = "lwipstm32";
|
||||
#endif /* LWIP_NETIF_HOSTNAME */
|
||||
|
||||
netif->name[0] = 'e';
|
||||
netif->name[1] = 'n';
|
||||
|
||||
netif->output = _eth_arch_netif_output;
|
||||
netif->linkoutput = _eth_arch_low_level_output;
|
||||
|
||||
/* semaphore */
|
||||
sys_sem_new(&rx_ready_sem, 0);
|
||||
|
||||
sys_mutex_new(&tx_lock_mutex);
|
||||
|
||||
/* task */
|
||||
sys_thread_new("_eth_arch_rx_task", _eth_arch_rx_task, netif, DEFAULT_THREAD_STACKSIZE, RECV_TASK_PRI);
|
||||
sys_thread_new("_eth_arch_phy_task", _eth_arch_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI);
|
||||
|
||||
/* initialize the hardware */
|
||||
_eth_arch_low_level_init(netif);
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
|
||||
void eth_arch_enable_interrupts(void)
|
||||
{
|
||||
HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
|
||||
HAL_NVIC_EnableIRQ(ETH_IRQn);
|
||||
}
|
||||
|
||||
void eth_arch_disable_interrupts(void)
|
||||
{
|
||||
NVIC_DisableIRQ(ETH_IRQn);
|
||||
}
|
|
@ -1,4 +1,3 @@
|
|||
#include "stm32f7xx_hal.h"
|
||||
#include "lwip/opt.h"
|
||||
|
||||
#include "lwip/timers.h"
|
||||
|
@ -26,7 +25,7 @@ __ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ether
|
|||
__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
|
||||
|
||||
#if defined (__ICCARM__) /*!< IAR Compiler */
|
||||
#pragma data_alignment=4
|
||||
#pragma data_alignment=4
|
||||
#endif
|
||||
__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
|
||||
|
||||
|
@ -180,8 +179,7 @@ static err_t _eth_arch_low_level_output(struct netif *netif, struct pbuf *p)
|
|||
uint32_t payloadoffset = 0;
|
||||
DmaTxDesc = EthHandle.TxDesc;
|
||||
bufferoffset = 0;
|
||||
|
||||
|
||||
|
||||
sys_mutex_lock(&tx_lock_mutex);
|
||||
|
||||
/* copy frame from pbufs to driver buffers */
|
||||
|
@ -239,9 +237,9 @@ error:
|
|||
/* Resume DMA transmission*/
|
||||
EthHandle.Instance->DMATPDR = 0;
|
||||
}
|
||||
|
||||
|
||||
sys_mutex_unlock(&tx_lock_mutex);
|
||||
|
||||
|
||||
return errval;
|
||||
}
|
||||
|
||||
|
@ -345,7 +343,7 @@ static void _eth_arch_rx_task(void *arg)
|
|||
if (netif->input(p, netif) != ERR_OK) {
|
||||
pbuf_free(p);
|
||||
p = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -359,13 +357,13 @@ static void _eth_arch_phy_task(void *arg)
|
|||
{
|
||||
struct netif *netif = (struct netif*)arg;
|
||||
uint32_t phy_status = 0;
|
||||
|
||||
|
||||
while (1) {
|
||||
uint32_t status;
|
||||
if (HAL_ETH_ReadPHYRegister(&EthHandle, PHY_SR, &status) == HAL_OK) {
|
||||
if ((status & PHY_LINK_STATUS) && !(phy_status & PHY_LINK_STATUS)) {
|
||||
if (HAL_ETH_ReadPHYRegister(&EthHandle, PHY_BSR, &status) == HAL_OK) {
|
||||
if ((status & PHY_LINKED_STATUS) && !(phy_status & PHY_LINKED_STATUS)) {
|
||||
tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1);
|
||||
} else if (!(status & PHY_LINK_STATUS) && (phy_status & PHY_LINK_STATUS)) {
|
||||
} else if (!(status & PHY_LINKED_STATUS) && (phy_status & PHY_LINKED_STATUS)) {
|
||||
tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1);
|
||||
}
|
||||
phy_status = status;
|
||||
|
@ -427,16 +425,16 @@ err_t eth_arch_enetif_init(struct netif *netif)
|
|||
|
||||
/* semaphore */
|
||||
sys_sem_new(&rx_ready_sem, 0);
|
||||
|
||||
|
||||
sys_mutex_new(&tx_lock_mutex);
|
||||
|
||||
/* task */
|
||||
sys_thread_new("_eth_arch_rx_task", _eth_arch_rx_task, netif, DEFAULT_THREAD_STACKSIZE, RECV_TASK_PRI);
|
||||
sys_thread_new("_eth_arch_phy_task", _eth_arch_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI);
|
||||
|
||||
|
||||
/* initialize the hardware */
|
||||
_eth_arch_low_level_init(netif);
|
||||
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
|
Loading…
Reference in New Issue