mirror of https://github.com/ARMmbed/mbed-os.git
bug fix of SVC handler
parent
e81663306b
commit
ac5a462946
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@ -1,301 +0,0 @@
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/*----------------------------------------------------------------------------
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* RL-ARM - RTX
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*----------------------------------------------------------------------------
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* Name: HAL_CM0.C
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* Purpose: Hardware Abstraction Layer for Cortex-M0
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* Rev.: V4.60
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*----------------------------------------------------------------------------
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*
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* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
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* All rights reserved.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* - Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*---------------------------------------------------------------------------*/
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#include "rt_TypeDef.h"
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#include "RTX_Conf.h"
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#include "rt_System.h"
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#include "rt_HAL_CM.h"
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#include "rt_Task.h"
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#include "rt_MemBox.h"
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/*----------------------------------------------------------------------------
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* Functions
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*---------------------------------------------------------------------------*/
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/*--------------------------- rt_set_PSP ------------------------------------*/
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__asm void rt_set_PSP (U32 stack) {
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MSR PSP,R0
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BX LR
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}
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/*--------------------------- rt_get_PSP ------------------------------------*/
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__asm U32 rt_get_PSP (void) {
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MRS R0,PSP
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BX LR
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}
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/*--------------------------- os_set_env ------------------------------------*/
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__asm void os_set_env (void) {
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/* Switch to Unprivileged/Privileged Thread mode, use PSP. */
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MOV R0,SP ; PSP = MSP
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MSR PSP,R0
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LDR R0,=__cpp(&os_flags)
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LDRB R0,[R0]
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LSLS R0,#31
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BNE PrivilegedE
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MOVS R0,#0x03 ; Unprivileged Thread mode, use PSP
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MSR CONTROL,R0
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BX LR
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PrivilegedE
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MOVS R0,#0x02 ; Privileged Thread mode, use PSP
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MSR CONTROL,R0
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BX LR
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ALIGN
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}
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/*--------------------------- _alloc_box ------------------------------------*/
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__asm void *_alloc_box (void *box_mem) {
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/* Function wrapper for Unprivileged/Privileged mode. */
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LDR R3,=__cpp(rt_alloc_box)
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MOV R12,R3
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MRS R3,IPSR
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LSLS R3,#24
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BNE PrivilegedA
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MRS R3,CONTROL
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LSLS R3,#31
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BEQ PrivilegedA
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SVC 0
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BX LR
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PrivilegedA
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BX R12
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ALIGN
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}
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/*--------------------------- _free_box -------------------------------------*/
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__asm int _free_box (void *box_mem, void *box) {
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/* Function wrapper for Unprivileged/Privileged mode. */
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LDR R3,=__cpp(rt_free_box)
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MOV R12,R3
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MRS R3,IPSR
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LSLS R3,#24
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BNE PrivilegedF
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MRS R3,CONTROL
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LSLS R3,#31
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BEQ PrivilegedF
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SVC 0
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BX LR
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PrivilegedF
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BX R12
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ALIGN
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}
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/*-------------------------- SVC_Handler ------------------------------------*/
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__asm void SVC_Handler (void) {
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PRESERVE8
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IMPORT SVC_Count
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IMPORT SVC_Table
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IMPORT rt_stk_check
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MRS R0,PSP ; Read PSP
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LDR R1,[R0,#24] ; Read Saved PC from Stack
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SUBS R1,R1,#2 ; Point to SVC Instruction
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LDRB R1,[R1] ; Load SVC Number
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CMP R1,#0
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BNE SVC_User ; User SVC Number > 0
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MOV LR,R4
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LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
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MOV R12,R4
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MOV R4,LR
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BLX R12 ; Call SVC Function
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MRS R3,PSP ; Read PSP
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STMIA R3!,{R0-R2} ; Store return values
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LDR R3,=__cpp(&os_tsk)
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LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
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CMP R1,R2
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BEQ SVC_Exit ; no task switch
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SUBS R3,#8
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CMP R1,#0 ; Runtask deleted?
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BEQ SVC_Next
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MRS R0,PSP ; Read PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
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STMIA R0!,{R4-R7} ; Save old context (R4-R7)
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MOV R4,R8
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MOV R5,R9
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MOV R6,R10
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MOV R7,R11
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STMIA R0!,{R4-R7} ; Save old context (R8-R11)
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PUSH {R2,R3}
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BL rt_stk_check ; Check for Stack overflow
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POP {R2,R3}
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SVC_Next
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STR R2,[R3] ; os_tsk.run = os_tsk.new
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LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
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ADDS R0,R0,#16 ; Adjust Start Address
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LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
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MOV R8,R4
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MOV R9,R5
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MOV R10,R6
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MOV R11,R7
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MSR PSP,R0 ; Write PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
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SVC_Exit
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MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
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MVNS R0,R0
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BX R0 ; RETI to Thread Mode, use PSP
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/*------------------- User SVC ------------------------------*/
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SVC_User
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PUSH {R4,LR} ; Save Registers
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LDR R2,=SVC_Count
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LDR R2,[R2]
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CMP R1,R2
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BHI SVC_Done ; Overflow
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LDR R4,=SVC_Table-4
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LSLS R1,R1,#2
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LDR R4,[R4,R1] ; Load SVC Function Address
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MOV LR,R4
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LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
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MOV R12,R4
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BLX LR ; Call SVC Function
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MRS R4,PSP ; Read PSP
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STMIA R4!,{R0-R3} ; Function return values
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SVC_Done
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POP {R4,PC} ; RETI
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ALIGN
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}
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/*-------------------------- PendSV_Handler ---------------------------------*/
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__asm void PendSV_Handler (void) {
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PRESERVE8
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BL __cpp(rt_pop_req)
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Sys_Switch
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LDR R3,=__cpp(&os_tsk)
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LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
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CMP R1,R2
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BEQ Sys_Exit ; no task switch
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SUBS R3,#8
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MRS R0,PSP ; Read PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
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STMIA R0!,{R4-R7} ; Save old context (R4-R7)
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MOV R4,R8
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MOV R5,R9
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MOV R6,R10
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MOV R7,R11
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STMIA R0!,{R4-R7} ; Save old context (R8-R11)
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PUSH {R2,R3}
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BL rt_stk_check ; Check for Stack overflow
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POP {R2,R3}
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STR R2,[R3] ; os_tsk.run = os_tsk.new
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LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
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ADDS R0,R0,#16 ; Adjust Start Address
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LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
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MOV R8,R4
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MOV R9,R5
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MOV R10,R6
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MOV R11,R7
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MSR PSP,R0 ; Write PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
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Sys_Exit
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MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
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MVNS R0,R0
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BX R0 ; RETI to Thread Mode, use PSP
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ALIGN
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}
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/*-------------------------- SysTick_Handler --------------------------------*/
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__asm void SysTick_Handler (void) {
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PRESERVE8
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BL __cpp(rt_systick)
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B Sys_Switch
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ALIGN
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}
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/*-------------------------- OS_Tick_Handler --------------------------------*/
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__asm void OS_Tick_Handler (void) {
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PRESERVE8
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BL __cpp(os_tick_irqack)
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BL __cpp(rt_systick)
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B Sys_Switch
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ALIGN
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}
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/*----------------------------------------------------------------------------
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* end of file
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*---------------------------------------------------------------------------*/
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@ -1,57 +0,0 @@
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;/*----------------------------------------------------------------------------
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; * RL-ARM - RTX
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; *----------------------------------------------------------------------------
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; * Name: SVC_TABLE.S
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; * Purpose: Pre-defined SVC Table for Cortex-M
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; * Rev.: V4.60
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; *----------------------------------------------------------------------------
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; *
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; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
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; * All rights reserved.
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; * Redistribution and use in source and binary forms, with or without
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; * modification, are permitted provided that the following conditions are met:
|
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||||||
; * - Redistributions of source code must retain the above copyright
|
|
||||||
; * notice, this list of conditions and the following disclaimer.
|
|
||||||
; * - Redistributions in binary form must reproduce the above copyright
|
|
||||||
; * notice, this list of conditions and the following disclaimer in the
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; * documentation and/or other materials provided with the distribution.
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; * - Neither the name of ARM nor the names of its contributors may be used
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; * to endorse or promote products derived from this software without
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; * specific prior written permission.
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; *
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; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
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||||||
; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
|
||||||
; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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; * POSSIBILITY OF SUCH DAMAGE.
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; *---------------------------------------------------------------------------*/
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AREA SVC_TABLE, CODE, READONLY
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EXPORT SVC_Count
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SVC_Cnt EQU (SVC_End-SVC_Table)/4
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SVC_Count DCD SVC_Cnt
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; Import user SVC functions here.
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; IMPORT __SVC_1
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EXPORT SVC_Table
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SVC_Table
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; Insert user SVC functions here. SVC 0 used by RTL Kernel.
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; DCD __SVC_1 ; user SVC function
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SVC_End
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END
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/*----------------------------------------------------------------------------
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* end of file
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*---------------------------------------------------------------------------*/
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@ -229,7 +229,7 @@ SVC_Handler:
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ISR return code can be used in both cases. */
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ISR return code can be used in both cases. */
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STMFD SP!, {R0,LR} /* Store registers. */
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STMFD SP!, {R0,LR} /* Store registers. */
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ADD LR, LR, #4
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ADD LR, LR, #4 /* Align LR with IRQ handler */
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SaveContext
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SaveContext
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MOV R11, LR /* Save Task Stack Pointer */
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MOV R11, LR /* Save Task Stack Pointer */
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LDMFD SP!, {R0,LR} /* Restore registers and return. */
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LDMFD SP!, {R0,LR} /* Restore registers and return. */
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@ -242,17 +242,10 @@ SVC_Handler:
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BNE SVC_User /* User SVC Number > 0 */
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BNE SVC_User /* User SVC Number > 0 */
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MOV LR, PC /* set LR to return address */
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MOV LR, PC /* set LR to return address */
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BX R12 /* Call SVC Function */
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BX R12 /* Call SVC Function */
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STMFD SP!, {R0-R3} /* Store return values */
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LDR R3, =os_tsk
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LDMIA R3!, {R1,R2} /* os_tsk.run, os_tsk.new */
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CMP R1,0
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LDMFD SP!, {R0-R3} /* Restore return values */
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LDMFD SP!, {R11} /* Load Task Stack Pointer */
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LDMFD SP!, {R11} /* Load Task Stack Pointer */
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BEQ SVC_Exit /* no need in return values */
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STMIB R11!, {R0-R3} /* Store return values to Task stack */
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ADD R11, 4 /* Offset to R0 in the Task Stack */
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STMDB R11, {R0-R3} /* Save return values in the Task Stack */
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SVC_Exit:
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SVC_Exit:
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B RestoreContext /* return to the task */
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B RestoreContext /* return to the task */
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||||||
|
@ -275,7 +268,7 @@ SVC_User:
|
||||||
LDMFD SP!, {R11} /* Load Task Stack Pointer */
|
LDMFD SP!, {R11} /* Load Task Stack Pointer */
|
||||||
BEQ SVC_Exit /* no need in return values */
|
BEQ SVC_Exit /* no need in return values */
|
||||||
|
|
||||||
STMDB R11, {R0-R3} /* Save return values in the Task Stack */
|
STMIB R11!, {R0-R3} /* Store return values to Task stack */
|
||||||
SVC_Done:
|
SVC_Done:
|
||||||
B RestoreContext /* return to the task */
|
B RestoreContext /* return to the task */
|
||||||
|
|
||||||
|
@ -309,12 +302,6 @@ IRQ_Handler:
|
||||||
.fnend
|
.fnend
|
||||||
.size IRQ_Handler, .-IRQ_Handler
|
.size IRQ_Handler, .-IRQ_Handler
|
||||||
|
|
||||||
/*-------------------------- PendSV_Handler ---------------------------------*/
|
|
||||||
PendSV_Handler:
|
|
||||||
BL rt_pop_req
|
|
||||||
B RestoreContext
|
|
||||||
|
|
||||||
|
|
||||||
/*-------------------------- SysTick_Handler --------------------------------*/
|
/*-------------------------- SysTick_Handler --------------------------------*/
|
||||||
|
|
||||||
# void SysTick_Handler (void);
|
# void SysTick_Handler (void);
|
||||||
|
@ -328,7 +315,7 @@ SysTick_Handler:
|
||||||
PUSH {LR}
|
PUSH {LR}
|
||||||
BL rt_systick
|
BL rt_systick
|
||||||
POP {LR}
|
POP {LR}
|
||||||
BX LR
|
BX LR /* return to IRQ handler */
|
||||||
|
|
||||||
/*-------------------------- End --------------------------------*/
|
/*-------------------------- End --------------------------------*/
|
||||||
.fnend
|
.fnend
|
||||||
|
|
|
@ -1,312 +0,0 @@
|
||||||
/*----------------------------------------------------------------------------
|
|
||||||
* CMSIS-RTOS - RTX
|
|
||||||
*----------------------------------------------------------------------------
|
|
||||||
* Name: HAL_CM0.S
|
|
||||||
* Purpose: Hardware Abstraction Layer for Cortex-M0
|
|
||||||
* Rev.: V4.70
|
|
||||||
*----------------------------------------------------------------------------
|
|
||||||
*
|
|
||||||
* Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
* - Redistributions of source code must retain the above copyright
|
|
||||||
* notice, this list of conditions and the following disclaimer.
|
|
||||||
* - Redistributions in binary form must reproduce the above copyright
|
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
|
||||||
* documentation and/or other materials provided with the distribution.
|
|
||||||
* - Neither the name of ARM nor the names of its contributors may be used
|
|
||||||
* to endorse or promote products derived from this software without
|
|
||||||
* specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*---------------------------------------------------------------------------*/
|
|
||||||
|
|
||||||
NAME HAL_CM0.S
|
|
||||||
|
|
||||||
#define TCB_TSTACK 36
|
|
||||||
|
|
||||||
EXTERN os_flags
|
|
||||||
EXTERN os_tsk
|
|
||||||
EXTERN rt_alloc_box
|
|
||||||
EXTERN rt_free_box
|
|
||||||
EXTERN rt_stk_check
|
|
||||||
EXTERN rt_pop_req
|
|
||||||
EXTERN rt_systick
|
|
||||||
EXTERN os_tick_irqack
|
|
||||||
EXTERN SVC_Table
|
|
||||||
EXTERN SVC_Count
|
|
||||||
|
|
||||||
/*----------------------------------------------------------------------------
|
|
||||||
* Functions
|
|
||||||
*---------------------------------------------------------------------------*/
|
|
||||||
|
|
||||||
SECTION .text:CODE:NOROOT(2)
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
/*--------------------------- rt_set_PSP ------------------------------------*/
|
|
||||||
|
|
||||||
; void rt_set_PSP (U32 stack);
|
|
||||||
|
|
||||||
PUBLIC rt_set_PSP
|
|
||||||
rt_set_PSP:
|
|
||||||
|
|
||||||
MSR PSP,R0
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
|
|
||||||
/*--------------------------- rt_get_PSP ------------------------------------*/
|
|
||||||
|
|
||||||
; U32 rt_get_PSP (void);
|
|
||||||
|
|
||||||
PUBLIC rt_get_PSP
|
|
||||||
rt_get_PSP:
|
|
||||||
|
|
||||||
MRS R0,PSP
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
|
|
||||||
/*--------------------------- os_set_env ------------------------------------*/
|
|
||||||
|
|
||||||
; void os_set_env (void);
|
|
||||||
/* Switch to Unprivileged/Privileged Thread mode, use PSP. */
|
|
||||||
|
|
||||||
PUBLIC os_set_env
|
|
||||||
os_set_env:
|
|
||||||
|
|
||||||
MOV R0,SP /* PSP = MSP */
|
|
||||||
MSR PSP,R0
|
|
||||||
LDR R0,=os_flags
|
|
||||||
LDRB R0,[R0]
|
|
||||||
LSLS R0,#31
|
|
||||||
BNE PrivilegedE
|
|
||||||
MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
|
|
||||||
MSR CONTROL,R0
|
|
||||||
BX LR
|
|
||||||
PrivilegedE:
|
|
||||||
MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
|
|
||||||
MSR CONTROL,R0
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
|
|
||||||
/*--------------------------- _alloc_box ------------------------------------*/
|
|
||||||
|
|
||||||
; void *_alloc_box (void *box_mem);
|
|
||||||
/* Function wrapper for Unprivileged/Privileged mode. */
|
|
||||||
|
|
||||||
PUBLIC _alloc_box
|
|
||||||
_alloc_box:
|
|
||||||
|
|
||||||
LDR R3,=rt_alloc_box
|
|
||||||
MOV R12,R3
|
|
||||||
MRS R3,IPSR
|
|
||||||
LSLS R3,#24
|
|
||||||
BNE PrivilegedA
|
|
||||||
MRS R3,CONTROL
|
|
||||||
LSLS R3,#31
|
|
||||||
BEQ PrivilegedA
|
|
||||||
SVC 0
|
|
||||||
BX LR
|
|
||||||
PrivilegedA:
|
|
||||||
BX R12
|
|
||||||
|
|
||||||
|
|
||||||
/*--------------------------- _free_box -------------------------------------*/
|
|
||||||
|
|
||||||
; int _free_box (void *box_mem, void *box);
|
|
||||||
/* Function wrapper for Unprivileged/Privileged mode. */
|
|
||||||
|
|
||||||
PUBLIC _free_box
|
|
||||||
_free_box:
|
|
||||||
|
|
||||||
LDR R3,=rt_free_box
|
|
||||||
MOV R12,R3
|
|
||||||
MRS R3,IPSR
|
|
||||||
LSLS R3,#24
|
|
||||||
BNE PrivilegedF
|
|
||||||
MRS R3,CONTROL
|
|
||||||
LSLS R3,#31
|
|
||||||
BEQ PrivilegedF
|
|
||||||
SVC 0
|
|
||||||
BX LR
|
|
||||||
PrivilegedF:
|
|
||||||
BX R12
|
|
||||||
|
|
||||||
|
|
||||||
/*-------------------------- SVC_Handler ------------------------------------*/
|
|
||||||
|
|
||||||
; void SVC_Handler (void);
|
|
||||||
|
|
||||||
PUBLIC SVC_Handler
|
|
||||||
SVC_Handler:
|
|
||||||
|
|
||||||
MRS R0,PSP /* Read PSP */
|
|
||||||
LDR R1,[R0,#24] /* Read Saved PC from Stack */
|
|
||||||
SUBS R1,R1,#2 /* Point to SVC Instruction */
|
|
||||||
LDRB R1,[R1] /* Load SVC Number */
|
|
||||||
CMP R1,#0
|
|
||||||
BNE SVC_User /* User SVC Number > 0 */
|
|
||||||
|
|
||||||
MOV LR,R4
|
|
||||||
LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
|
|
||||||
MOV R12,R4
|
|
||||||
MOV R4,LR
|
|
||||||
BLX R12 /* Call SVC Function */
|
|
||||||
|
|
||||||
MRS R3,PSP /* Read PSP */
|
|
||||||
STMIA R3!,{R0-R2} /* Store return values */
|
|
||||||
|
|
||||||
LDR R3,=os_tsk
|
|
||||||
LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
|
|
||||||
CMP R1,R2
|
|
||||||
BEQ SVC_Exit /* no task switch */
|
|
||||||
|
|
||||||
SUBS R3,#8
|
|
||||||
CMP R1,#0 /* Runtask deleted? */
|
|
||||||
BEQ SVC_Next
|
|
||||||
|
|
||||||
MRS R0,PSP /* Read PSP */
|
|
||||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
|
||||||
STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
|
|
||||||
STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
|
|
||||||
MOV R4,R8
|
|
||||||
MOV R5,R9
|
|
||||||
MOV R6,R10
|
|
||||||
MOV R7,R11
|
|
||||||
STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
|
|
||||||
|
|
||||||
PUSH {R2,R3}
|
|
||||||
BL rt_stk_check /* Check for Stack overflow */
|
|
||||||
POP {R2,R3}
|
|
||||||
|
|
||||||
SVC_Next:
|
|
||||||
STR R2,[R3] /* os_tsk.run = os_tsk.new */
|
|
||||||
|
|
||||||
LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
|
|
||||||
ADDS R0,R0,#16 /* Adjust Start Address */
|
|
||||||
LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
|
|
||||||
MOV R8,R4
|
|
||||||
MOV R9,R5
|
|
||||||
MOV R10,R6
|
|
||||||
MOV R11,R7
|
|
||||||
MSR PSP,R0 /* Write PSP */
|
|
||||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
|
||||||
LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
|
|
||||||
|
|
||||||
SVC_Exit:
|
|
||||||
MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
|
|
||||||
MVNS R0,R0
|
|
||||||
BX R0 /* RETI to Thread Mode, use PSP */
|
|
||||||
|
|
||||||
/*------------------- User SVC ------------------------------*/
|
|
||||||
|
|
||||||
SVC_User:
|
|
||||||
PUSH {R4,LR} /* Save Registers */
|
|
||||||
LDR R2,=SVC_Count
|
|
||||||
LDR R2,[R2]
|
|
||||||
CMP R1,R2
|
|
||||||
BHI SVC_Done /* Overflow */
|
|
||||||
|
|
||||||
LDR R4,=SVC_Table-4
|
|
||||||
LSLS R1,R1,#2
|
|
||||||
LDR R4,[R4,R1] /* Load SVC Function Address */
|
|
||||||
MOV LR,R4
|
|
||||||
|
|
||||||
LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
|
|
||||||
MOV R12,R4
|
|
||||||
BLX LR /* Call SVC Function */
|
|
||||||
|
|
||||||
MRS R4,PSP /* Read PSP */
|
|
||||||
STMIA R4!,{R0-R3} /* Function return values */
|
|
||||||
SVC_Done:
|
|
||||||
POP {R4,PC} /* RETI */
|
|
||||||
|
|
||||||
|
|
||||||
/*-------------------------- PendSV_Handler ---------------------------------*/
|
|
||||||
|
|
||||||
; void PendSV_Handler (void);
|
|
||||||
|
|
||||||
PUBLIC PendSV_Handler
|
|
||||||
PendSV_Handler:
|
|
||||||
|
|
||||||
BL rt_pop_req
|
|
||||||
|
|
||||||
Sys_Switch:
|
|
||||||
LDR R3,=os_tsk
|
|
||||||
LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
|
|
||||||
CMP R1,R2
|
|
||||||
BEQ Sys_Exit /* no task switch */
|
|
||||||
|
|
||||||
SUBS R3,#8
|
|
||||||
|
|
||||||
MRS R0,PSP /* Read PSP */
|
|
||||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
|
||||||
STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
|
|
||||||
STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
|
|
||||||
MOV R4,R8
|
|
||||||
MOV R5,R9
|
|
||||||
MOV R6,R10
|
|
||||||
MOV R7,R11
|
|
||||||
STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
|
|
||||||
|
|
||||||
PUSH {R2,R3}
|
|
||||||
BL rt_stk_check /* Check for Stack overflow */
|
|
||||||
POP {R2,R3}
|
|
||||||
|
|
||||||
STR R2,[R3] /* os_tsk.run = os_tsk.new */
|
|
||||||
|
|
||||||
LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
|
|
||||||
ADDS R0,R0,#16 /* Adjust Start Address */
|
|
||||||
LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
|
|
||||||
MOV R8,R4
|
|
||||||
MOV R9,R5
|
|
||||||
MOV R10,R6
|
|
||||||
MOV R11,R7
|
|
||||||
MSR PSP,R0 /* Write PSP */
|
|
||||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
|
||||||
LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
|
|
||||||
|
|
||||||
Sys_Exit:
|
|
||||||
MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
|
|
||||||
MVNS R0,R0
|
|
||||||
BX R0 /* RETI to Thread Mode, use PSP */
|
|
||||||
|
|
||||||
|
|
||||||
/*-------------------------- SysTick_Handler --------------------------------*/
|
|
||||||
|
|
||||||
; void SysTick_Handler (void);
|
|
||||||
|
|
||||||
PUBLIC SysTick_Handler
|
|
||||||
SysTick_Handler:
|
|
||||||
|
|
||||||
BL rt_systick
|
|
||||||
B Sys_Switch
|
|
||||||
|
|
||||||
|
|
||||||
/*-------------------------- OS_Tick_Handler --------------------------------*/
|
|
||||||
|
|
||||||
; void OS_Tick_Handler (void);
|
|
||||||
|
|
||||||
PUBLIC OS_Tick_Handler
|
|
||||||
OS_Tick_Handler:
|
|
||||||
|
|
||||||
BL os_tick_irqack
|
|
||||||
BL rt_systick
|
|
||||||
B Sys_Switch
|
|
||||||
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
/*----------------------------------------------------------------------------
|
|
||||||
* end of file
|
|
||||||
*---------------------------------------------------------------------------*/
|
|
|
@ -1,58 +0,0 @@
|
||||||
;/*----------------------------------------------------------------------------
|
|
||||||
; * CMSIS-RTOS - RTX
|
|
||||||
; *----------------------------------------------------------------------------
|
|
||||||
; * Name: SVC_TABLE.S
|
|
||||||
; * Purpose: Pre-defined SVC Table for Cortex-M
|
|
||||||
; * Rev.: V4.70
|
|
||||||
; *----------------------------------------------------------------------------
|
|
||||||
; *
|
|
||||||
; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
|
|
||||||
; * All rights reserved.
|
|
||||||
; * Redistribution and use in source and binary forms, with or without
|
|
||||||
; * modification, are permitted provided that the following conditions are met:
|
|
||||||
; * - Redistributions of source code must retain the above copyright
|
|
||||||
; * notice, this list of conditions and the following disclaimer.
|
|
||||||
; * - Redistributions in binary form must reproduce the above copyright
|
|
||||||
; * notice, this list of conditions and the following disclaimer in the
|
|
||||||
; * documentation and/or other materials provided with the distribution.
|
|
||||||
; * - Neither the name of ARM nor the names of its contributors may be used
|
|
||||||
; * to endorse or promote products derived from this software without
|
|
||||||
; * specific prior written permission.
|
|
||||||
; *
|
|
||||||
; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
|
||||||
; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
; * POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
; *---------------------------------------------------------------------------*/
|
|
||||||
|
|
||||||
|
|
||||||
NAME SVC_TABLE
|
|
||||||
SECTION .text:CONST (2)
|
|
||||||
|
|
||||||
PUBLIC SVC_Count
|
|
||||||
|
|
||||||
SVC_Cnt EQU (SVC_End-SVC_Table)/4
|
|
||||||
SVC_Count DCD SVC_Cnt
|
|
||||||
|
|
||||||
; Import user SVC functions here.
|
|
||||||
; IMPORT __SVC_1
|
|
||||||
|
|
||||||
PUBLIC SVC_Table
|
|
||||||
SVC_Table
|
|
||||||
; Insert user SVC functions here. SVC 0 used by RTL Kernel.
|
|
||||||
; DCD __SVC_1 ; user SVC function
|
|
||||||
|
|
||||||
SVC_End
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
/*----------------------------------------------------------------------------
|
|
||||||
* end of file
|
|
||||||
*---------------------------------------------------------------------------*/
|
|
|
@ -337,7 +337,7 @@ int32_t osKernelRunning(void);
|
||||||
extern osThreadDef_t os_thread_def_##name
|
extern osThreadDef_t os_thread_def_##name
|
||||||
#else // define the object
|
#else // define the object
|
||||||
#define osThreadDef(name, priority, stacksz) \
|
#define osThreadDef(name, priority, stacksz) \
|
||||||
unsigned char os_thread_def_stack_##name [stacksz]; \
|
unsigned char os_thread_def_stack_##name [stacksz] __attribute__((aligned (4))); \
|
||||||
osThreadDef_t os_thread_def_##name = \
|
osThreadDef_t os_thread_def_##name = \
|
||||||
{ (name), (priority), (stacksz), (os_thread_def_stack_##name)}
|
{ (name), (priority), (stacksz), (os_thread_def_stack_##name)}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -34,7 +34,8 @@
|
||||||
|
|
||||||
#include "cmsis.h"
|
#include "cmsis.h"
|
||||||
/* Definitions */
|
/* Definitions */
|
||||||
#define INITIAL_xPSR 0x00000010
|
//#define INITIAL_xPSR 0x00000010
|
||||||
|
#define INITIAL_xPSR 0x10000000
|
||||||
#define DEMCR_TRCENA 0x01000000
|
#define DEMCR_TRCENA 0x01000000
|
||||||
#define ITM_ITMENA 0x00000001
|
#define ITM_ITMENA 0x00000001
|
||||||
#define MAGIC_WORD 0xE25A2EA5
|
#define MAGIC_WORD 0xE25A2EA5
|
||||||
|
@ -111,13 +112,13 @@ extern void dbg_task_switch (U32 task_id);
|
||||||
#define OS_PEND_IRQ() NVIC_PendIRQ(SYS_TICK_IRQn)
|
#define OS_PEND_IRQ() NVIC_PendIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
|
#define OS_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
|
#define OS_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_PEND(fl,p) NVIC_INT_CTRL = (fl | p<<2) << 26
|
#define OS_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_LOCK() NVIC_DisableIRQ(SYS_TICK_IRQn)
|
#define OS_LOCK() NVIC_DisableIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_UNLOCK() NVIC_EnableIRQ(SYS_TICK_IRQn)
|
#define OS_UNLOCK() NVIC_EnableIRQ(SYS_TICK_IRQn)
|
||||||
|
|
||||||
#define OS_X_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
|
#define OS_X_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_X_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
|
#define OS_X_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
|
||||||
#define OS_X_PEND(fl,p) NVIC_PendIRQ(p)
|
#define OS_X_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)
|
||||||
|
|
||||||
#define OS_X_INIT(n) NVIC_EnableIRQ(n)
|
#define OS_X_INIT(n) NVIC_EnableIRQ(n)
|
||||||
#define OS_X_LOCK(n) NVIC_DisableIRQ(n)
|
#define OS_X_LOCK(n) NVIC_DisableIRQ(n)
|
||||||
|
|
Loading…
Reference in New Issue