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STM32H743: correct pack manager rom value

pull/15130/head
Jerome Coutant 2021-10-05 16:40:38 +02:00
parent 9dd6fb4495
commit abf86183bb
5 changed files with 23 additions and 68 deletions
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6
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct
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@ -51,14 +51,14 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
} }
RW_IRAM1 (MBED_RAM_START) { ; RW data RW_IRAM1 (MBED_RAM1_START) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM1_START + MBED_RAM1_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
} }
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down ARM_LIB_STACK (MBED_RAM1_START + MBED_RAM1_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
} }
RW_DMARxDscrTab 0x30040000 0x60 { RW_DMARxDscrTab 0x30040000 0x60 {

2
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld
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@ -41,7 +41,7 @@ MEMORY
{ {
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
DTCMRAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE, LENGTH = 128K - VECTORS_SIZE DTCMRAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE, LENGTH = 128K - VECTORS_SIZE
RAM (xrw) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE RAM (xrw) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K

22
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h
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@ -22,20 +22,34 @@
#endif #endif
#if !defined(MBED_ROM_SIZE) #if !defined(MBED_ROM_SIZE)
// 0x0x08000000-0x080FFFFF Bank1 (8 x 128K sectors)
// 0x0x08100000-0x081FFFFF Bank2 (8 x 128K sectors)
#define MBED_ROM_SIZE 0x200000 // 2.0 MB #define MBED_ROM_SIZE 0x200000 // 2.0 MB
#endif #endif
#if !defined(MBED_RAM_START) #if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000 #define MBED_RAM_START 0x20000000
#endif #endif
#if !defined(MBED_RAM_SIZE) #if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x80000 // 512 KB // 0x38000000 - 0x3800FFFF 64K SRAM4
// 0x30040000 - 0x30047FFF 32K SRAM3
// 0x30020000 - 0x3003FFFF 128K SRAM2
// 0x30000000 - 0x3001FFFF 128K SRAM1
// 0x24000000 - 0x2407FFFF 512K AXI SRAM
// 0x20000000 - 0x2001FFFF 128K DTCM
#define MBED_RAM_SIZE 0x20000 // 128 KB
#endif #endif
// DON'T USE MBED_RAM1_START and MBED_RAM1_SIZE (wrong values in tools/arm_pack_manager/index.json) #if !defined(MBED_RAM1_START)
#define MBED_RAM1_START 0x24000000
#endif
#if !defined(MBED_RAM1_SIZE)
#define MBED_RAM1_SIZE 0x80000 // 512 KB
#endif
#define NVIC_NUM_VECTORS 166 #define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

4
targets/targets.json
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@ -3197,10 +3197,6 @@
], ],
"public": false, "public": false,
"core": "Cortex-M7FD", "core": "Cortex-M7FD",
"mbed_rom_start": "0x08000000",
"mbed_rom_size": "0x200000",
"mbed_ram_start": "0x24000000",
"mbed_ram_size": "0x80000",
"extra_labels_add": [ "extra_labels_add": [
"STM32H743xI" "STM32H743xI"
], ],

57
tools/arm_pack_manager/index.json
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@ -437822,46 +437822,6 @@
"ram_start": 536870912, "ram_start": 536870912,
"size": 2097152, "size": 2097152,
"start": 134217728 "start": 134217728
},
{
"default": false,
"file_name": "CMSIS/Flash/STM32H7xx_MT25TL01G.FLM",
"ram_size": 65524,
"ram_start": 536870912,
"size": 67108864,
"start": 2415919104
},
{
"default": false,
"file_name": "CMSIS/Flash/STM32H7xx_MT25TL01G_DUAL.FLM",
"ram_size": 65524,
"ram_start": 536870912,
"size": 134217728,
"start": 2415919104
},
{
"default": false,
"file_name": "CMSIS/Flash/MT25TL01G_STM32H750B-DISCO.FLM",
"ram_size": 65524,
"ram_start": 536870912,
"size": 134217728,
"start": 2415919104
},
{
"default": false,
"file_name": "CMSIS/Flash/MT25TL01G_STM32H745I-DISCO.FLM",
"ram_size": 65524,
"ram_start": 536870912,
"size": 134217728,
"start": 2415919104
},
{
"default": false,
"file_name": "CMSIS/Flash/STM32H743I-eval_FMC.FLM",
"ram_size": 65524,
"ram_start": 536870912,
"size": 16777216,
"start": 1610612736
} }
], ],
"family": "STM32H7 Series", "family": "STM32H7 Series",
@ -437913,25 +437873,10 @@
"write": false "write": false
}, },
"default": true, "default": true,
"size": 1048576, "size": 2097152,
"start": 134217728, "start": 134217728,
"startup": true "startup": true
}, },
"IROM2": {
"access": {
"execute": true,
"non_secure": false,
"non_secure_callable": false,
"peripheral": false,
"read": true,
"secure": false,
"write": false
},
"default": true,
"size": 1048576,
"start": 135266304,
"startup": true
},
"RAM_D2": { "RAM_D2": {
"access": { "access": {
"execute": true, "execute": true,