mirror of https://github.com/ARMmbed/mbed-os.git
Martin Kojtal
GitHub
commit
aafae5d644
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@ -25,7 +25,7 @@
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* AHBCLK (MHz) | 32
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* APB1CLK (MHz) | 32
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* APB2CLK (MHz) | 32
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* USB capable | NO // todo
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* USB capable | YES
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*-----------------------------------------------------------------------------
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**/
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@ -97,13 +97,14 @@ void SetSysClock(void)
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
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error("HAL_RCC_ClockConfig error\n");
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}
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/** Initializes the peripherals clocks
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*/
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RNG;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
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PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
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PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
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@ -37,7 +37,7 @@
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#if MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG
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#if defined(TARGET_STM32F3) || defined(TARGET_STM32WB)
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#define USBHAL_IRQn USB_HP_IRQn
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#define USBHAL_IRQn USB_LP_IRQn
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#else
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#define USBHAL_IRQn USB_IRQn
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#endif
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@ -50,7 +50,7 @@
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#endif
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#define NB_ENDPOINT 16
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#define NB_ENDPOINT 8
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// #define MAXTRANSFER_SIZE 0x200
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#define MAX_PACKET_SIZE_SETUP (48)
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@ -39,6 +39,7 @@ static const uint32_t tx_ep_sizes[NUM_ENDPOINTS] = {
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MAX_PACKET_SIZE_ISO
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};
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#if (MBED_CONF_TARGET_USB_SPEED != USE_USB_NO_OTG)
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uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo)
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{
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uint32_t len;
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@ -49,15 +50,23 @@ uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo)
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}
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return len * 4;
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}
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#endif
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/* weak function redefinition */
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void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
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{
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USBPhyHw *priv = ((USBPhyHw *)(hpcd->pData));
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#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG)
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if (priv->sof_enabled) {
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priv->events->sof((hpcd->Instance->FNR) & USB_FNR_FN);
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}
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#else
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USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
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uint32_t USBx_BASE = (uint32_t)USBx;
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if (priv->sof_enabled) {
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priv->events->sof((USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF) >> 8);
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}
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#endif
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}
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/* this call at device reception completion on a Out Enpoint */
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@ -244,7 +253,37 @@ void USBPhyHw::init(USBPhyEvents *events)
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HAL_StatusTypeDef ret = HAL_PCD_Init(&hpcd);
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MBED_ASSERT(ret == HAL_OK);
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// Configure FIFOs
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#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG)
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// EP0
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#define PMA_EP0_OUT_ADDR (8 * 4)
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#define PMA_EP0_IN_ADDR (PMA_EP0_OUT_ADDR + MAX_PACKET_SIZE_EP0)
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HAL_PCDEx_PMAConfig(&hpcd, LOG_OUT_TO_EP(0), PCD_SNG_BUF, PMA_EP0_OUT_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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HAL_PCDEx_PMAConfig(&hpcd, LOG_IN_TO_EP(0), PCD_SNG_BUF, PMA_EP0_IN_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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// EP1
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#define PMA_EP1_OUT_BASE (PMA_EP0_IN_ADDR + MAX_PACKET_SIZE_EP0)
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#define PMA_EP1_OUT_ADDR ((PMA_EP1_OUT_BASE + MAX_PACKET_SIZE_NON_ISO) | (PMA_EP1_OUT_BASE << 16U))
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#define PMA_EP1_IN_ADDR (PMA_EP1_OUT_BASE + MAX_PACKET_SIZE_NON_ISO)
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#define PMA_EP1_CMD_ADDR (PMA_EP1_IN_ADDR + MAX_PACKET_SIZE_NON_ISO)
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HAL_PCDEx_PMAConfig(&hpcd, LOG_OUT_TO_EP(1), PCD_SNG_BUF, PMA_EP1_OUT_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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HAL_PCDEx_PMAConfig(&hpcd, LOG_IN_TO_EP(1), PCD_SNG_BUF, PMA_EP1_CMD_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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// EP2
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#define PMA_EP2_OUT_BASE (PMA_EP1_IN_ADDR + MAX_PACKET_SIZE_NON_ISO)
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#define PMA_EP2_OUT_ADDR ((PMA_EP2_OUT_BASE + MAX_PACKET_SIZE_NON_ISO) | (PMA_EP2_OUT_BASE << 16U))
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#define PMA_EP2_IN_ADDR (PMA_EP2_OUT_BASE + MAX_PACKET_SIZE_NON_ISO * 2)
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#define PMA_EP2_CMD_ADDR (PMA_EP2_IN_ADDR + MAX_PACKET_SIZE_NON_ISO)
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HAL_PCDEx_PMAConfig(&hpcd, LOG_OUT_TO_EP(2), PCD_DBL_BUF, PMA_EP2_OUT_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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HAL_PCDEx_PMAConfig(&hpcd, LOG_IN_TO_EP(2), PCD_SNG_BUF, PMA_EP2_CMD_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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// EP3
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#define PMA_EP3_OUT_BASE (PMA_EP2_IN_ADDR + MAX_PACKET_SIZE_NON_ISO)
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#define PMA_EP3_OUT_ADDR ((PMA_EP3_OUT_BASE + MAX_PACKET_SIZE_ISO) | (PMA_EP3_OUT_BASE << 16U))
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#define PMA_EP3_IN_ADDR (PMA_EP3_OUT_BASE + MAX_PACKET_SIZE_ISO)
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#define PMA_EP3_CMD_ADDR (PMA_EP3_IN_ADDR + MAX_PACKET_SIZE_ISO)
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HAL_PCDEx_PMAConfig(&hpcd, LOG_OUT_TO_EP(3), PCD_SNG_BUF, PMA_EP3_OUT_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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HAL_PCDEx_PMAConfig(&hpcd, LOG_IN_TO_EP(3), PCD_SNG_BUF, PMA_EP3_CMD_ADDR); // HAL_PCDEx_PMAConfig always returns HAL_OK
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#else
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uint32_t total_bytes = 0;
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/* Reserve space in the RX buffer for:
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@ -266,6 +305,7 @@ void USBPhyHw::init(USBPhyEvents *events)
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/* 1.25 kbytes */
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MBED_ASSERT(total_bytes <= 1280);
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#endif
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// Configure interrupt vector
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NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr);
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@ -293,8 +333,21 @@ bool USBPhyHw::powered()
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void USBPhyHw::connect()
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{
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#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG)
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DigitalOut usb_disc_pin(USB_DP, 1) ;
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wait_ns(1000);
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usb_disc_pin = 0;
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uint32_t wInterrupt_Mask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM |
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USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM;
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/*Set interrupt mask*/
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hpcd.Instance->CNTR = wInterrupt_Mask;
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HAL_PCD_DevConnect(&hpcd); // HAL_PCD_DevConnect always return HAL_OK
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wait_us(10000);
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#else
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HAL_StatusTypeDef ret = HAL_PCD_Start(&hpcd);
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MBED_ASSERT(ret == HAL_OK);
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#endif
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}
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void USBPhyHw::disconnect()
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@ -405,6 +458,7 @@ void USBPhyHw::ep0_stall()
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bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type)
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{
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#if (MBED_CONF_TARGET_USB_SPEED != USE_USB_NO_OTG)
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uint32_t len;
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/*
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@ -415,6 +469,8 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_
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len = HAL_PCDEx_GetTxFiFo(&hpcd, endpoint & 0x7f);
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MBED_ASSERT(len >= max_packet);
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}
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#endif
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HAL_StatusTypeDef ret = HAL_PCD_EP_Open(&hpcd, endpoint, max_packet, type);
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MBED_ASSERT(ret != HAL_BUSY);
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return (ret == HAL_OK) ? true : false;
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@ -2197,6 +2197,10 @@
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"value": "PA_7",
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"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
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},
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"usb_speed": {
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"help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS",
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"value": "USE_USB_OTG_FS"
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},
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"clock_source": {
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"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
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"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
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@ -2218,7 +2222,8 @@
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"SERIAL_ASYNCH",
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"TRNG",
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"FLASH",
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"MPU"
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"MPU",
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"USBDEVICE"
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],
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"detect_code": [
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"0797"
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@ -4155,6 +4160,7 @@
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"SERIAL_FC",
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"TRNG",
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"FLASH",
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"USBDEVICE",
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"MPU"
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],
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"device_name": "STM32WB55RGVx",
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