mirror of https://github.com/ARMmbed/mbed-os.git
COMPONENT_BlueNRG_MS cleanup
- use of json config - add license header - update ReadMe - remove mbed.h - astylepull/12456/head
jeromecoutant
parent
a9135a1971
commit
aa66ae52bc
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@ -1,15 +1,43 @@
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/*
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* Copyright (c) 2017-2020 ARM Limited
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* Copyright (c) 2017-2020 STMicroelectronics
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdio.h>
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// drivers
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#include "drivers/DigitalOut.h"
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#include "drivers/SPI.h"
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#include "drivers/InterruptIn.h"
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// platform
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#include "platform/mbed_wait_api.h"
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// FEATURE_BLE/targets/TARGET_CORDIO
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#include "CordioBLE.h"
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#include "CordioHCIDriver.h"
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#include "CordioHCITransportDriver.h"
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#include "mbed.h"
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#include "hci_api.h"
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#include "hci_cmd.h"
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#include "hci_core.h"
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#include "dm_api.h"
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#include "bstream.h"
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#include "hci_mbed_os_adaptation.h"
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#include "bluenrg_targets.h"
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// rtos
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#include "Thread.h"
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#include "Semaphore.h"
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#include "Mutex.h"
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@ -38,8 +66,7 @@ namespace bluenrg {
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* BlueNRG HCI driver implementation.
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* @see cordio::CordioHCIDriver
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*/
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class HCIDriver : public cordio::CordioHCIDriver
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{
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class HCIDriver : public cordio::CordioHCIDriver {
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public:
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/**
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* Construction of the BlueNRG HCIDriver.
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@ -52,7 +79,8 @@ public:
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/**
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* @see CordioHCIDriver::do_initialize
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*/
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virtual void do_initialize() {
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virtual void do_initialize()
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{
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bluenrg_reset();
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}
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@ -68,7 +96,8 @@ public:
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/**
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* @see CordioHCIDriver::start_reset_sequence
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*/
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virtual void start_reset_sequence() {
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virtual void start_reset_sequence()
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{
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reset_received = false;
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bluenrg_initialized = false;
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enable_link_layer_mode_ongoing = false;
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@ -79,21 +108,21 @@ public:
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/**
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* @see CordioHCIDriver::do_terminate
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*/
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virtual void do_terminate() {
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virtual void do_terminate()
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{
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}
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/**
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* @see CordioHCIDriver::handle_reset_sequence
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*/
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virtual void handle_reset_sequence(uint8_t *pMsg) {
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virtual void handle_reset_sequence(uint8_t *pMsg)
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{
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uint16_t opcode;
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static uint8_t randCnt;
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//wait_ms(5);
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/* if event is a command complete event */
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if (*pMsg == HCI_CMD_CMPL_EVT)
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{
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if (*pMsg == HCI_CMD_CMPL_EVT) {
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/* parse parameters */
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pMsg += HCI_EVT_HDR_LEN;
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pMsg++; /* skip num packets */
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@ -101,18 +130,17 @@ public:
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pMsg++; /* skip status */
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/* decode opcode */
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switch (opcode)
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{
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switch (opcode) {
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case HCI_OPCODE_RESET: {
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/* initialize rand command count */
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randCnt = 0;
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reset_received = true;
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// important, the bluenrg_initialized event come after the
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// hci reset event (not documented)
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// bluenrg_initialized event has to come after the hci reset event
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bluenrg_initialized = false;
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} break;
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}
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break;
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// ACL packet ...
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// ACL packet
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case ACI_WRITE_CONFIG_DATA_OPCODE:
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if (enable_link_layer_mode_ongoing) {
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enable_link_layer_mode_ongoing = false;
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@ -145,10 +173,9 @@ public:
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break;
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case HCI_OPCODE_LE_SET_EVENT_MASK:
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// Note: the public address is not read because there is no valid public address
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// provisioned by default on the target
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// Enable if the
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#if MBED_CONF_CORDIO_BLUENRG_VALID_PUBLIC_BD_ADDRESS == 1
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// Note: the public address is not read because there is no valid public address provisioned by default on the target
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// You can enable it thanks to json "valid-public-bd-address" config value
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#if MBED_CONF_BLUENRG_MS_VALID_PUBLIC_BD_ADDRESS == 1
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/* send next command in sequence */
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HciReadBdAddrCmd();
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break;
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@ -206,8 +233,7 @@ public:
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hciCoreReadMaxDataLen();
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break;
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case HCI_OPCODE_LE_READ_MAX_DATA_LEN:
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{
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case HCI_OPCODE_LE_READ_MAX_DATA_LEN: {
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uint16_t maxTxOctets;
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uint16_t maxTxTime;
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@ -223,13 +249,10 @@ public:
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break;
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case HCI_OPCODE_LE_WRITE_DEF_DATA_LEN:
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if (hciCoreCb.extResetSeq)
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{
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if (hciCoreCb.extResetSeq) {
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/* send first extended command */
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(*hciCoreCb.extResetSeq)(pMsg, opcode);
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}
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else
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{
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} else {
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/* initialize extended parameters */
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hciCoreCb.maxAdvDataLen = 0;
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hciCoreCb.numSupAdvSets = 0;
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@ -243,8 +266,7 @@ public:
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case HCI_OPCODE_LE_READ_MAX_ADV_DATA_LEN:
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case HCI_OPCODE_LE_READ_NUM_SUP_ADV_SETS:
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case HCI_OPCODE_LE_READ_PER_ADV_LIST_SIZE:
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if (hciCoreCb.extResetSeq)
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{
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if (hciCoreCb.extResetSeq) {
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/* send next extended command in sequence */
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(*hciCoreCb.extResetSeq)(pMsg, opcode);
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}
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@ -252,13 +274,10 @@ public:
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case HCI_OPCODE_LE_RAND:
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/* check if need to send second rand command */
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if (randCnt < (HCI_RESET_RAND_CNT-1))
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{
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if (randCnt < (HCI_RESET_RAND_CNT - 1)) {
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randCnt++;
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HciLeRandCmd();
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}
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else
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{
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} else {
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signal_reset_sequence_done();
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}
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break;
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@ -290,20 +309,23 @@ public:
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}
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private:
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void aciEnableLinkLayerModeOnly() {
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void aciEnableLinkLayerModeOnly()
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{
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uint8_t data[1] = { 0x01 };
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enable_link_layer_mode_ongoing = true;
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aciWriteConfigData(LL_WITHOUT_HOST_OFFSET, data);
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}
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void aciSetRole() {
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void aciSetRole()
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{
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// master and slave, simultaneous advertising and scanning
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// (up to 4 connections)
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uint8_t data[1] = { 0x04 };
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aciWriteConfigData(ROLE_OFFSET, data);
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}
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void aciGattInit() {
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void aciGattInit()
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_GATT_INIT_OPCODE, 0);
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if (!pBuf) {
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return;
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@ -311,7 +333,8 @@ private:
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hciCmdSend(pBuf);
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}
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void aciGapInit() {
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void aciGapInit()
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_GAP_INIT_OPCODE, 3);
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if (!pBuf) {
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return;
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@ -322,7 +345,8 @@ private:
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hciCmdSend(pBuf);
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}
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void aciReadConfigParameter(uint8_t offset) {
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void aciReadConfigParameter(uint8_t offset)
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_READ_CONFIG_DATA_OPCODE, 1);
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if (!pBuf) {
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return;
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@ -333,7 +357,8 @@ private:
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}
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template<size_t N>
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void aciWriteConfigData(uint8_t offset, uint8_t (&buf)[N]) {
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void aciWriteConfigData(uint8_t offset, uint8_t (&buf)[N])
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_WRITE_CONFIG_DATA_OPCODE, 2 + N);
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if (!pBuf) {
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return;
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{
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/* if LL Privacy is supported by Controller and included */
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if ((hciCoreCb.leSupFeat & HCI_LE_SUP_FEAT_PRIVACY) &&
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(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_PRIVACY))
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{
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(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_PRIVACY)) {
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/* send next command in sequence */
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HciLeReadResolvingListSize();
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}
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else
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{
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} else {
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hciCoreCb.resListSize = 0;
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/* send next command in sequence */
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{
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/* if LE Data Packet Length Extensions is supported by Controller and included */
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if ((hciCoreCb.leSupFeat & HCI_LE_SUP_FEAT_DATA_LEN_EXT) &&
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(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_DATA_LEN_EXT))
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{
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(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_DATA_LEN_EXT)) {
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/* send next command in sequence */
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HciLeReadMaxDataLen();
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}
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else
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{
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} else {
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/* send next command in sequence */
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HciLeRandCmd();
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}
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}
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void bluenrg_reset() {
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void bluenrg_reset()
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{
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/* Reset BlueNRG SPI interface. Hold reset line to 0 for 1500ms */
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rst = 0;
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wait_us(1500);
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@ -389,7 +409,7 @@ private:
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wait_us(100000);
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}
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DigitalOut rst;
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mbed::DigitalOut rst;
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bool reset_received;
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bool bluenrg_initialized;
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bool enable_link_layer_mode_ongoing;
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@ -425,8 +445,9 @@ public:
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* @param irq Pin used by the module to signal data are available.
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*/
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TransportDriver(PinName mosi, PinName miso, PinName sclk, PinName ncs, PinName irq)
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: spi(mosi, miso, sclk), nCS(ncs), irq(irq), _spi_thread(osPriorityNormal, SPI_STACK_SIZE, _spi_thread_stack) {
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_spi_thread.start(callback(this, &TransportDriver::spi_read_cb));
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: spi(mosi, miso, sclk), nCS(ncs), irq(irq), _spi_thread(osPriorityNormal, SPI_STACK_SIZE, _spi_thread_stack)
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{
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_spi_thread.start(mbed::callback(this, &TransportDriver::spi_read_cb));
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}
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virtual ~TransportDriver() { }
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@ -434,7 +455,8 @@ public:
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/**
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* @see CordioHCITransportDriver::initialize
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*/
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virtual void initialize() {
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virtual void initialize()
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{
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// Setup the spi for 8 bit data, low clock polarity,
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// 1-edge phase, with an 8MHz clock rate
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spi.format(8, 0);
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@ -447,7 +469,7 @@ public:
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// Set the interrupt handler for the device
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irq.mode(PullDown); // set irq mode
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irq.rise(callback(this, &TransportDriver::HCI_Isr));
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irq.rise(mbed::callback(this, &TransportDriver::HCI_Isr));
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}
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/**
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@ -458,7 +480,8 @@ public:
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/**
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* @see CordioHCITransportDriver::write
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*/
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virtual uint16_t write(uint8_t type, uint16_t len, uint8_t *pData) {
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virtual uint16_t write(uint8_t type, uint16_t len, uint8_t *pData)
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{
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// repeat write until successfull. A number of attempt or timeout might
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// be useful
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while (spiWrite(type, pData, len) == 0) { }
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@ -466,7 +489,8 @@ public:
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}
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private:
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uint16_t spiWrite(uint8_t type, const uint8_t* data, uint16_t data_length) {
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uint16_t spiWrite(uint8_t type, const uint8_t *data, uint16_t data_length)
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{
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static const uint8_t header_master[] = {
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0x0A, 0x00, 0x00, 0x00, 0x00
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};
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@ -549,7 +573,8 @@ private:
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_spi_read_sem.release();
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}
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void spi_read_cb() {
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void spi_read_cb()
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{
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uint8_t data_buffer[256];
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while (true) {
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_spi_read_sem.acquire();
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@ -567,8 +592,8 @@ private:
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* Unsafe SPI, does not lock when SPI access happens.
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*/
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::mbed::SPI spi;
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DigitalOut nCS;
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InterruptIn irq;
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mbed::DigitalOut nCS;
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mbed::InterruptIn irq;
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rtos::Thread _spi_thread;
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uint8_t _spi_thread_stack[SPI_STACK_SIZE];
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rtos::Semaphore _spi_read_sem;
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@ -582,17 +607,18 @@ private:
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/**
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* Cordio HCI driver factory
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*/
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ble::vendor::cordio::CordioHCIDriver& ble_cordio_get_hci_driver() {
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ble::vendor::cordio::CordioHCIDriver &ble_cordio_get_hci_driver()
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{
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static ble::vendor::bluenrg::TransportDriver transport_driver(
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BLUENRG_PIN_SPI_MOSI,
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BLUENRG_PIN_SPI_MISO,
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BLUENRG_PIN_SPI_SCK,
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BLUENRG_PIN_SPI_nCS,
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BLUENRG_PIN_SPI_IRQ
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MBED_CONF_BLUENRG_MS_SPI_MOSI,
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MBED_CONF_BLUENRG_MS_SPI_MISO,
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MBED_CONF_BLUENRG_MS_SPI_SCK,
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MBED_CONF_BLUENRG_MS_SPI_NCS,
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MBED_CONF_BLUENRG_MS_SPI_IRQ
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);
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static ble::vendor::bluenrg::HCIDriver hci_driver(
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transport_driver,
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BLUENRG_PIN_SPI_RESET
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MBED_CONF_BLUENRG_MS_SPI_RESET
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);
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return hci_driver;
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}
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@ -1,13 +1,69 @@
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# Cordio BLE-X-NUCLEO-IDB0XA1
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# BlueNRG_MS
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BLE_API wrapper Library for X-NUCLEO-IDB05A1 BlueNRG (Bluetooth Low Energy) Expansion Board. It uses ARM Cordio stack instead of the ST BlueNRG stack.
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BLE API wrapper Library for BlueNRG (Bluetooth Low Energy)
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## Introduction
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Maybe a simple table like this could help:
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This firmware package implements the port of BLE_API to STMicroelectronics' [X-NUCLEO-IDB05A1](https://developer.mbed.org/components/X-NUCLEO-IDB05A1-Bluetooth-Low-Energy/) Bluetooth Low Energy Nucleo Expansion Board.
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|Name|Type|Bluetooth compliance|Status|Used in shields & boards|Link|
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|-----------|----------|-----|-|-|-|
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|SPBTLE-RF |Module |v4.1 |Not recommended for new designs |X-NUCLEO-IDB05A1, DISCO-L475VG-IOT01A, DISCO-L562QE | https://www.st.com/en/wireless-transceivers-mcus-and-modules/spbtle-rf.html |
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|BlueNRG-M0 |Module |v4.2 |Active (included in ST's Longevity Program) |No | https://www.st.com/en/wireless-transceivers-mcus-and-modules/bluenrg-m0.html |
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|BlueNRG-MS |Processor |v4.2 |Active (included in ST's Longevity Program) |X-NUCLEO-IDB05A2 (coming soon) | https://www.st.com/en/wireless-transceivers-mcus-and-modules/bluenrg-ms.html |
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It uses ARM Cordio stack instead of the ST BlueNRG stack.
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## History
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- deprecated ST BLE port: https://github.com/ARMmbed/ble-x-nucleo-idb0xa1
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- deprecated X-NUCLEO-IDB05A1 BlueNRG : https://github.com/ARMmbed/cordio-ble-x-nucleo-idb0xa1
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## Boards
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### X-NUCLEO-IDB05A1
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Bluetooth Low Energy Nucleo Expansion Board:
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https://developer.mbed.org/components/X-NUCLEO-IDB05A1-Bluetooth-Low-Energy/
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### DISCO-L475VG-IOT01A
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STM32L4 Discovery kit IoT node, low-power wireless, Bluetooth V4.1 module (SPBTLE-RF)
|
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https://os.mbed.com/platforms/ST-Discovery-L475E-IOT01A/
|
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|
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### DISCO-L562QE
|
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||||
STM32L562E-DK Discovery kit with Bluetooth V4.1 low energy module and Arm Cortex-M33 with TrustZone
|
||||
|
||||
https://os.mbed.com/platforms/ST-Discovery-L562QE/
|
||||
|
||||
|
||||
## Driver configuration
|
||||
|
||||
In order to use the BlueNRG-MS module together with other targets,
|
||||
you may need to override default settings in your local `mbed_app.json` file
|
||||
|
||||
### ST-DISCO boards
|
||||
|
||||
Default settings for `DISCO-L475VG-IOT01A` and `DISCO-L562QE` are configured
|
||||
|
||||
### Arduino Connector Compatibility Warning
|
||||
|
||||
Default Arduino connection is using:
|
||||
|
||||
```
|
||||
"SPI_MOSI": "D11",
|
||||
"SPI_MISO": "D12",
|
||||
"SPI_nCS": "A1",
|
||||
"SPI_RESET": "D7",
|
||||
"SPI_IRQ": "A0",
|
||||
"SPI_SCK": "D3",
|
||||
"valid-public-bd-address": false
|
||||
```
|
||||
|
||||
X-NUCLEO-IDB05A1 is Arduino compatible with an exception: instead of using pin **D13** for the SPI clock, pin **D3** is used.
|
||||
The default configuration for this library is having the SPI clock on pin **D3**.
|
||||
|
||||
|
|
@ -15,31 +71,47 @@ To be fully Arduino compatible, X-NUCLEO-IDB05A1 needs a small HW patch.
|
|||
|
||||
For X-NUCLEO-IDB05A1 this patch consists in removing zero resistor **R4** and instead soldering zero resistor **R6**.
|
||||
|
||||
In case you patch your board, then you also have to configure this library to use pin **D13** to drive the SPI clock. To this aim you need to compile this driver with macro `BLUENRG_PIN_SPI_SCK=D13` defined.
|
||||
In case you patch your board, then you also have to configure this library to use pin **D13** to drive the SPI clock.
|
||||
To this aim you need to update your local mbed_app.json file with:
|
||||
|
||||
If you use pin **D13** for the SPI clock, please be aware that on STM32 Nucleo boards you may **not** drive the LED, otherwise you will get a conflict: the LED on STM32 Nucleo boards is connected to pin **D13**.
|
||||
```
|
||||
"target_overrides": {
|
||||
"XXXX": {
|
||||
"bluenrg_ms.SPI_SCK": "D13"
|
||||
},
|
||||
```
|
||||
|
||||
Referring to the current list of tested platforms (see [X-NUCLEO-IDB05A1](https://developer.mbed.org/components/X-NUCLEO-IDB05A1-Bluetooth-Low-Energy/) page), the patch is required by [ST-Nucleo-F103RB](https://developer.mbed.org/platforms/ST-Nucleo-F103RB/); [ST-Nucleo-F302R8](https://developer.mbed.org/platforms/ST-Nucleo-F302R8/); [ST-Nucleo-F411RE](https://developer.mbed.org/platforms/ST-Nucleo-F411RE/); [ST-Nucleo-F446RE](https://developer.mbed.org/platforms/ST-Nucleo-F446RE/); and [FRDM-K64F](https://developer.mbed.org/platforms/FRDM-K64F/).
|
||||
If you use pin **D13** for the SPI clock, please be aware that on some STM32 Nucleo boards you may **not** drive the LED,
|
||||
otherwise you will get a conflict: the LED on STM32 Nucleo boards is connected to pin **D13**.
|
||||
|
||||
Referring to the current list of tested platforms (see [X-NUCLEO-IDB05A1](https://developer.mbed.org/components/X-NUCLEO-IDB05A1-Bluetooth-Low-Energy/) page),
|
||||
the patch is required for
|
||||
- [ST-Nucleo-F103RB](https://developer.mbed.org/platforms/ST-Nucleo-F103RB/)
|
||||
- [ST-Nucleo-F302R8](https://developer.mbed.org/platforms/ST-Nucleo-F302R8/)
|
||||
- [ST-Nucleo-F411RE](https://developer.mbed.org/platforms/ST-Nucleo-F411RE/)
|
||||
- [ST-Nucleo-F446RE](https://developer.mbed.org/platforms/ST-Nucleo-F446RE/)
|
||||
- [FRDM-K64F](https://developer.mbed.org/platforms/FRDM-K64F/)
|
||||
|
||||
### Driver configuration
|
||||
|
||||
In order to use the BlueNRG-MS module together with other targets, you need to set the macros defined in file [bluenrg_targets.h](https://github.com/ARMmbed/ble-x-nucleo-idb0xa1/blob/master/bluenrg/bluenrg_targets.h). Please, update the [mbed_lib.json](https://github.com/ARMmbed/ble-x-nucleo-idb0xa1/blob/master/mbed_lib.json) to include the list of extra macros that configure the driver for your target.
|
||||
|
||||
## Target Configuration
|
||||
### Target Configuration
|
||||
|
||||
To use that library, the target requires some extra configuration in the application `mbed_app.json`. In the `target_overides` section:
|
||||
|
||||
* BLE feature has to be enabled for the target using the BlueNRG module
|
||||
* BLE feature has to be enabled
|
||||
|
||||
```json
|
||||
"target.features_add": ["BLE"]
|
||||
```
|
||||
|
||||
* BlueNRG module has to be enabled
|
||||
|
||||
```json
|
||||
"target.components_add": ["BlueNRG_MS"]
|
||||
```
|
||||
|
||||
* Extra labels have to be defined to include the cordio stack and this library:
|
||||
|
||||
```json
|
||||
"target.extra_labels_add": ["CORDIO", "CORDIO_BLUENRG"]
|
||||
"target.extra_labels_add": ["CORDIO"]
|
||||
```
|
||||
|
||||
As an example, the target overide section for the `NUCLEO_F401RE` would be:
|
||||
|
|
@ -47,6 +119,7 @@ As an example, the target overide section for the `NUCLEO_F401RE` would be:
|
|||
```json
|
||||
"NUCLEO_F401RE": {
|
||||
"target.features_add": ["BLE"],
|
||||
"target.extra_labels_add": ["CORDIO", "CORDIO_BLUENRG"]
|
||||
"target.components_add": ["BlueNRG_MS"],
|
||||
"target.extra_labels_add": ["CORDIO"]
|
||||
}
|
||||
```
|
||||
|
|
|
|||
|
|
@ -1,65 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file bluenrg_targets.h
|
||||
* @author AST / EST
|
||||
* @version V0.0.1
|
||||
* @date 24-July-2015
|
||||
* @brief This header file is intended to manage the differences between
|
||||
* the different supported base-boards which might mount the
|
||||
* X_NUCLEO_IDB0XA1 BlueNRG BLE Expansion Board.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent from recursive inclusion --------------------------------*/
|
||||
#ifndef _BLUENRG_TARGETS_H_
|
||||
#define _BLUENRG_TARGETS_H_
|
||||
|
||||
#if !defined(BLUENRG_PIN_SPI_MOSI)
|
||||
#define BLUENRG_PIN_SPI_MOSI (D11)
|
||||
#endif
|
||||
#if !defined(BLUENRG_PIN_SPI_MISO)
|
||||
#define BLUENRG_PIN_SPI_MISO (D12)
|
||||
#endif
|
||||
#if !defined(BLUENRG_PIN_SPI_nCS)
|
||||
#define BLUENRG_PIN_SPI_nCS (A1)
|
||||
#endif
|
||||
#if !defined(BLUENRG_PIN_SPI_RESET)
|
||||
#define BLUENRG_PIN_SPI_RESET (D7)
|
||||
#endif
|
||||
#if !defined(BLUENRG_PIN_SPI_IRQ)
|
||||
#define BLUENRG_PIN_SPI_IRQ (A0)
|
||||
#endif
|
||||
|
||||
/* NOTE: Refer to README for further details regarding BLUENRG_PIN_SPI_SCK */
|
||||
#if !defined(BLUENRG_PIN_SPI_SCK)
|
||||
#define BLUENRG_PIN_SPI_SCK (D3)
|
||||
#endif
|
||||
|
||||
#endif // _BLUENRG_TARGTES_H_
|
||||
|
|
@ -1,6 +1,12 @@
|
|||
{
|
||||
"name": "cordio_bluenrg",
|
||||
"name": "bluenrg_ms",
|
||||
"config": {
|
||||
"SPI_MOSI": "D11",
|
||||
"SPI_MISO": "D12",
|
||||
"SPI_nCS": "A1",
|
||||
"SPI_RESET": "D7",
|
||||
"SPI_IRQ": "A0",
|
||||
"SPI_SCK": "D3",
|
||||
"valid-public-bd-address": {
|
||||
"help": "Read the BD public address at startup",
|
||||
"value": false
|
||||
|
|
@ -8,17 +14,23 @@
|
|||
},
|
||||
"target_overrides": {
|
||||
"K64F": {
|
||||
"target.macros_add": ["BLUENRG_PIN_SPI_SCK=D13"]
|
||||
"SPI_SCK": "D13"
|
||||
},
|
||||
"DISCO_L475VG_IOT01A": {
|
||||
"target.macros_add": [
|
||||
"BLUENRG_PIN_SPI_MOSI=PC_12",
|
||||
"BLUENRG_PIN_SPI_MISO=PC_11",
|
||||
"BLUENRG_PIN_SPI_nCS=PD_13",
|
||||
"BLUENRG_PIN_SPI_RESET=PA_8",
|
||||
"BLUENRG_PIN_SPI_IRQ=PE_6",
|
||||
"BLUENRG_PIN_SPI_SCK=PC_10"
|
||||
]
|
||||
"SPI_MOSI": "PC_12",
|
||||
"SPI_MISO": "PC_11",
|
||||
"SPI_nCS": "PD_13",
|
||||
"SPI_RESET": "PA_8",
|
||||
"SPI_IRQ": "PE_6",
|
||||
"SPI_SCK": "PC_10"
|
||||
},
|
||||
"DISCO_L562QE": {
|
||||
"SPI_MOSI": "PG_4",
|
||||
"SPI_MISO": "PG_3",
|
||||
"SPI_nCS": "PG_5",
|
||||
"SPI_RESET": "PG_8",
|
||||
"SPI_IRQ": "PG_6",
|
||||
"SPI_SCK": "PG_2"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue