diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s
index 236b19b523..84df623515 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s
@@ -1,59 +1,46 @@
-;/**************************************************************************//**
-; * @file startup_LPC11xx.s
-; * @brief CMSIS Cortex-M0 Core Device Startup File
-; * for the NXP LPC11xx/LPC11Cxx Device Series
-; * @version V1.10
-; * @date 24. November 2010
+;/*****************************************************************************
+; * @file: startup_LPC11xx.s
+; * @purpose: CMSIS Cortex-M0 Core Device Startup File
+; * for the NXP LPC11xx Device Series
+; * @version: V1.0
+; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
-; * @note
-; * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
-; *
-; * @par
-; * ARM Limited (ARM) is supplying this software for use with Cortex-M
+; * Copyright (C) 2008 ARM Limited. All rights reserved.
+; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
-; * @par
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
-; ******************************************************************************/
+; *****************************************************************************/
-
-; Stack Configuration
-; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Stack_Size EQU 0x00000200
+Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
EXPORT __initial_sp
+
Stack_Mem SPACE Stack_Size
-__initial_sp EQU 0x10001000 ; Top of RAM from LPC1114
+__initial_sp EQU 0x10001000 ; Top of RAM from LPC1114
-; Heap Configuration
-; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
EXPORT __heap_base
EXPORT __heap_limit
+
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
-
PRESERVE8
THUMB
-
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
@@ -76,41 +63,129 @@ __Vectors DCD __initial_sp ; Top of Stack
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
- ; External Interrupts
- DCD WAKEUP_IRQHandler ; 16+ 0: Wakeup PIO0.0
- DCD WAKEUP_IRQHandler ; 16+ 1: Wakeup PIO0.1
- DCD WAKEUP_IRQHandler ; 16+ 2: Wakeup PIO0.2
- DCD WAKEUP_IRQHandler ; 16+ 3: Wakeup PIO0.3
- DCD WAKEUP_IRQHandler ; 16+ 4: Wakeup PIO0.4
- DCD WAKEUP_IRQHandler ; 16+ 5: Wakeup PIO0.5
- DCD WAKEUP_IRQHandler ; 16+ 6: Wakeup PIO0.6
- DCD WAKEUP_IRQHandler ; 16+ 7: Wakeup PIO0.7
- DCD WAKEUP_IRQHandler ; 16+ 8: Wakeup PIO0.8
- DCD WAKEUP_IRQHandler ; 16+ 9: Wakeup PIO0.9
- DCD WAKEUP_IRQHandler ; 16+10: Wakeup PIO0.10
- DCD WAKEUP_IRQHandler ; 16+11: Wakeup PIO0.11
- DCD WAKEUP_IRQHandler ; 16+12: Wakeup PIO1.0
- DCD CAN_IRQHandler ; 16+13: CAN
- DCD SSP1_IRQHandler ; 16+14: SSP1
- DCD I2C_IRQHandler ; 16+15: I2C
- DCD TIMER16_0_IRQHandler ; 16+16: 16-bit Counter-Timer 0
- DCD TIMER16_1_IRQHandler ; 16+17: 16-bit Counter-Timer 1
- DCD TIMER32_0_IRQHandler ; 16+18: 32-bit Counter-Timer 0
- DCD TIMER32_1_IRQHandler ; 16+19: 32-bit Counter-Timer 1
- DCD SSP0_IRQHandler ; 16+20: SSP0
- DCD UART_IRQHandler ; 16+21: UART
- DCD USB_IRQHandler ; 16+22: USB IRQ
- DCD USB_FIQHandler ; 16+24: USB FIQ
- DCD ADC_IRQHandler ; 16+24: A/D Converter
- DCD WDT_IRQHandler ; 16+25: Watchdog Timer
- DCD BOD_IRQHandler ; 16+26: Brown Out Detect
- DCD FMC_IRQHandler ; 16+27: IP2111 Flash Memory Controller
- DCD PIOINT3_IRQHandler ; 16+28: PIO INT3
- DCD PIOINT2_IRQHandler ; 16+29: PIO INT2
- DCD PIOINT1_IRQHandler ; 16+30: PIO INT1
- DCD PIOINT0_IRQHandler ; 16+31: PIO INT0
+ DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
+ DCD FLEX_INT1_IRQHandler ;
+ DCD FLEX_INT2_IRQHandler ;
+ DCD FLEX_INT3_IRQHandler ;
+ DCD FLEX_INT4_IRQHandler ;
+ DCD FLEX_INT5_IRQHandler ;
+ DCD FLEX_INT6_IRQHandler ;
+ DCD FLEX_INT7_IRQHandler ;
+ DCD GINT0_IRQHandler ;
+ DCD GINT1_IRQHandler ; PIO0 (0:7)
+ DCD Reserved_IRQHandler ; Reserved
+ DCD Reserved_IRQHandler ;
+ DCD Reserved_IRQHandler ;
+ DCD Reserved_IRQHandler ;
+ DCD SSP1_IRQHandler ; SSP1
+ DCD I2C_IRQHandler ; I2C
+ DCD TIMER16_0_IRQHandler ; 16-bit Timer0
+ DCD TIMER16_1_IRQHandler ; 16-bit Timer1
+ DCD TIMER32_0_IRQHandler ; 32-bit Timer0
+ DCD TIMER32_1_IRQHandler ; 32-bit Timer1
+ DCD SSP0_IRQHandler ; SSP0
+ DCD UART_IRQHandler ; UART
+ DCD USB_IRQHandler ; USB IRQ
+ DCD USB_FIQHandler ; USB FIQ
+ DCD ADC_IRQHandler ; A/D Converter
+ DCD WDT_IRQHandler ; Watchdog timer
+ DCD BOD_IRQHandler ; Brown Out Detect
+ DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
+ DCD Reserved_IRQHandler ; Reserved
+ DCD Reserved_IRQHandler ; Reserved
+ DCD Reserved_IRQHandler ; Reserved
+ DCD Reserved_IRQHandler ; Reserved
+
+ ;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
+
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+ DCD 0xFFFFFFFF ; Datafill
+
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
@@ -120,6 +195,7 @@ CRP_Key DCD 0xFFFFFFFF
AREA |.text|, CODE, READONLY
+
; Reset Handler
Reset_Handler PROC
@@ -132,13 +208,14 @@ Reset_Handler PROC
BX R0
ENDP
-
; Dummy Exception Handlers (infinite loops which can be modified)
-NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
+; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
+; for particular peripheral.
+;NMI_Handler PROC
+; EXPORT NMI_Handler [WEAK]
+; B .
+; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
@@ -156,11 +233,24 @@ SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
+Reserved_IRQHandler PROC
+ EXPORT Reserved_IRQHandler [WEAK]
+ B .
+ ENDP
Default_Handler PROC
-
- EXPORT WAKEUP_IRQHandler [WEAK]
- EXPORT CAN_IRQHandler [WEAK]
+; for LPC11Uxx (With USB)
+ EXPORT NMI_Handler [WEAK]
+ EXPORT FLEX_INT0_IRQHandler [WEAK]
+ EXPORT FLEX_INT1_IRQHandler [WEAK]
+ EXPORT FLEX_INT2_IRQHandler [WEAK]
+ EXPORT FLEX_INT3_IRQHandler [WEAK]
+ EXPORT FLEX_INT4_IRQHandler [WEAK]
+ EXPORT FLEX_INT5_IRQHandler [WEAK]
+ EXPORT FLEX_INT6_IRQHandler [WEAK]
+ EXPORT FLEX_INT7_IRQHandler [WEAK]
+ EXPORT GINT0_IRQHandler [WEAK]
+ EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
@@ -169,19 +259,26 @@ Default_Handler PROC
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
+
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
- EXPORT PIOINT3_IRQHandler [WEAK]
- EXPORT PIOINT2_IRQHandler [WEAK]
- EXPORT PIOINT1_IRQHandler [WEAK]
- EXPORT PIOINT0_IRQHandler [WEAK]
+ EXPORT USBWakeup_IRQHandler [WEAK]
-WAKEUP_IRQHandler
-CAN_IRQHandler
+NMI_Handler
+FLEX_INT0_IRQHandler
+FLEX_INT1_IRQHandler
+FLEX_INT2_IRQHandler
+FLEX_INT3_IRQHandler
+FLEX_INT4_IRQHandler
+FLEX_INT5_IRQHandler
+FLEX_INT6_IRQHandler
+FLEX_INT7_IRQHandler
+GINT0_IRQHandler
+GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
@@ -196,19 +293,11 @@ ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
-PIOINT3_IRQHandler
-PIOINT2_IRQHandler
-PIOINT1_IRQHandler
-PIOINT0_IRQHandler
+USBWakeup_IRQHandler
B .
ENDP
ALIGN
-
-; @toyowata removed "User Initial Stack & Heap" block here,
-; since arm.py script doesn't pass -D__MICROLIB definision to armasm.
-; Now, required symbols (__initial_sp etc) were exported in this code.
-
END