diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c b/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c
index 11a7e5a130..277332ccea 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c
@@ -26,14 +26,10 @@
 #include "nu_bitutil.h"
 #include <string.h>
 
-#define NVT_SERIAL_SYNC_ONLY
-
 #if DEVICE_SERIAL_ASYNCH
-#ifndef NVT_SERIAL_SYNC_ONLY
 #include "dma_api.h"
 #include "dma.h"
 #endif
-#endif
 
 struct nu_uart_var {
     uint32_t    ref_cnt;                // Reference count of the H/W module
@@ -176,19 +172,17 @@ static const struct nu_modinit_s uart_modinit_tab[] = {
     {UART_3, UART3_MODULE, CLK_CLKSEL3_UART3SEL_HIRC, CLK_CLKDIV4_UART3(1), UART3_RST, UART3_IRQn, &uart3_var},
     {UART_4, UART4_MODULE, CLK_CLKSEL3_UART4SEL_HIRC, CLK_CLKDIV4_UART4(1), UART4_RST, UART4_IRQn, &uart4_var},
     {UART_5, UART5_MODULE, CLK_CLKSEL3_UART5SEL_HIRC, CLK_CLKDIV4_UART5(1), UART5_RST, UART5_IRQn, &uart5_var},
-    
+
     {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
 };
 
 extern void mbed_sdk_init(void);
 
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-__attribute__((cmse_nonsecure_entry))
 void serial_init(serial_t *obj, PinName tx, PinName rx)
 {
     // NOTE: With armcc, serial_init() gets called from _sys_open() timing of which is before main()/mbed_sdk_init().
     mbed_sdk_init();
-    
+
     // Determine which UART_x the pins are used for
     uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
     uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
@@ -199,36 +193,46 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
-    
+
     if (! var->ref_cnt) {
         do {
-            // Reset this module
-            SYS_ResetModule(modinit->rsetidx);
-    
-            // Select IP clock source
-            CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
-            // Enable IP clock
-            CLK_EnableModuleClock(modinit->clkidx);
+            /* Reset module
+             *
+             * NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
+             */
+            SYS_ResetModule_S(modinit->rsetidx);
+
+            /* Select IP clock source
+             *
+             * NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
+             */
+            CLK_SetModuleClock_S(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
+            
+            /* Enable IP clock
+             *
+             * NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
+             */
+            CLK_EnableModuleClock_S(modinit->clkidx);
 
             pinmap_pinout(tx, PinMap_UART_TX);
             pinmap_pinout(rx, PinMap_UART_RX);
         } while (0);
-            
+
         obj->serial.pin_tx = tx;
         obj->serial.pin_rx = rx;
     }
     var->ref_cnt ++;
-    
+
     // Configure the UART module and set its baudrate
     serial_baud(obj, 9600);
     // Configure data bits, parity, and stop bits
     serial_format(obj, 8, ParityNone, 1);
-    
+
     obj->serial.vec = var->vec;
     obj->serial.irq_en = 0;
-    
+
 #if DEVICE_SERIAL_ASYNCH
     obj->serial.dma_usage_tx = DMA_USAGE_NEVER;
     obj->serial.dma_usage_rx = DMA_USAGE_NEVER;
@@ -242,7 +246,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
         stdio_uart_inited = 1;
         memcpy(&stdio_uart, obj, sizeof(serial_t));
     }
-    
+
     if (var->ref_cnt) {
         // Mark this module to be inited.
         int i = modinit - uart_modinit_tab;
@@ -250,19 +254,17 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
     }
 }
 
-__attribute__((cmse_nonsecure_entry))
 void serial_free(serial_t *obj)
 {
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
-    
+
     var->ref_cnt --;
     if (! var->ref_cnt) {
 #if DEVICE_SERIAL_ASYNCH
-#ifndef NVT_SERIAL_SYNC_ONLY
         if (obj->serial.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
             dma_channel_free(obj->serial.dma_chn_id_tx);
             obj->serial.dma_chn_id_tx = DMA_ERROR_OUT_OF_CHANNELS;
@@ -271,66 +273,73 @@ void serial_free(serial_t *obj)
             dma_channel_free(obj->serial.dma_chn_id_rx);
             obj->serial.dma_chn_id_rx = DMA_ERROR_OUT_OF_CHANNELS;
         }
-#endif        
 #endif
 
         do {
             UART_Close((UART_T *) NU_MODBASE(obj->serial.uart));
-    
+
             UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_THREIEN_Msk | UART_INTEN_RXTOIEN_Msk));
             NVIC_DisableIRQ(modinit->irq_n);
-    
-            // Disable IP clock
-            CLK_DisableModuleClock(modinit->clkidx);
+
+            /* Disable IP clock
+             *
+             * NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
+             */
+            CLK_DisableModuleClock_S(modinit->clkidx);
         } while (0);
     }
-    
+
     if (var->obj == obj) {
         var->obj = NULL;
     }
-    
+
     if (obj->serial.uart == STDIO_UART) {
         stdio_uart_inited = 0;
     }
-    
+
     if (! var->ref_cnt) {
         // Mark this module to be deinited.
         int i = modinit - uart_modinit_tab;
         uart_modinit_mask &= ~(1 << i);
     }
 }
-#endif
 
-void serial_baud(serial_t *obj, int baudrate) {
+void serial_baud(serial_t *obj, int baudrate)
+{
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
     while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
-    
+
     obj->serial.baudrate = baudrate;
     UART_Open((UART_T *) NU_MODBASE(obj->serial.uart), baudrate);
 }
 
-void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
+void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
+{
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
     while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
-    
-    // TODO: Assert for not supported parity and data bits
+
+    // Sanity check arguments
+    MBED_ASSERT((data_bits == 5) || (data_bits == 6) || (data_bits == 7) || (data_bits == 8));
+    MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) || (parity == ParityForced1) || (parity == ParityForced0));
+    MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
+
     obj->serial.databits = data_bits;
     obj->serial.parity = parity;
     obj->serial.stopbits = stop_bits;
-    
+
     uint32_t databits_intern = (data_bits == 5) ? UART_WORD_LEN_5 :
-        (data_bits == 6) ? UART_WORD_LEN_6 :
-        (data_bits == 7) ? UART_WORD_LEN_7 : 
-        UART_WORD_LEN_8;
+                               (data_bits == 6) ? UART_WORD_LEN_6 :
+                               (data_bits == 7) ? UART_WORD_LEN_7 :
+                               UART_WORD_LEN_8;
     uint32_t parity_intern = (parity == ParityOdd || parity == ParityForced1) ? UART_PARITY_ODD :
-        (parity == ParityEven || parity == ParityForced0) ? UART_PARITY_EVEN :
-        UART_PARITY_NONE;
+                             (parity == ParityEven || parity == ParityForced0) ? UART_PARITY_EVEN :
+                             UART_PARITY_NONE;
     uint32_t stopbits_intern = (stop_bits == 2) ? UART_STOP_BIT_2 : UART_STOP_BIT_1;
-    UART_SetLineConfig((UART_T *) NU_MODBASE(obj->serial.uart), 
-        0,  // Don't change baudrate 
-        databits_intern, 
-        parity_intern, 
-        stopbits_intern);
+    UART_SetLineConfig((UART_T *) NU_MODBASE(obj->serial.uart),
+                        0,  // Don't change baudrate
+                        databits_intern,
+                        parity_intern,
+                        stopbits_intern);
 }
 
 #if DEVICE_SERIAL_FC
@@ -338,7 +347,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
 {
     UART_T *uart_base = (UART_T *) NU_MODBASE(obj->serial.uart);
-    
+
     // First, disable flow control completely.
     uart_base->INTEN &= ~(UART_INTEN_ATORTSEN_Msk | UART_INTEN_ATOCTSEN_Msk);
 
@@ -348,7 +357,7 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
         MBED_ASSERT(uart_rts == obj->serial.uart);
         // Enable the pin for RTS function
         pinmap_pinout(rxflow, PinMap_UART_RTS);
-        
+
         // NOTE: Added in M480/M2351. Before configuring RTSACTLV, disable TX/RX.
         uart_base->FUNCSEL |= UART_FUNCSEL_TXRXDIS_Msk;
         while (uart_base->FIFOSTS & UART_FIFOSTS_TXRXACT_Msk);
@@ -356,20 +365,20 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
         uart_base->MODEM |= UART_MODEM_RTSACTLV_Msk;
         // NOTE: Added in M480/M2351. After configuring RTSACTLV, re-enable TX/RX.
         uart_base->FUNCSEL &= ~UART_FUNCSEL_TXRXDIS_Msk;
-        
+
         uart_base->FIFO = (uart_base->FIFO & ~UART_FIFO_RTSTRGLV_Msk) | UART_FIFO_RTSTRGLV_8BYTES;
-        
+
         // Enable RTS
         uart_base->INTEN |= UART_INTEN_ATORTSEN_Msk;
     }
-    
+
     if ((type == FlowControlCTS || type == FlowControlRTSCTS) && txflow != NC)  {
         // Check if CTS pin matches.
         uint32_t uart_cts = pinmap_peripheral(txflow, PinMap_UART_CTS);
         MBED_ASSERT(uart_cts == obj->serial.uart);
         // Enable the pin for CTS function
         pinmap_pinout(txflow, PinMap_UART_CTS);
-        
+
         // NOTE: Added in M480/M2351. Before configuring CTSACTLV, disable TX/RX.
         uart_base->FUNCSEL |= UART_FUNCSEL_TXRXDIS_Msk;
         while (uart_base->FIFOSTS & UART_FIFOSTS_TXRXACT_Msk);
@@ -377,7 +386,7 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
         uart_base->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk;
         // NOTE: Added in M480/M2351. After configuring CTSACTLV, re-enable TX/RX.
         uart_base->FUNCSEL &= ~UART_FUNCSEL_TXRXDIS_Msk;
-        
+
         // Enable CTS
         uart_base->INTEN |= UART_INTEN_ATOCTSEN_Msk;
     }
@@ -389,14 +398,14 @@ void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
 {
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
     while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
-    
+
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     obj->serial.irq_handler = (uint32_t) handler;
     obj->serial.irq_id = id;
-    
+
     // Restore sync-mode vector
     obj->serial.vec = ((struct nu_uart_var *) modinit->var)->vec;
 }
@@ -412,13 +421,13 @@ int serial_getc(serial_t *obj)
     // NOTE: Every byte access requires accompaniment of one interrupt. This has side effect of performance degradation.
     while (! serial_readable(obj));
     int c = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
-    
+
     // NOTE: On Nuvoton targets, no H/W IRQ to match TxIrq/RxIrq.
-    //       Simulation of TxIrq/RxIrq requires the call to Serial::putc()/Serial::getc() respectively. 
+    //       Simulation of TxIrq/RxIrq requires the call to Serial::putc()/Serial::getc() respectively.
     if (obj->serial.inten_msk & (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk)) {
         UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
     }
-    
+
     return c;
 }
 
@@ -427,9 +436,9 @@ void serial_putc(serial_t *obj, int c)
     // NOTE: Every byte access requires accompaniment of one interrupt. This has side effect of performance degradation.
     while (! serial_writable(obj));
     UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), c);
-    
+
     // NOTE: On Nuvoton targets, no H/W IRQ to match TxIrq/RxIrq.
-    //       Simulation of TxIrq/RxIrq requires the call to Serial::putc()/Serial::getc() respectively. 
+    //       Simulation of TxIrq/RxIrq requires the call to Serial::putc()/Serial::getc() respectively.
     if (obj->serial.inten_msk & UART_INTEN_THREIEN_Msk) {
         UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
     }
@@ -437,7 +446,6 @@ void serial_putc(serial_t *obj, int c)
 
 int serial_readable(serial_t *obj)
 {
-    //return UART_IS_RX_READY(((UART_T *) NU_MODBASE(obj->serial.uart)));
     return ! UART_GET_RX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart)));
 }
 
@@ -502,7 +510,7 @@ static void uart_irq(serial_t *obj)
             ((uart_irq_handler) obj->serial.irq_handler)(obj->serial.irq_id, RxIrq);
         }
     }
-    
+
     if (uart_base->INTSTS & UART_INTSTS_THREINT_Msk) {
         // Simulate clear of the interrupt flag. Temporarily disable the interrupt here and to be recovered on next write.
         UART_DISABLE_INT(uart_base, UART_INTEN_THREIEN_Msk);
@@ -510,7 +518,7 @@ static void uart_irq(serial_t *obj)
             ((uart_irq_handler) obj->serial.irq_handler)(obj->serial.irq_id, TxIrq);
         }
     }
-    
+
     // FIXME: Ignore all other interrupt flags. Clear them. Otherwise, program will get stuck in interrupt.
     uart_base->INTSTS = uart_base->INTSTS;
     uart_base->FIFOSTS = uart_base->FIFOSTS;
@@ -520,19 +528,15 @@ static void uart_irq(serial_t *obj)
 #if DEVICE_SERIAL_ASYNCH
 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     MBED_ASSERT(tx_width == 8 || tx_width == 16 || tx_width == 32);
 
     obj->serial.dma_usage_tx = hint;
     serial_check_dma_usage(&obj->serial.dma_usage_tx, &obj->serial.dma_chn_id_tx);
-    
+
     // UART IRQ is necessary for both interrupt way and DMA way
     serial_tx_enable_event(obj, event, 1);
     serial_tx_buffer_set(obj, tx, tx_length, tx_width);
-    //UART_HAL_DisableTransmitter(obj->serial.address);
-    //UART_HAL_FlushTxFifo(obj->serial.address);
-    //UART_HAL_EnableTransmitter(obj->serial.address);
-            
+
     int n_word = 0;
     if (obj->serial.dma_usage_tx == DMA_USAGE_NEVER) {
         // Interrupt way
@@ -543,72 +547,70 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
         const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
         MBED_ASSERT(modinit != NULL);
         MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
         PDMA_T *pdma_base = dma_modbase();
-        
+
         pdma_base->CHCTL |= 1 << obj->serial.dma_chn_id_tx;     // Enable this DMA channel
         PDMA_SetTransferMode(pdma_base,
-            obj->serial.dma_chn_id_tx,
-            ((struct nu_uart_var *) modinit->var)->pdma_perp_tx,    // Peripheral connected to this PDMA
-            0,  // Scatter-gather disabled
-            0); // Scatter-gather descriptor address
+                             obj->serial.dma_chn_id_tx,
+                             ((struct nu_uart_var *) modinit->var)->pdma_perp_tx,   // Peripheral connected to this PDMA
+                             0,                 // Scatter-gather disabled
+                             0);                // Scatter-gather descriptor address
         PDMA_SetTransferCnt(pdma_base,
-            obj->serial.dma_chn_id_tx, 
-            (tx_width == 8) ? PDMA_WIDTH_8 : (tx_width == 16) ? PDMA_WIDTH_16 : PDMA_WIDTH_32, 
-            tx_length);
+                            obj->serial.dma_chn_id_tx,
+                            (tx_width == 8) ? PDMA_WIDTH_8 : (tx_width == 16) ? PDMA_WIDTH_16 : PDMA_WIDTH_32,
+                            tx_length);
         PDMA_SetTransferAddr(pdma_base,
-            obj->serial.dma_chn_id_tx,
-            (uint32_t) tx,  // NOTE:
-                            // NUC472: End of source address
-                            // M451: Start of source address
-                            // M480: Start of source address
-                            // M2351: Start of source address
-            PDMA_SAR_INC,   // Source address incremental
-            (uint32_t) NU_MODBASE(obj->serial.uart),   // Destination address
-            PDMA_DAR_FIX);  // Destination address fixed
+                             obj->serial.dma_chn_id_tx,
+                             (uint32_t) tx,     // NOTE:
+                                                // NUC472: End of source address
+                                                // M451: Start of source address
+                                                // M480: Start of source address
+                                                // M2351: Start of source address
+                             PDMA_SAR_INC,      // Source address incremental
+                             (uint32_t) NU_MODBASE(obj->serial.uart),   // Destination address
+                             PDMA_DAR_FIX);     // Destination address fixed
         PDMA_SetBurstType(pdma_base,
-            obj->serial.dma_chn_id_tx, 
-            PDMA_REQ_SINGLE,    // Single mode
-            0); // Burst size
+                          obj->serial.dma_chn_id_tx,
+                          PDMA_REQ_SINGLE,      // Single mode
+                          0); // Burst size
         PDMA_EnableInt(pdma_base,
-            obj->serial.dma_chn_id_tx,
-            PDMA_INT_TRANS_DONE); // Interrupt type
+                       obj->serial.dma_chn_id_tx,
+                       PDMA_INT_TRANS_DONE);    // Interrupt type
         // Register DMA event handler
         dma_set_handler(obj->serial.dma_chn_id_tx, (uint32_t) uart_dma_handler_tx, (uint32_t) obj, DMA_EVENT_ALL);
         serial_tx_enable_interrupt(obj, handler, 1);
+        /* We needn't actually enable UART INT to go UART ISR -> handler.
+         * Instead, as PDMA INT is triggered, we will go PDMA ISR -> UART ISR -> handler
+         * with serial_tx/rx_enable_interrupt having set up this call path. */
+        UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
+
         ((UART_T *) NU_MODBASE(obj->serial.uart))->INTEN |= UART_INTEN_TXPDMAEN_Msk;  // Start DMA transfer
     }
-    
+
     return n_word;
-#else
-    return 0;
-#endif    
 }
 
 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     MBED_ASSERT(rx_width == 8 || rx_width == 16 || rx_width == 32);
 
     obj->serial.dma_usage_rx = hint;
     serial_check_dma_usage(&obj->serial.dma_usage_rx, &obj->serial.dma_chn_id_rx);
     // DMA doesn't support char match, so fall back to IRQ if it is requested.
-    if (obj->serial.dma_usage_rx != DMA_USAGE_NEVER && 
-        (event & SERIAL_EVENT_RX_CHARACTER_MATCH) && 
-        char_match != SERIAL_RESERVED_CHAR_MATCH) {
+    if (obj->serial.dma_usage_rx != DMA_USAGE_NEVER &&
+            (event & SERIAL_EVENT_RX_CHARACTER_MATCH) &&
+            char_match != SERIAL_RESERVED_CHAR_MATCH) {
         obj->serial.dma_usage_rx = DMA_USAGE_NEVER;
         dma_channel_free(obj->serial.dma_chn_id_rx);
         obj->serial.dma_chn_id_rx = DMA_ERROR_OUT_OF_CHANNELS;
     }
-    
+
     // UART IRQ is necessary for both interrupt way and DMA way
     serial_rx_enable_event(obj, event, 1);
     serial_rx_buffer_set(obj, rx, rx_length, rx_width);
     serial_rx_set_char_match(obj, char_match);
-    //UART_HAL_DisableReceiver(obj->serial.address);
-    //UART_HAL_FlushRxFifo(obj->serial.address);
-    //UART_HAL_EnableReceiver(obj->serial.address);
-        
+
     if (obj->serial.dma_usage_rx == DMA_USAGE_NEVER) {
         // Interrupt way
         serial_rx_enable_interrupt(obj, handler, 1);
@@ -617,125 +619,113 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
         const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
         MBED_ASSERT(modinit != NULL);
         MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
         PDMA_T *pdma_base = dma_modbase();
-        
+
         pdma_base->CHCTL |= 1 << obj->serial.dma_chn_id_rx;     // Enable this DMA channel
         PDMA_SetTransferMode(pdma_base,
-            obj->serial.dma_chn_id_rx,
-            ((struct nu_uart_var *) modinit->var)->pdma_perp_rx,    // Peripheral connected to this PDMA
-            0,  // Scatter-gather disabled
-            0); // Scatter-gather descriptor address
+                             obj->serial.dma_chn_id_rx,
+                             ((struct nu_uart_var *) modinit->var)->pdma_perp_rx,   // Peripheral connected to this PDMA
+                             0,  // Scatter-gather disabled
+                             0); // Scatter-gather descriptor address
         PDMA_SetTransferCnt(pdma_base,
-            obj->serial.dma_chn_id_rx, 
-            (rx_width == 8) ? PDMA_WIDTH_8 : (rx_width == 16) ? PDMA_WIDTH_16 : PDMA_WIDTH_32, 
-            rx_length);
+                            obj->serial.dma_chn_id_rx,
+                            (rx_width == 8) ? PDMA_WIDTH_8 : (rx_width == 16) ? PDMA_WIDTH_16 : PDMA_WIDTH_32,
+                            rx_length);
         PDMA_SetTransferAddr(pdma_base,
-            obj->serial.dma_chn_id_rx,
-            (uint32_t) NU_MODBASE(obj->serial.uart),    // Source address
-            PDMA_SAR_FIX,   // Source address fixed
-            (uint32_t) rx,  // NOTE: 
-                            // NUC472: End of destination address
-                            // M451: Start of destination address
-                            // M480: Start of destination address
-                            // M2351: Start of destination address
-            PDMA_DAR_INC);  // Destination address incremental
+                             obj->serial.dma_chn_id_rx,
+                             (uint32_t) NU_MODBASE(obj->serial.uart),    // Source address
+                             PDMA_SAR_FIX,      // Source address fixed
+                             (uint32_t) rx,     // NOTE:
+                                                // NUC472: End of destination address
+                                                // M451: Start of destination address
+                                                // M480: Start of destination address
+                                                // M2351: Start of destination address
+                             PDMA_DAR_INC);     // Destination address incremental
         PDMA_SetBurstType(pdma_base,
-            obj->serial.dma_chn_id_rx, 
-            PDMA_REQ_SINGLE,    // Single mode
-            0); // Burst size
+                          obj->serial.dma_chn_id_rx,
+                          PDMA_REQ_SINGLE,      // Single mode
+                          0);                   // Burst size
         PDMA_EnableInt(pdma_base,
-            obj->serial.dma_chn_id_rx,
-            PDMA_INT_TRANS_DONE); // Interrupt type
+                       obj->serial.dma_chn_id_rx,
+                       PDMA_INT_TRANS_DONE);    // Interrupt type
         // Register DMA event handler
         dma_set_handler(obj->serial.dma_chn_id_rx, (uint32_t) uart_dma_handler_rx, (uint32_t) obj, DMA_EVENT_ALL);
         serial_rx_enable_interrupt(obj, handler, 1);
-        ((UART_T *) NU_MODBASE(obj->serial.uart))->INTEN |= UART_INTEN_RXPDMAEN_Msk;  // Start DMA transfer
+        /* We needn't actually enable UART INT to go UART ISR -> handler.
+         * Instead, as PDMA INT is triggered, we will go PDMA ISR -> UART ISR -> handler
+         * with serial_tx/rx_enable_interrupt having set up this call path. */
+        UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
+        ((UART_T *) NU_MODBASE(obj->serial.uart))->INTEN |= UART_INTEN_RXPDMAEN_Msk;    // Start DMA transfer
     }
-#endif    
 }
 
 void serial_tx_abort_asynch(serial_t *obj)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
     while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
-    
+
     if (obj->serial.dma_usage_tx != DMA_USAGE_NEVER) {
         PDMA_T *pdma_base = dma_modbase();
-        
+
         if (obj->serial.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(pdma_base, obj->serial.dma_chn_id_tx, PDMA_INT_TRANS_DONE);
-            // FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
-            //PDMA_STOP(obj->serial.dma_chn_id_tx);
+            // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             pdma_base->CHCTL &= ~(1 << obj->serial.dma_chn_id_tx);
         }
         UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_TXPDMAEN_Msk);
     }
-    
+
     // Necessary for both interrupt way and DMA way
     serial_enable_interrupt(obj, TxIrq, 0);
     serial_rollback_interrupt(obj, TxIrq);
-#endif    
 }
 
 void serial_rx_abort_asynch(serial_t *obj)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     if (obj->serial.dma_usage_rx != DMA_USAGE_NEVER) {
         PDMA_T *pdma_base = dma_modbase();
-        
+
         if (obj->serial.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(pdma_base, obj->serial.dma_chn_id_rx, PDMA_INT_TRANS_DONE);
-            // FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
-            //PDMA_STOP(obj->serial.dma_chn_id_rx);
+            // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             pdma_base->CHCTL &= ~(1 << obj->serial.dma_chn_id_rx);
         }
         UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_RXPDMAEN_Msk);
     }
-    
+
     // Necessary for both interrupt way and DMA way
     serial_enable_interrupt(obj, RxIrq, 0);
     serial_rollback_interrupt(obj, RxIrq);
-#endif
 }
 
 uint8_t serial_tx_active(serial_t *obj)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     // NOTE: Judge by serial_is_irq_en(obj, TxIrq) doesn't work with sync/async modes interleaved. Change with TX FIFO empty flag.
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
-    struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;    
+
+    struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
     return (obj->serial.vec == var->vec_async);
-#else
-    return 1;
-#endif
 }
 
 uint8_t serial_rx_active(serial_t *obj)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     // NOTE: Judge by serial_is_irq_en(obj, RxIrq) doesn't work with sync/async modes interleaved. Change with RX FIFO empty flag.
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
-    struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;    
+
+    struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
     return (obj->serial.vec == var->vec_async);
-#else
-    return 1;
-#endif    
 }
 
 int serial_irq_handler_asynch(serial_t *obj)
 {
-#ifndef NVT_SERIAL_SYNC_ONLY
     int event_rx = 0;
     int event_tx = 0;
-    
+
     // Necessary for both interrupt way and DMA way
     if (serial_is_irq_en(obj, RxIrq)) {
         event_rx = serial_rx_event_check(obj);
@@ -743,49 +733,17 @@ int serial_irq_handler_asynch(serial_t *obj)
             serial_rx_abort_asynch(obj);
         }
     }
-        
+
     if (serial_is_irq_en(obj, TxIrq)) {
         event_tx = serial_tx_event_check(obj);
         if (event_tx) {
             serial_tx_abort_asynch(obj);
         }
     }
-        
+
     return (obj->serial.event & (event_rx | event_tx));
-#else
-    return 0;
-#endif    
 }
 
-int serial_allow_powerdown(void)
-{
-#ifndef NVT_SERIAL_SYNC_ONLY
-    uint32_t modinit_mask = uart_modinit_mask;
-    while (modinit_mask) {
-        int uart_idx = nu_ctz(modinit_mask);
-        const struct nu_modinit_s *modinit = uart_modinit_tab + uart_idx;
-        if (modinit->modname != NC) {
-            UART_T *uart_base = (UART_T *) NU_MODBASE(modinit->modname);
-            // Disallow entering power-down mode if Tx FIFO has data to flush
-            if (! UART_IS_TX_EMPTY((uart_base))) {
-                return 0;
-            }
-            // Disallow entering power-down mode if async Rx transfer (not PDMA) is on-going
-            if (uart_base->INTEN & (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk)) {
-                return 0;
-            }
-            // Disallow entering power-down mode if async Rx transfer (PDMA) is on-going
-            if (uart_base->INTEN & UART_INTEN_RXPDMAEN_Msk) {
-                return 0;
-            }
-        }
-        modinit_mask &= ~(1 << uart_idx);
-    }
-#endif    
-    return 1;
-}
-
-
 static void uart0_vec_async(void)
 {
     uart_irq_async(uart0_var.obj);
@@ -826,62 +784,6 @@ static void uart_irq_async(serial_t *obj)
     }
 }
 
-static void serial_enable_interrupt(serial_t *obj, SerialIrq irq, uint32_t enable)
-{
-    if (enable) {
-        const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
-        MBED_ASSERT(modinit != NULL);
-        MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
-        NVIC_SetVector(modinit->irq_n, (uint32_t) obj->serial.vec);
-        NVIC_EnableIRQ(modinit->irq_n);
-        
-        struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
-        // Multiple serial S/W objects for single UART H/W module possibly.
-        // Bind serial S/W object to UART H/W module as interrupt is enabled.
-        var->obj = obj;
-        
-        switch (irq) {
-            // NOTE: Setting inten_msk first to avoid race condition
-            case RxIrq:
-                obj->serial.inten_msk = obj->serial.inten_msk | (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk);
-                UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
-                break;
-            case TxIrq:
-                obj->serial.inten_msk = obj->serial.inten_msk | UART_INTEN_THREIEN_Msk;
-                UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
-                break;
-        }
-    }
-    else { // disable
-        switch (irq) {
-            case RxIrq:
-                UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
-                obj->serial.inten_msk = obj->serial.inten_msk & ~(UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk);
-                break;
-            case TxIrq:
-                UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
-                obj->serial.inten_msk = obj->serial.inten_msk & ~UART_INTEN_THREIEN_Msk;
-                break;
-        }
-    }
-}
-
-static int serial_is_irq_en(serial_t *obj, SerialIrq irq)
-{
-    int inten_msk = 0;
-    switch (irq) {
-        case RxIrq:
-            inten_msk = obj->serial.inten_msk & (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk);
-            break;
-        case TxIrq:
-            inten_msk = obj->serial.inten_msk & UART_INTEN_THREIEN_Msk;
-            break;
-    }
-    return !! inten_msk;
-}
-
-#ifndef NVT_SERIAL_SYNC_ONLY
 static void serial_rx_set_char_match(serial_t *obj, uint8_t char_match)
 {
     obj->char_match = char_match;
@@ -892,20 +794,23 @@ static void serial_tx_enable_event(serial_t *obj, int event, uint8_t enable)
 {
     obj->serial.event &= ~SERIAL_EVENT_TX_MASK;
     obj->serial.event |= (event & SERIAL_EVENT_TX_MASK);
-    
-    //if (event & SERIAL_EVENT_TX_COMPLETE) {
-    //}
+
+    if (event & SERIAL_EVENT_TX_COMPLETE) {
+        // N/A
+    }
 }
 
 static void serial_rx_enable_event(serial_t *obj, int event, uint8_t enable)
 {
     obj->serial.event &= ~SERIAL_EVENT_RX_MASK;
     obj->serial.event |= (event & SERIAL_EVENT_RX_MASK);
-    
-    //if (event & SERIAL_EVENT_RX_COMPLETE) {
-    //}
-    //if (event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
-    //}
+
+    if (event & SERIAL_EVENT_RX_COMPLETE) {
+        // N/A
+    }
+    if (event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
+        // N/A
+    }
     if (event & SERIAL_EVENT_RX_FRAMING_ERROR) {
         UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_RLSIEN_Msk);
     }
@@ -915,57 +820,55 @@ static void serial_rx_enable_event(serial_t *obj, int event, uint8_t enable)
     if (event & SERIAL_EVENT_RX_OVERFLOW) {
         UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_BUFERRIEN_Msk);
     }
-    //if (event & SERIAL_EVENT_RX_CHARACTER_MATCH) {
-    //}
+    if (event & SERIAL_EVENT_RX_CHARACTER_MATCH) {
+        // N/A
+    }
 }
 
 static int serial_is_tx_complete(serial_t *obj)
 {
     // NOTE: Exclude tx fifo empty check due to no such interrupt on DMA way
-    //return (obj->tx_buff.pos == obj->tx_buff.length) && UART_GET_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart)));
-    // FIXME: Premature abort???
     return (obj->tx_buff.pos == obj->tx_buff.length);
 }
 
 static int serial_is_rx_complete(serial_t *obj)
 {
-    //return (obj->rx_buff.pos == obj->rx_buff.length) && UART_GET_RX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart)));
     return (obj->rx_buff.pos == obj->rx_buff.length);
 }
 
 static uint32_t serial_tx_event_check(serial_t *obj)
 {
     UART_T *uart_base = (UART_T *) NU_MODBASE(obj->serial.uart);
-    
+
     if (uart_base->INTSTS & UART_INTSTS_THREINT_Msk) {
         // Simulate clear of the interrupt flag. Temporarily disable the interrupt here and to be recovered on next write.
         UART_DISABLE_INT(uart_base, UART_INTEN_THREIEN_Msk);
     }
-    
+
     uint32_t event = 0;
-    
+
     if (obj->serial.dma_usage_tx == DMA_USAGE_NEVER) {
         serial_write_async(obj);
     }
-    
+
     if (serial_is_tx_complete(obj)) {
         event |= SERIAL_EVENT_TX_COMPLETE;
     }
-    
+
     return event;
 }
 
 static uint32_t serial_rx_event_check(serial_t *obj)
 {
     UART_T *uart_base = (UART_T *) NU_MODBASE(obj->serial.uart);
-    
+
     if (uart_base->INTSTS & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk)) {
         // Simulate clear of the interrupt flag. Temporarily disable the interrupt here and to be recovered on next read.
         UART_DISABLE_INT(uart_base, (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
     }
-    
+
     uint32_t event = 0;
-    
+
     if (uart_base->FIFOSTS & UART_FIFOSTS_BIF_Msk) {
         uart_base->FIFOSTS = UART_FIFOSTS_BIF_Msk;
     }
@@ -977,7 +880,7 @@ static uint32_t serial_rx_event_check(serial_t *obj)
         uart_base->FIFOSTS = UART_FIFOSTS_PEF_Msk;
         event |= SERIAL_EVENT_RX_PARITY_ERROR;
     }
-    
+
     if (uart_base->FIFOSTS & UART_FIFOSTS_RXOVIF_Msk) {
         uart_base->FIFOSTS = UART_FIFOSTS_RXOVIF_Msk;
         event |= SERIAL_EVENT_RX_OVERFLOW;
@@ -986,23 +889,21 @@ static uint32_t serial_rx_event_check(serial_t *obj)
     if (obj->serial.dma_usage_rx == DMA_USAGE_NEVER) {
         serial_read_async(obj);
     }
-    
+
     if (serial_is_rx_complete(obj)) {
         event |= SERIAL_EVENT_RX_COMPLETE;
     }
     if ((obj->char_match != SERIAL_RESERVED_CHAR_MATCH) && obj->char_found) {
         event |= SERIAL_EVENT_RX_CHARACTER_MATCH;
-        // FIXME: Timing to reset char_found?
-        //obj->char_found = 0;
     }
-    
+
     return event;
 }
 
 static void uart_dma_handler_tx(uint32_t id, uint32_t event_dma)
 {
     serial_t *obj = (serial_t *) id;
-    
+
     // FIXME: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
@@ -1013,14 +914,14 @@ static void uart_dma_handler_tx(uint32_t id, uint32_t event_dma)
     // FIXME: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
-    
+
     uart_irq_async(obj);
 }
 
 static void uart_dma_handler_rx(uint32_t id, uint32_t event_dma)
 {
     serial_t *obj = (serial_t *) id;
-    
+
     // FIXME: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
@@ -1031,18 +932,18 @@ static void uart_dma_handler_rx(uint32_t id, uint32_t event_dma)
     // FIXME: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
-    
+
     uart_irq_async(obj);
 }
 
 static int serial_write_async(serial_t *obj)
-{   
+{
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     UART_T *uart_base = (UART_T *) NU_MODBASE(obj->serial.uart);
-    
+
     uint32_t tx_fifo_max = ((struct nu_uart_var *) modinit->var)->fifo_size_tx;
     uint32_t tx_fifo_busy = (uart_base->FIFOSTS & UART_FIFOSTS_TXPTR_Msk) >> UART_FIFOSTS_TXPTR_Pos;
     if (uart_base->FIFOSTS & UART_FIFOSTS_TXFULL_Msk) {
@@ -1056,34 +957,34 @@ static int serial_write_async(serial_t *obj)
         }
         return 0;
     }
-    
+
     uint32_t bytes_per_word = obj->tx_buff.width / 8;
-    
+
     uint8_t *tx = (uint8_t *)(obj->tx_buff.buffer) + bytes_per_word * obj->tx_buff.pos;
     int n_words = 0;
     while (obj->tx_buff.pos < obj->tx_buff.length && tx_fifo_free >= bytes_per_word) {
         switch (bytes_per_word) {
-            case 4:
-                UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
-                UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
-            case 2:
-                UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
-            case 1:
-                UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
+        case 4:
+            UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
+            UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
+        case 2:
+            UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
+        case 1:
+            UART_WRITE(((UART_T *) NU_MODBASE(obj->serial.uart)), *tx ++);
         }
-        
+
         n_words ++;
         tx_fifo_free -= bytes_per_word;
         obj->tx_buff.pos ++;
     }
-    
+
     if (n_words) {
         // Simulate clear of the interrupt flag
         if (obj->serial.inten_msk & UART_INTEN_THREIEN_Msk) {
             UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
         }
     }
-    
+
     return n_words;
 }
 
@@ -1092,42 +993,38 @@ static int serial_read_async(serial_t *obj)
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     uint32_t rx_fifo_busy = (((UART_T *) NU_MODBASE(obj->serial.uart))->FIFOSTS & UART_FIFOSTS_RXPTR_Msk) >> UART_FIFOSTS_RXPTR_Pos;
-    //uint32_t rx_fifo_free = ((struct nu_uart_var *) modinit->var)->fifo_size_rx - rx_fifo_busy;
-    //if (rx_fifo_free == 0) {
-    //    return 0;
-    //}
-    
+
     uint32_t bytes_per_word = obj->rx_buff.width / 8;
-    
+
     uint8_t *rx = (uint8_t *)(obj->rx_buff.buffer) + bytes_per_word * obj->rx_buff.pos;
     int n_words = 0;
     while (obj->rx_buff.pos < obj->rx_buff.length && rx_fifo_busy >= bytes_per_word) {
         switch (bytes_per_word) {
-            case 4:
-                *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
-                *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
-            case 2:
-                *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
-            case 1:
-                *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
+        case 4:
+            *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
+            *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
+        case 2:
+            *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
+        case 1:
+            *rx ++ = UART_READ(((UART_T *) NU_MODBASE(obj->serial.uart)));
         }
-        
+
         n_words ++;
         rx_fifo_busy -= bytes_per_word;
         obj->rx_buff.pos ++;
-        
+
         if ((obj->serial.event & SERIAL_EVENT_RX_CHARACTER_MATCH) &&
-            obj->char_match != SERIAL_RESERVED_CHAR_MATCH) {
+                obj->char_match != SERIAL_RESERVED_CHAR_MATCH) {
             uint8_t *rx_cmp = rx;
             switch (bytes_per_word) {
-                case 4:
-                    rx_cmp -= 2;
-                case 2:
-                    rx_cmp --;
-                case 1:
-                    rx_cmp --;
+            case 4:
+                rx_cmp -= 2;
+            case 2:
+                rx_cmp --;
+            case 1:
+                rx_cmp --;
             }
             if (*rx_cmp == obj->char_match) {
                 obj->char_found = 1;
@@ -1135,14 +1032,14 @@ static int serial_read_async(serial_t *obj)
             }
         }
     }
-    
+
     if (n_words) {
         // Simulate clear of the interrupt flag
         if (obj->serial.inten_msk & (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk)) {
             UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
         }
     }
-    
+
     return n_words;
 }
 
@@ -1167,7 +1064,7 @@ static void serial_tx_enable_interrupt(serial_t *obj, uint32_t handler, uint8_t
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     // Necessary for both interrupt way and DMA way
     struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
     // With our own async vector, tx/rx handlers can be different.
@@ -1181,7 +1078,7 @@ static void serial_rx_enable_interrupt(serial_t *obj, uint32_t handler, uint8_t
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     // Necessary for both interrupt way and DMA way
     struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
     // With our own async vector, tx/rx handlers can be different.
@@ -1190,15 +1087,54 @@ static void serial_rx_enable_interrupt(serial_t *obj, uint32_t handler, uint8_t
     serial_enable_interrupt(obj, RxIrq, enable);
 }
 
+static void serial_enable_interrupt(serial_t *obj, SerialIrq irq, uint32_t enable)
+{
+    if (enable) {
+        const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
+        MBED_ASSERT(modinit != NULL);
+        MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
+
+        NVIC_SetVector(modinit->irq_n, (uint32_t) obj->serial.vec);
+        NVIC_EnableIRQ(modinit->irq_n);
+
+        struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
+        // Multiple serial S/W objects for single UART H/W module possibly.
+        // Bind serial S/W object to UART H/W module as interrupt is enabled.
+        var->obj = obj;
+
+        switch (irq) {
+        // NOTE: Setting inten_msk first to avoid race condition
+        case RxIrq:
+            obj->serial.inten_msk = obj->serial.inten_msk | (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk);
+            UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
+            break;
+        case TxIrq:
+            obj->serial.inten_msk = obj->serial.inten_msk | UART_INTEN_THREIEN_Msk;
+            UART_ENABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
+            break;
+        }
+    } else { // disable
+        switch (irq) {
+        case RxIrq:
+            UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk));
+            obj->serial.inten_msk = obj->serial.inten_msk & ~(UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk);
+            break;
+        case TxIrq:
+            UART_DISABLE_INT(((UART_T *) NU_MODBASE(obj->serial.uart)), UART_INTEN_THREIEN_Msk);
+            obj->serial.inten_msk = obj->serial.inten_msk & ~UART_INTEN_THREIEN_Msk;
+            break;
+        }
+    }
+}
 
 static void serial_rollback_interrupt(serial_t *obj, SerialIrq irq)
 {
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == (int) obj->serial.uart);
-    
+
     struct nu_uart_var *var = (struct nu_uart_var *) modinit->var;
-    
+
     obj->serial.vec = var->vec;
     serial_enable_interrupt(obj, irq, obj->serial.irq_en);
 }
@@ -1212,13 +1148,27 @@ static void serial_check_dma_usage(DMAUsage *dma_usage, int *dma_ch)
         if (*dma_ch == DMA_ERROR_OUT_OF_CHANNELS) {
             *dma_usage = DMA_USAGE_NEVER;
         }
-    }
-    else {
+    } else {
         dma_channel_free(*dma_ch);
         *dma_ch = DMA_ERROR_OUT_OF_CHANNELS;
     }
 }
 
-#endif //#ifndef NVT_SERIAL_SYNC_ONLY
+static int serial_is_irq_en(serial_t *obj, SerialIrq irq)
+{
+    int inten_msk = 0;
+
+    switch (irq) {
+    case RxIrq:
+        inten_msk = obj->serial.inten_msk & (UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk);
+        break;
+    case TxIrq:
+        inten_msk = obj->serial.inten_msk & UART_INTEN_THREIEN_Msk;
+        break;
+    }
+
+    return !! inten_msk;
+}
+
 #endif  // #if DEVICE_SERIAL_ASYNCH
-#endif // #if DEVICE_SERIAL
+#endif  // #if DEVICE_SERIAL